1- Create the Pspice model for this MOSFET using .model statement.
.MODEL Mos_N NMOS(kp=2m Vto=+2V lambda=0)
Mn 4 2 5 5 Mos_N L=100u W=600u
2- Create the appropriate simulation profile that evaluates the operating point and the
small signal parameters and Fill the following table using the output file:
We use .OP command
Lambd VGS VDS VTH VDSAT IDSAT gm gds W/L
a [V] [V] [V] [V] [mA] [mS] [µS]
[V-1]
0 3.2 6.4 2 1.2 4.3 7.19 0 3
MOSFET-Common source Amplifier
.LIB
Vin 1 0 sin (0 10m 2K 0)
VCC 3 0 DC 15
*Vds 4 5 dc 0
*Vgs 2 5 dc 3.2
R1 3 4 1K
R2 3 2 100k
R3 2 0 100K
R4 5 0 1K
Rload 6 0 10K
C1 4 6 1u
C2 1 2 4.7u
C4 5 0 1u
.MODEL Mos_N NMOS(kp=2m Vto=+2V lambda=0)
Mn 4 2 5 5 Mos_N L=100u W=300u
.op
.End
3- Change the transistor geometry and the bias voltage VCC in order to adjust the
operating point to a current IDSAT equal to 8.6mA while VDSat remains constant.
We have for the last simulation W/L = 300/100=3:
1 W 1 W
I Dsat = k 'n ref ( V GS −V TH )2 = k 'n ref V dsat
ref
2 Lref 2 L ref ref
(1)
1 W 1 W
I Dsat = k 'n ( V GS−V TH ) 2= k 'n V dsat
2 L 2 L
For the new design W/L (2)
I Dsat W ref L V dsat W W I V dsat
ref
= × ref
⇒ = ref × Dsat ref
I Dsat Lref W V dsa L Lref I Dsat V dsa
(1)/(2): (3)
ref
W ref I Dsat 8 .6 mA V dsat
=3 = =2 ref
=1
Lref I Dsat 4 . 3 mA V dsa
, and VDSat remains constant
ref
W 600 um
=3×2×1=6=
L 100 im
(3) becomes:
From the static circuit:
V CC =( R1 +R 4 ) I Dsat +V ds=2 k Ω×8. 6 mA +6 . 4 V =23 . 6 V
The netlist becomes:
MOSFET-Common source Amplifier
.LIB
Vin 1 0 sin (0 10m 2K 0)
VCC 3 0 DC 23.6
*Vds 4 5 dc 0
*Vgs 2 5 dc 3.2
R1 3 4 1K
R2 3 2 100k
R3 2 0 100K
R4 5 0 1K
Rload 6 0 10K
C1 4 6 1u
C2 1 2 4.7u
C4 5 0 1u
.MODEL Mos_N NMOS(kp=2m Vto=+2V lambda=0)
Mn 4 2 5 5 Mos_N L=100u W=600u
.op
.End
Simulation results (output file):
NAME Mn
MODEL Mos_N
ID 8.60E-03
VGS 3.20E+00
VDS 6.39E+00
VBS 0.00E+00
VTH 2.00E+00
VDSAT 1.20E+00
4- Plot the characteristic IDS vs. VDS using the .DC analysis command and Label its
regions of operation (linear, triode and saturation).
Define Vgs and Vds sources as:
Vds 4 5 dc 6.4 (Bias point)
Vgs 2 5 dc 3.2 (Bias point)
Then sweep the Vds from 0 to 15V
.dc Vds dc 0 15 0.1
Code:
MOSFET-Common source Amplifier
.LIB
Vin 1 0 dc 0 sin (0 10m 10K 0) AC 1 1K
VCC 3 0 DC 15
Vds 4 5 dc 6.4
Vgs 2 5 dc 3.2
R1 3 4 1K
R2 3 2 100k
R3 2 0 100K
R4 5 0 1K
Rload 6 0 10K
C1 4 6 1u
C2 1 2 4.7u
C4 5 0 1u
.MODEL Mos_N NMOS(kp=2m Vto=+2V lambda=0
Mn 4 2 5 5 Mos_N L=100u W=300u
*Mn 4 2 5 5 IRF150
.op
.DC Vds 0 15 0.1;
.PROBE
.END
5- On the same graph, plot the static load line IDS vs. VDS and record from the graph
the operating point Q.
In the Add trace expression: write: (15-Vds)/2k
6- Plot the characteristic IDS vs. VGS (LOG scale) using the .DC analysis command and
Label its regions of operation (subthreshold, quadratic and linear).
Sweep the Vgs voltage from 0 to 15 and Replace the command .dc Vds dc 0 15 0.1 by
.dc Vgs dc 0 15 0.1
In the Probe, select Y-Axix log to show the logarithmic value of ID
7- Plot the network of IDS vs. VDS characteristics for each VGS value (1V, 3.2V and
4V) using the .DC analysis command.
Sweep the Vds from 0 to 15V and Vgs with list value as:
.dc Vds dc 0 15 0.1 Vgs list 1 3.2 4
8- On the same graph, plot the static load line IDS vs. VDS, determine the region of
operation of the MOSFET for each VGS and record all the operating points
Q(VDS,IDS) and VDSAT from the graph. Check the hand calculations against the
simulation results.
VGS VDS IDS VDSAT
[V] [V] [mA] [V]
Q1 3.2 6.4 4.3 1.2
Q2 4 0.74 7.2 2
Hand calculation:
Q1 (Vgs=3.2) in the saturation region:
1 W
I Dsat = k 'n ( V GS−V TH ) 2
- we calculate the drain current from: 2 L
- we calculate the Drain source voltage VDS from the static load line equation:
V CC −V ds
I D=
R1 + R4
- we calculate VDSAT from: VDSAT= VGS-Vth
Q1 (Vgs=4) in the linear region:
- we calculate the drain current and the Drain source voltage VDS from the system of
equation:
{ W
I D=k'n ( V GS−V TH ) V DS ¿ ¿¿¿
L
IV.2 MOSFET application (Amplification)
We will be using a MOSFET as Common source amplifier. The circuit in Figure. 1
corresponds to a Common source amplifier
R1 1k
C1
Vout
VC C
R2 100k 15Vdc
C2 M1 Mos _N 1u R lo a d 10k
0
4.7u R3 100k
0
VOFF = 0 V s in
VAMPL = 10m V
F R EQ = 1k R4 1k C4 1u
Figure. 3 : Common source amplifier
1- Give the appropriate nodes to connect all the elements in the circuit.
2- Obtain the input-output transfer characteristic (VTC) using PSpice DC sweep. You
need to remove the coupling capacitors C for this simulation. Find the voltage gain
from the plot.
Simulation code:
MOSFET-Common source Amplifier
.LIB
Vin 2 0 dc 5 sin (0 10m 10K 0) AC 1 1K
VCC 3 0 DC 15
*Vds 4 5 dc 4.6
*Vgs 2 5 dc 3.2
R1 3 4 1K
R2 3 2 100k
R3 2 0 100K
R4 5 0 1K
Rload 4 0 10K
*C1 4 6 1u
*C2 1 2 4.7u
*C4 5 0 1u
.MODEL Mos_N NMOS(kp=2m Vto=+2V lambda=0
;+ Cbd=3.229n Pb=.8 Mj=.5 Fc=.5 Cgso=9.027n
;+ Cgdo=1.679n Rg=13.89 Is=194E-18 N=1 Tt=288n))
Mn 4 2 5 5 Mos_N L=100u W=300u
*Mn 4 2 5 5 IRF150
.op
.DC Vin 0 15 0.1; VgS list 3.2
.TF V(4) Vin
*.AC DEC 1000 10 100meg
.tran 1u 5m 0 5us
.probe
.end
1- Obtain the frequency response of the amplifier using PSpice AC sweep. You need to
use C for this simulation. Change the MOSFET by IRF150 and Find the voltage gain
and bandwidth from the plot.
MOSFET-Common source Amplifier
.LIB
Vin 1 0 dc 5 sin (0 10m 10K 0) AC 1 1K
VCC 3 0 DC 15
*Vds 4 5 dc 4.6
*Vgs 2 5 dc 3.2
R1 3 4 1K
R2 3 2 100k
R3 2 0 100K
R4 5 0 1K
Rload 6 0 10K
C1 4 6 1u
C2 1 2 4.7u
C4 5 0 1u
*Mn 4 2 5 5 Mos_N L=100u W=300u
Mn 4 2 5 5 IRF150
.op
.DC Vin 0 15 0.1; VgS list 3.2
*.TF V(4) Vin
.AC DEC 1000 10 100meg
*.tran 1u 5m 0 5us
.probe
.end
2- Obtain the input-output waveform of the amplifier from PSpice, using a 10mV, 1kHz
sine wave input.
Add the command .tran 1u 5m 0 5us