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2-Way Set Associative Cache Mapping

The document explains a 2-way set associative cache mapping technique with a main memory size of 128 words and cache memory size of 32 words. It details the mapping of memory blocks to cache lines, analyzes two specific addresses, and concludes both resulted in cache hits. Additionally, it provides a direct cache mapping example with a different memory configuration, resulting in cache misses for the analyzed addresses.

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43 views3 pages

2-Way Set Associative Cache Mapping

The document explains a 2-way set associative cache mapping technique with a main memory size of 128 words and cache memory size of 32 words. It details the mapping of memory blocks to cache lines, analyzes two specific addresses, and concludes both resulted in cache hits. Additionally, it provides a direct cache mapping example with a different memory configuration, resulting in cache misses for the analyzed addresses.

Uploaded by

itsvaibhavpujari
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd

Assume following Data:

• Size of Main Memory =128 words


• Size of Cache Memory=32 words
• Size of one Block = 8 words
• B2, B0, B11, B7 Main Memory Blocks are placed Line 0, Line 1, Line 2, Line 3
respectively in Cache Memory.
Show 2 way Set associative Cache mapping Technique with suitable diagram. Find
out Cache Hit /Miss condition, if CPU generate following address?
i] 1011010 ii] 0010011

2-Way Set Associative Cache Mapping


Given:

• Main Memory Size = 128 words


• Cache Memory Size = 32 words
• Block Size = 8 words
• Number of Cache lines = 32 / 8 = 4 lines
• Number of Memory Blocks = 128 / 8 = 16 blocks
• Cache is 2-Way Set Associative

B2
B0
B11
B7

Cache Configuration (2-Way Set Associative)


Set Index Way 0 Way 1

0 B2 (Line 0) B0 (Line 1)

1 B11 (Line 2) B7 (Line 3)

Address Breakdown and Mapping


Address i] 1011010
- Block Number: 1011 (Binary) = 11
- Set: 1 (Odd block)
- Present in Set 1 (B11)? Yes → Cache Hit

Address ii] 0011011


- Block Number: 0011 (Binary) = 3
- Set: 0 (Even block)
- Present in Set 0 (B2)? Yes → Cache Hit
Address Block # Set Block Present Result
in Cache?

1011010 11 1 Yes (B11) Hit

0010011 2 0 Yes (B2) Hit

Diagram Description

Block mapping (based on block number % 2):


Set 0 → Blocks: 0, 2, 4, 6, 8, 10, 12, 14
Set 1 → Blocks: 1, 3, 5, 7, 9, 11, 13, 15

Direct Cache Mapping - Solved Example

Given:

• Main Memory Size = 512 words


• Cache Memory Size = 64 words
• Block Size = 8 words
• Number of Memory Blocks = 512 / 8 = 64 blocks
• Number of Cache Lines = 64 / 8 = 8 lines

Cache Line to Memory Block Mapping

Cache Line Memory Block

0 B0

1 B9

2 B18

3 B27

4 B4
5 B13

6 B22

7 B31

Address Analysis

**Address i] 01011110**

- Decimal: 94
- Block Number: 94 / 8 = 11
- Word Offset: 94 % 8 = 6
- Cache Line: 11 % 8 = 3
- Block in Cache Line 3: B27
- Requested Block: B11
→ Result: MISS

**Address ii] 10001001**

- Decimal: 137
- Block Number: 137 / 8 = 17
- Word Offset: 137 % 8 = 1
- Cache Line: 17 % 8 = 1
- Block in Cache Line 1: B9
- Requested Block: B17
→ Result: MISS

Final Summary

Address Decimal Block # Word Cache Block in Result


Offset Line Cache

01011110 94 11 6 3 B27 Miss

10001001 137 17 1 1 B9 Miss

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