4.

6 SEMICONVERTERS
Though semiconverters have inherent freewheeling action, these are generally not utilized.
Rather a separate freewheeling diode (FD) is connected across the load. This is because the
inherent freewheeling increases the average current rating of the silicon-controlled rectifier
(SCR). These are half-controlled converters having limited control on their average DC output
voltage. They use a mixture of diodes and thyristors. It is a single or one-quadrant converter as it
has one polarity of DC output voltage and current at its output terminals, as shown in Figure 4.17.

Figure 4.17 Quadrant operation of semiconverter

4.6.1 Single-phase Semiconverter with RL load

It is a half-controlled full-wave rectifier. It is also called a single-phase two-pulse rectifier or
one-quadrant converter. It uses a mixture of diodes and thyristors, and there is a limited control
over the output DC voltage. The single-phase semiconverter has two configurations as shown in
Figure 4.18.

Figure 4.18 Single-phase semiconverter configuration: (a) symmetrical-semiconductor

configuration and (b) asymmetrical-semiconductor configuration.

1. Symmetrical semiconverter: In this configuration, each arm or leg has one thyristor and
one diode. It requires a FD if the load is inductive.
2. Asymmetrical semiconverter: In this configuration, one leg has two thyristors and the other
leg has two diodes. It does not require an FD if the load is inductive because the two diodes 𝐷1
and 𝐷2 can play the role of the FD.
Case I: Continuous Conduction:
Power circuit and various voltage and current waveforms for symmetrical 1− ϕ semiconverter
with RL load are shown in Figure 4.19.

1
Working: During the positive half cycle, thyristor 𝑇1 and diode 𝐷1 are forward biased. If
thyristor 𝑇1 is gated, current flow through the path: point a – 𝑇1 – RL load – 𝐷1 – point b, see
Figure 4.19(a). The voltage across the load is a segment of the supply voltage. 𝑇1 and 𝐷1
conduct from α to π. Soon after ωt = π, load voltage 𝑣0 tends to reverse as the AC source
voltage 𝑣𝑠 also reverses its direction. Just as 𝑣0 tends to reverse (at ωt = π+), FD gets forward
biased and therefore starts conducting. The load or output current 𝑖0 is transferred from 𝑇1 𝐷1
to the FD. Therefore, now the FD conducts from π to π + α. During this period, 𝑣0 = 0,
because the FD short-circuits the load terminals.
During the negative half cycle, thyristor 𝑇2 and diode 𝐷2 are forward biased. If 𝑇2 is gated, the
current flows through the path: point b – 𝑇2 – RL load – 𝐷2 – point a. At ωt = 2π, FD is again
forward biased, and therefore the load current i0 is transferred from 𝑇2 𝐷2 to FD as explained
earlier, and in this way, the cycle repeats.

Figure 4.19 (a) Power circuit diagram (b) various voltage and current waveforms, (c) a plot
between 𝑉0 and α, and (d) quadrant operation

2
Performance Parameters:

The average output voltage,

The root mean square (RMS) output voltage,

or

It is also called a half-controlled converter because by varying the firing angle (α) from 0° to
180°, its output voltage polarity cannot be reversed (Figure 4.19(c)), that is, it has limited control
over the level of DC output voltage.

Therefore, if a graph is plotted between average output voltage (𝑉0 ) and firing angle (α), then
it can be seen that output voltage can be controlled from zero to maximum positive only by
varying the firing angle from 0° to 180°.
Therefore, the single-phase semiconverter is also called the single-quadrant converter because it
can be operated in the first quadrant only, as shown in Figure 4.19(d). (As 𝑖0 = always positive
and 𝑉0 = positive, when α is varied from 0° to 180°).

Case II: Discontinuous Conduction:

Working: From α to π, 𝑇1 𝐷1 conducts and so 𝑣0 = 𝑣𝑠 and 𝑖0 increases gradually due to
inductive nature of load.
At ωt = π, the FD gets forward biased, so 𝑖0 is transferred from 𝑇1 𝐷1 to FD. Therefore, from π to
β, FD conducts. During this period, 𝑖0 = 𝑖𝑓𝑑 , and 𝑣0 = 0. At ωt = β, load current 𝑖0 becomes zero
so the FD gets turned off. From β to (π + α) no device conducts. So 𝑖0 = 0, 𝑣0 = 0. At ωt = (π +
α), 𝑇2 is triggered; therefore, 𝑇2 𝐷2 conducts from (π + α) to 2π. So the load voltage 𝑣0 = 𝑣𝑠 and
𝑖0 increases gradually because the load is inductive in nature. Again, at ωt = 2π, FD gets forward
biased, and in this way the cycle repeats. Various voltage and current waveforms for
discontinuous conduction are shown in Figure 4.20.

3
 Figure 4.20 Various voltage and current waveforms (discontinuous conduction).

Performance Parameters:
Average output voltage,

Other performance parameters can be found out by using the above equations and as per
definitions discussed earlier.

With RLE Load:

The power circuit and various voltage and current waveforms for single-phase semiconverters
are given in Figure 4.21.

At ωt = α, when 𝑇1 is triggered, the load current builds up from zero and rises to the maximum
and then decays to zero at b, which is greater than π.
From α to π, 𝑇1 𝐷1 conducts and 𝑣0 = 𝑣𝑠 . At ωt = π, as 𝑣𝑠 tends to become negative, the FD is
forward biased and starts conducting the load current. When the FD conducts from π to β,

4
𝑣0 = 0. From β to π + α, no component in the circuit conducts, so 𝑣0 = 𝐸 and 𝑖0 = 0 as
shown in Figure 4.21(b). During the period from β to π + α, as load current is zero, so it makes
the load current discontinuous.
When 𝑇2 is triggered at π + α, load current 𝑖0 builds as shown in the waveforms. At ωt = 2π, the
FD is forward biased and starts conducting till π + β. During the time the FD conducts, 𝑣0 = 0.
From π + β to 2π + α, no component in the circuit conducts, and so 𝑣0 = 𝐸. At 2π + α, 𝑇1 is
triggered again, and the above sequence repeats.

Figure 4.21 Power circuit diagram and various waveforms: (a) power circuit waveforms and (b)
voltage and current waveforms.

From the preceding discussion and waveforms, it can be observed that it has three modes:

The average load current 𝐼0 is given by:

Average output voltage 𝑉0:

or

5
or

where γ = conduction angle = β – α

4.6.2 Three-Phase Semiconverter with RL Load

Power circuit for three-phase semiconverter with RL load is drawn in Figure 4.22(a).The output
voltage across the load terminals is controlled by varying the firing angle of thyristors 𝑇1 , 𝑇2 and
𝑇3 . The diodes 𝐷1 , 𝐷2 and 𝐷3 provide the return path for the current.

Working: In a 3− ϕ phase semiconverter, thyristors are fired at an interval of 120° in a proper

sequence. It has a unique feature of working as a six-pulse converter for α < 60° and as a
three-pulse converter for α ≥ 60°.
For α = 0°: Thyristors 𝑇1 , 𝑇2 and 𝑇3 behave like diodes and output voltage of semiconverter is
symmetrical six-pulses per cycle as shown in Figure 4.22(c). The FD does not come into play.

Figure 4.22Three-phase semiconverter with RL load: (a) power circuit, (b) quadrant, and (c)
voltage waveforms.

6
For α = 15°: The firing of 𝑇1 , 𝑇2 and 𝑇3 is delayed but return diodes 𝐷1 , 𝐷2 and 𝐷3 remain
unaffected so that only alternate pulses are affected. The FD does not come into play. Each
diode and thyristor conducts for 120°.
For α = 60°: Thyristors are so fired that the current returns through one diode during each 120°
conduction period. The FD does not come into play, [see Figure 4.22(c)].
For α = 90°: The output voltage 𝑣0 is discontinuous. Here the FD becomes forward biased at ωt
= 120°, 240°, 360°. Therefore, for each periodic cycle of 120°, output voltage 𝑣0 is equal to a
line voltage for only 90° and for the remaining 30°, when the FD conducts, 𝑣0 is zero. So, for α =
90°, the conduction angle of thyristors and diodes is less than 120° for every output pulse, that is,
the conduction angle for both positive and negative group elements (T and D) is 90° and for the
remaining 30°, current completes its path through the FD, as shown in Figure 4.22(c) .

For α = 120°: For each periodic cycle of 120°, load voltage 𝑣0 has two components (if load is
RL):
1. When the thyristor is fired, the thyristor and diode conduct for 60° only.
2. As 𝑣0 reaches zero and tends to become negative, the FD becomes forward biased and
so starts conducting, and therefore output voltage 𝑣0 = 0.

As in the 3−ϕ semiconverter, each periodic cycle of output voltage has a periodicity of 120°.
So the average output voltage is only calculated over 120°.

For α < 60°, the average output voltage:

For α ≥ 60°, the average output voltage:

4.7 POWER FACTOR IMPROVEMENT

The power factor (PF) of phase-controlled converters depends on delay angle, and is low,
especially when the output voltage is less than the maximum, that is, when the firing angle (α) is
large. These converters generate harmonics into the supply. The poor PF operation is a major
concern in variable speed drives and in high-power applications. The various techniques to
improve the PF in phase-controlled converters are:
1. Phase-angle control (PAC)
2. Semiconverter operation of full converters
3. Asymmetrical firings

But in forced-commutated converters, each thyristor is provided with its own commutation
circuit and therefore can be commutated at any desired instant. Forced commutation helps in

7
improving the input PF and reduce the harmonics level. The various control schemes that
improve the PF of forced commutated converters are:
1. Extinction angle control (EAC)
2. Symmetrical angle control (SAC)
3. Pulse-width modulation (PWM) control

4.7.1 Extinction Angle Control (EAC)

Figure 4.23(a) shows a single-phase semiconverter, where 𝑆1 and 𝑆2 are two switches. The two
switches can be SCRs, gate turn-offs (GTOs) or insulated-gate bipolar transistors (IGBTs).
In this control, switch 𝑆1 is triggered at ωt = 0 and is commutated by force commutation at ωt =
(π − β). Switch 𝑆2 is triggered at ωt = π and is commutated at ωt = (2π – β). The output voltage is
controlled by varying the extinction angle β. Various voltage and current waveforms are shown
in Figure 4.23(b). Waveforms depict that fundamental component of input current leads input
voltage and the displacement factor, PF, is leading.

Figure 4.23 (a) Power circuit employing forced commutation, and (b) voltage and current
waveforms.

8
The average output voltage can be derived as:

2𝑉𝑚
Therefore, average output voltage 𝑉0 can be varied from to zero by varying the extinction
𝜋
angle β from 0 to π.

The expression for RMS output voltage 𝑉𝑟𝑚𝑠 can be derived as:

The performance of this converter with EAC is similar to those with phase-angle control, except
the PF (and displacement factor) is leading. In the case of phase-angle control, the PF is lagging.

The RMS supply current 𝐼𝑠 can be derived as:

4.7.2 Symmetrical Angle Control (SACAC)

Figure 4.24(a) presents various voltage and current waveforms for the SAC scheme for a single-
phase semiconverter . SAC allows only one quadrant operation.
𝜋−𝛾
Working: Under this control, switch 𝑆1 is triggered at 𝜔𝑡 = and is commutated at 𝜔𝑡 =
2
𝜋+𝛾 3𝜋−𝛾 3𝜋+𝛾
. Switch 𝑆2 is triggered at 𝜔𝑡 = 2 and commutated at 𝜔𝑡 = 2 . The output voltage
2
is controlled by varying the conduction angle (γ). The gate pulses are generated by comparing
half sine waves with a DC signal, as shown in Figure 4.24(b). Waveforms depict that supply
current pulse is placed symmetrically with respect to the supply voltage peak, and therefore, the
fundamental component of the input current is in phase with the supply voltage and displacement
factor is unity. Therefore, the PF is improved.

The average output voltage 𝑉0 can be derived as:

9
 Figure 4.24 Symmetrical angle control: (a) voltage and current waveforms and (b) gate-pulse
generation for SAC.
2𝑉
Therefore, 𝑉0 can be varied from 𝜋𝑚 to zero by varying conduction angle γ from π to zero.
The expression for RMS output voltage 𝑉𝑟𝑚𝑠 can be obtained as:

or

10
4.7.3 Pulse Width Modulation Control
In the case of PAC, EAC, and SAC, the supply current has only one pulse per half cycle, and
therefore the lowest order harmonics is third, which is very difficult to filter out. The lower-order
harmonics can be eliminated if the supply current has more than one pulse per half cycle.
But contrary in PWM control, the converter switches are turned on/off several times during a
half cycle to have more pulses per half cycle as shown in Figure 4.25(a). Here, the output voltage
is controlled by varying the width of pulses.
The gate signals are generated by comparing a triangular wave with a DC signal, as shown in
Figure 4.25(b). The lower-order harmonics can be eliminated by selecting the number of pulses
per half cycle.

Figure 4.25 PWM control: (a) voltage and current waveforms and (b) gate-pulse generation for
PWM control.

The average output voltage 𝑉0 is given by:

where p = no. of pulse per half cycle.

11
4.7.4 Sinusoidal Pulse Width Modulation Control
There are different methods of varying the width of pulses and the most common one is the
sinusoidal pulse-width modulation (SPWM). In SPWM control, as shown in Figure 4.26, the
firing signals (gate signals) for the switches are obtained by comparing a triangular reference
wave (𝑣𝑟 ) of amplitude (𝐴𝑟 ) and frequency (𝑓𝑟 ) with a rectified sinusoidal carrier wave (𝑣𝑐 ) of
amplitude (𝐴𝑐 ) and frequency 2𝑓𝑠 . The rectified sinusoidal wave is in phase with the supply
phase voltage and has twice the supply frequency (𝑓𝑠 ). The output voltage (i.e., width of pulses)
is varied by changing the amplitude (𝐴𝑐 ) or the modulation index (M) from 0 to 1. The modula-
tion index can be defined as:

Figure 4.26 Sinusoidal PWM control.

In a sinusoidal PWM control, the displacement factor is unity, and the PF is improved. The
lower-order harmonics are eliminated or reduced. For example: with four-pulses per half cycle,
the lowest-order harmonic is 5th, with six-pulses per half cycle, the lowest-order harmonic is 7th.

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5.5 INVERSION OPERATION
When phase-controlled full converters or line-commutated full converters are operated with a
firing angle greater than 90°, then this operation of full converter is known as inverter operation
or inversion operation. With the firing angle is greater than 90°, the average output voltage of
converter V0 becomes negative as shown in Figure 4.27(a). Therefore, the power is fed back to
the AC supply.

Figure 4.27 Inversion operation: (a) output voltage waveform for 1 − ϕ full converter (RLE load)
with α > 90° and (b) quadrant.

Such an operation is used in the regenerative braking operation of a DC motor, where E is the
back emf. Such an operation provides 4th-quadrant operation, as shown in Figure 4.27(b). When
the full converter operates with a firing angle greater than 90°, that is, α > 90°, it is also called a
line-commutated inverter.

13