Bus organization of 8085 microprocessor
Bus is a group of conducting wires which carries information, all the peripherals are
connected to microprocessor through Bus.
There are three types of buses.
1. Address bus –
It is a group of conducting wires which carries address [Link] bus is
unidirectional because data flow in one direction, from microprocessor to memory or
from microprocessor to Input/output devices (That is, Out of Microprocessor).
Length of Address Bus of 8085 microprocessor is 16 Bit (That is, Four Hexadecimal
Digits), ranging from 0000 H to FFFF H, (H denotes Hexadecimal). The
microprocessor 8085 can transfer maximum 16 bit address which means it can address
65, 536 different memory location.
The Length of the address bus determines the amount of memory a system can
[Link] as a system with a 32-bit address bus can address 2^32 memory
[Link] each memory location holds one byte, the addressable memory space is 4
[Link], the actual amount of memory that can be accessed is usually much less
than this theoretical limit due to chipset and motherboard limitations.
2. Data bus –
It is a group of conducting wires which carries Data [Link] bus is bidirectional
because data flow in both directions, from microprocessor to memory or Input/Output
devices and from memory or Input/Output devices to microprocessor.
Length of Data Bus of 8085 microprocessor is 8 Bit (That is, two Hexadecimal Digits),
ranging from 00 H to FF H. (H denotes Hexadecimal).
When it is write operation, the processor will put the data (to be written) on the data
bus, when it is read operation, the memory controller will get the data from specific
memory block and put it into the data bus.
The width of the data bus is directly related to the largest number that the bus can carry,
such as an 8 bit bus can represent 2 to the power of 8 unique values, this equates to the
number 0 to 255.A 16 bit bus can carry 0 to 65535.
3. Control bus –
It is a group of conducting wires, which is used to generate timing and control signals
to control all the associated peripherals, microprocessor uses control bus to process
data, that is what to do with selected memory location. Some control signals are:
Memory read
Memory write
I/O read
I/O Write
Opcode fetch
If one line of control bus may be the read/write [Link] the wire is low (no electricity
flowing) then the memory is read, if the wire is high (electricity is flowing) then the
memory is written.
Discuss different data transfer instruction in 8085 microprocessor.
Data Transfer Instructions are
1) MOV r1,r2 (Move data;move the contents of one register to another ).
The contents of r2 register is moved to [Link] instruction doesn't affect any flags.
States: 4 Machine cycles :1.
2)MOV r,M (move the content of memory to register).
No Flags are affected after executing this [Link] modes is register
indirect.
States: 7 Machine cycles :2.
3)MOV M,r (move the content of register to memory).
No Flags are affected after executing this instruction. Addressing modes is register
indirect.
States: 7 Machine cycles :2.
4)MVI r,data(move immediate data to register).
No Flags are affected after executing this [Link] modes is immediate.
States: 7 Machine cycles :2.
5)MVI M,data(move immediate data to memory location).
No Flags are affected after executing this [Link] modes is immediate/register
indirect.
States: 10 Machine cycles :3.
6)LXI rp,data16(Load register pair immediate).
This instruction loads immediate data of 16-bit into register pair [Link] Flags are affected
after executing this [Link] modes is immediate. States: 10 Machine cycles :3.
7)LDA addr(Load accumulator direct).
The content of the memory location specified in the instruction is stored into the accumulator.
No Flags are affected after executing this [Link] modes is direct. States: 13
Machine cycles :4.
8)STA addr(Store accumulator direct).
The content of the memory location specified in the instruction is stored with the accumulator
[Link] Flags are affected after executing this [Link] modes is direct.
States: 13 Machine cycles :4.
9)LHLD addr(Load H-L pair direct).
The content of memory location specified in the instruction is stored in the L register and the
next memory location content is stored in the H register. No Flags are affected after executing
this [Link] modes is direct.
States: 16 Machine cycles :5.
10)SHLD addr(Store H-L pair direct).
The content of memory location specified in the instruction is stored with the L register
contents and the next memory location content is stored with the H register contents. No
Flags are affected after executing this [Link] modes is direct.
States: 16 Machine cycles :5.
11)LDAX rp(LOAD accumulator direct).
The content of memory location,whose address is stored in the register pair is loaded into the
accumulator. No Flags are affected after executing this instruction. Addressing modes is
register indirect.
States: 7 Machine cycles :2.
12)STAX rp(LOAD accumulator direct).
The content of the accumulator is stored in the memory location,whose address is stored in
the register pair. No Flags are affected after executing this [Link] modes is
register indirect.
States: 7 Machine cycles :2.
13)XCHG(Exchange the contents of H-L with D-E pair).
The contents of H-L pair are exchanged with contents of D-E [Link] Flags are affected after
executing this [Link] modes is register direct.
States: 4 Machine cycles :1.