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82C55 Microprocessor Input/Output Modes

The document discusses the 82C55A Programmable Peripheral Interface, focusing on its Mode 1 operations for strobed input and output, which allow for data storage and handshaking signals. It details the signal definitions for both input and output modes, as well as examples of interfacing with a keyboard and printer. Additionally, it introduces Mode 2 for bidirectional operation, enabling data transmission and reception over the same wires.

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0% found this document useful (0 votes)
18 views11 pages

82C55 Microprocessor Input/Output Modes

The document discusses the 82C55A Programmable Peripheral Interface, focusing on its Mode 1 operations for strobed input and output, which allow for data storage and handshaking signals. It details the signal definitions for both input and output modes, as well as examples of interfacing with a keyboard and printer. Additionally, it introduces Mode 2 for bidirectional operation, enabling data transmission and reception over the same wires.

Uploaded by

Alaa AV
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

4/11/22

Mode 1 Strobed Input


• Causes port A and/or port B to function as latching
input devices.
– allows external data to be stored to the port
until the microprocessor is ready to retrieve it.
• Port C is used not for data, but for control or
handshaking signals to help operate either or both
port A and B as strobed input ports
• Fig 11–27 shows how both ports are structured for
mode 1 strobed input operation.

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 70

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Figure 11–27 Strobed input operation (mode 1) of the 82C55. (a) Internal structure
and (b) timing diagram.

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 71

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Signal Definitions - Mode 1 Strobed I/P


• STB: Strobe input loads data to the port latch, which
holds the information until it is input to the µProc via
the IN instruction.
• IBF: Input buffer full is an output indicating that the
input latch contains information.
• INTR: Interrupt request is an output that requests
an interrupt. It becomes a logic 1 when STB returns
to a logic 1. Cleared when data are input from the
port by the processor.
• INTE: Interrupt enable signal is neither input nor
output; it is an internal bit programmed via port PC4
(port A) or PC2 (port B) bit position.
• PC7and PC6 are general-purpose I/O pins.
Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 72

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10.5 82C55A Programmable Peripheral


Interface

q Mode 1: Strobed Input

A input

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 73

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Strobed Input Example


Figure 11–28 Using the 82C55 for strobed input operation of a keyboard.

• Keyboard encoder debounces the key-switches, and


provides a strobe whenever a key is depressed.
• DAV is activated on a key press strobing the ASCII-
coded key code into Port A.

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 74

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Interfacing a Keyboard to µP using Port A in Mode 1 (Strobed Input)

;A procedure that reads the keyboard and Handshake (Polling) Method


;returns the ASCII key code in AL
BIT5 EQU 20H ;00100000 Mask defining PC5 (IBF for Port A)
PORTC EQU 22H
PORTA EQU 20H
READ PROC NEAR
.REPEAT ;poll IBF bit
IN AL,PORTC
TEST AL,BIT5
.UNTIL !ZERO? ; Quit polling when bit 5 read is not ZERO (IBF=1)
IN AL, PORTA ; get ASCII value of key pressed from keyboard
RET
READ ENDP

8255 should be programmed for operation in:


- Group A in Mode 1
- Port A is input

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 75

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Mode 1 Strobed Output


• Strobed output operation is similar to mode 0 output
operation.
– except control signals are included to provide
handshaking
• When data are written to a strobed output port, the
OBF (output buffer full) signal becomes logic 0 to
indicate data are present in the port latch.
• Fig 11–29 shows the internal configuration and
timing diagram of 82C55 when operated as a
strobed output device under mode 1.

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 76

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Figure 11–29 Strobed output operation (mode 1) of the 82C55. (a) Internal structure
and (b) timing diagram.

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Signal Definitions - Mode 1 Strobed O/P

• OBF: Output buffer full goes low whenever data


are output (OUT) to the port A or B latch. The signal
is set to logic 1 when the ACK pulse returns from the
external device.
• ACK: acknowledge signal causes the OBF pin to
return to logic 1. It is a response from an external
device, indicating that it has received data from the
82C55 port.
• INTR: Interrupt request often interrupts the
processor when the external device receives the
data via the ACK signal.

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 78

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Signal Definitions - Mode 1 Strobed O/P

• INTE: Interrupt enable is neither input nor output; it


is an internal bit programmed to enable or disable
the INTR pin. INTE A is programmed using PC6 bit.
INTE B is programmed using the PC2 bit.
• PC4and PC5 Port C pins PC4 and PC5 are general-
purpose I/O pins. The bit set and reset command is
used to set or reset these two pins.

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10.5 82C55A Programmable Peripheral


Interface

q Mode 1: Strobed Output

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 80

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Strobed Output Example


• The printer interface demonstrates how to achieve
strobed output synchronization between the printer
and the 82C55.
• Figure 11–30 illustrates port B connected to a
parallel printer, with eight data inputs for receiving
ASCII-coded data, a DS (data strobe) input to
strobe data into the printer, and an ACK output to
acknowledge the receipt of the ASCII character.

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 81

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Figure 11–30 The 82C55 connected to a parallel printer interface that illustrates the
strobed output mode of operation for the 82C55.

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 82

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Interfacing a Printer to µP using Port B in Mode 1 (Strobed Output)


;A procedure that transfers an ASCII character from AH to the printer
;connected to port B
BIT1 EQU 2 ; Bit PC1 = #OBF for port B 1 0 0 0 Reset PC4
1 0 0 1 Set PC4
PORTC EQU 62H
PORTB EQU 61H
CMD EQU 63H; The 8255 command byte address
PRINT PROC NEAR In port C
.REPEAT ;Wait for printer ready to receive a new char- Poll #OBF till high
IN AL,PORTC
Data from µP to

TEST AL,BIT1 µP Polling for #OBF = 1


port latch

.UNTIL !ZERO? ; #OBF =1 No data in output buffer, so can write into it!
MOV AL,AH ; Write ASCII char data into port latch
OUT PORTB,AL
MOV AL,8 ;Generate data strobe pulse
Data from port latch

; on PC4
OUT CMD,AL
to Printer

MOV AL,9
OUT CMD,AL
RET

PRINT ENDP

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 83

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Mode 2 Bidirectional Operation


• Mode 2 is allowed with group A only.
• Port A becomes bidirectional, allowing data
transmit/receive over the same eight wires.
– useful when interfacing two computers
• Also used for IEEE-488 parallel high-speed GPIB
(general- purpose instrumentation bus) interface
standard.
• Figure 11–31 shows internal structure and timing for
mode 2 bidirectional operation.

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 84

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Figure 11–31 Mode 2 operation of the 82C55. (a) Internal structure and (b) timing
diagram.

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 85

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10.5 82C55A Programmable Peripheral


Interface

q Mode 2: Bi-directional Operation

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 86

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Signal Definitions for Bidirectional Mode 2

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10.5 82C55A Programmable Peripheral


Interface

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 88

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10.5 82C55A Programmable Peripheral


Interface

Dr. Imad Alzeer 0701441 ”Microprocessor Fundamentals” 89

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Figure 11–32 A summary of the port connections for the 82C55 PIA.

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