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Microprocessor

The document contains a series of questions and answers related to microprocessors and assembly language, including topics such as memory types, instruction sets, and data buses. It references various exams and dates, indicating it may be a study guide or practice material for engineering students. Key concepts discussed include machine-dependent languages, bidirectional buses, and types of memory that can be erased and reprogrammed.

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0% found this document useful (0 votes)
3 views4 pages

Microprocessor

The document contains a series of questions and answers related to microprocessors and assembly language, including topics such as memory types, instruction sets, and data buses. It references various exams and dates, indicating it may be a study guide or practice material for engineering students. Key concepts discussed include machine-dependent languages, bidirectional buses, and types of memory that can be erased and reprogrammed.

Uploaded by

Yash
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF or read online on Scribd
sent a character ? {@) ASCIL (b) BCD (©) EBDIC (@) GRAY IRRB : 2014] 1, Assembly language is a — 2. (@) Machine independent language (b) Machine dependent language (9 High-level language (@ Language which requires interpreter IRRB JE : 29,08,2015] 3. Which of the following statements is not true ? 3 (@) Address bus is bidirectional (©) Data bus is bidirectional (©) Address bus is unidirectional, (@) Same data bus is used for boliftread and” write operations ~~ [RRB JE : 2014] be crased and reprogrammed? @) EEPROM (b) ROM (© Flash Memory (d) EPROM IRRB JE : 31.08.2019] The 8085 has two registers known as primary 5+ ‘ata pointers, These are registers : @ Band c (b) C and D (©) Hand L (@) D and E [RRB JE : 31.08.2019] ‘Which of the folloiwng requires 7 bits to repre- 1, Niicroprocessor RRB S| Secti in Engines Sc Engine Microprocessor ST a fora w eer a ngs a & fee 7 fact A sravama & 2 (a) ASCII () BCD (©) EBDIC (@) GRAY IRRB : 2014] oral arr ve 21 (a) aah vada are (o) air Pri are (). 3a eR AT @) aT Gt fe gevter HH ceed ett [RRB JE : 29.08.2015] Prafefad Aa otra wer wer ae & @ Bae festa ear 21 (b) Sgh-aa fafa star & © ree feet stor & © ote ste aes sitet # wa eet ae wt wiht at 81 IRRB JE : 2014) Which of the Folldwing fdh Fife ess AE Aaleaeaate] Satten arr tact we rogranmel once by the tae andi at ca eh NY ; ‘on edt & ae seed aa Prerg atte ga: stars at at on wad? (a) EEPROM (b) ROM (©) Flash Memory (d) EPROM IRRB JE : 31.08.2019) 8085 4 at eorex Ett & fore mee ser viged & wa ¥ ora onan 8) 2 eorex wns (@) Bic &) CaieD © HL @ DaikE IRRB JE : 31.08.2019] @ scanned with OKEN Scanner aaneeaner 1a, Be a Bond Be he reer th [RRB JE: 0.092019) ’ sins ta nay Be stor char sors mabe 2 Ye eam PSM els A sind eer BA ws HN E Ree vo sare the oats ahr B1 aoe bags fag she rae eR Ree © tie te tte the IRRD.E 31.0.9, 8, FeaPee whe (anemone) th et @ scanned with OKEN Scanner (RRB JE: 31082019) The 1C sed for making bidirectonaliniversal 9, fa (RRB JE : 01.09.2019) - ‘Which is NOT a contro instruction? RIM uur (RRB JE: 3.082019) sm sod to keep’ 30.) 80ssadt sre! Fr sr rr ware IRRB JE ; 01.09.2019] ard opts & arta oa at fw wet wR = [gue ae = 31.0800 Bi. Computer memory whi ‘in io Seee tite Af crete ts ead read and write operat ae Gort) a FT @ ROM (©) EPROM (© EEPROM = (® RAM TRRB JE : 31.08.2019] (©) Electrically erasable programmable rad on 0) & 8 ly afte etiam stmt ag Number fits nett cade 64 option in: SEMPUE whe @ fe or feng . The we ofa cache inconpuer stm ices 2 SIR EN A A (och mi a) sem a fee wren tal ee (Fhe ww aga wart By ove ete 4 weed we wrefe wow t - |. Accumulator is an integral-component of (gy a program that places programs ito memory ram that automate the translation of pn am Counter (PC) rexister stores the Le first memory block lock ad last memory b fo) Ades of the next insruston to be ex cued Size of the primary memory ; IRRB SSE : 03.09.2015] a microprocessor when 2 CPU is interrupted, @ 1 execution of instructions ) Acknowledges interrupt and continues (@ Acknowledges interrupt and. waits for the ‘ext instruction form the interrupting device. IRRB SSE): 21.12.2014] ‘An insruction consisting of an operation code And eperand address(es) is called (© Machine language instruction IRRB SSE : 02.09.2015] Microprocessor Reser (PC) register isan integral part 6. & IRRB SSE ; 03.09.2015} ledges imerrupt and branches off RRB St Section FS es we afiad ae wd Ree my oma (© a te a (9 a a IRR Sse: wien rot ty ret won (0) Sea Fe a (0 sm tt te a ete (© Prue @4 aa amt satan ofa (srs 8 a aoe IRRB SSE : 0809,015, 5. athe Joa CPU oem Bw (a) mesa RAE a Pres a tet ti jean at den wet Ge aetna et Prana @ (o vane stan om t ate at eT ty (© Sameat stor a t sh ard RE a ae arc Ree se et RRB SSE : 21122014] we ee ate rel stator ae te aati Prat weer & — © Pa © Rage Be (9 each are SET @ ath a Se pnp SSE : 02092015 @ scanned with OKEN Scanner on Ans. (a) Ans. (0) Ans. (a) Ans. (6) Ans. (0) Ans. (0) Ans. (6) Ans. () Ans. (0) Ans. (0) Ans. Ans. (a) Ans.) Ans. 0) Ans.) Ans. (0) 1. Ans. () Ans. (a) Ans (0) Ans. (0) Ans. (d) Ans. (0) Ans. (d) Ans. (0) @ scanned with OKEN Scanner

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