Power Electronics Assignment Overview
Power Electronics Assignment Overview
The efficiency of each converter directly influences the system's power output and current handling capabilities. Given efficiencies η(I) = 95%, η(II) = 90%, and η(III) = 80%, each converter's output power is the product of input power and its efficiency. Hence, higher efficiency results in higher power output. For instance, for converter I, the output power P1out = η(I) * P1in, which results in a higher P1in required to achieve the same output, influencing the input current Iin1. This is because Iin1 is determined by dividing P1in by input voltage and its efficiency .
Phase shift is a critical parameter reflecting the angular difference between voltage and current waveforms, impacting the power factor and efficiency of power transfer. It is calculated by observing the time interval Δt between when voltage and current peaks occur, and applying the formula Phase = ω * Δt, where ω is the angular frequency. In simulations showing current lagging behind voltage, the phase shift calculated (e.g., 0.53 or 30.9 degrees) verifies this lag analytically as Δt reflects this shift in the sinusoidal representation .
To maintain a constant 400V DC bus while maximizing load and charge, one must consider the output and input power relationships across converters. Given efficiency values, calculate each stage's output power, e.g., P2out = η(II)*P2in and P3out = η(III)*P3in, ensuring their sum accounts for P1out, thereby maintaining the bus voltage. Calculate the input currents by dividing power by voltage and efficiency appropriately. For converter I, maintaining the constant 400V requires balancing P1out across P2in and P3in, ultimately ensuring that total input aligns with maximum specified limits .
Simulated waveforms can illustrate diode conduction sequences confirming theoretical predictions. For instance, the voltage and current waveforms show distinct point-to-point conduction patterns where particular diodes conduct only during specific phase transitions, providing a consistent ripple-free output. Each diode pair's conduction aligns with phase shifts, verified by the alternating current waveform across each diode, establishing exact conduction intervals which confirm the sequences such as D1-5, D1-6, showing robust phase sequencing and rectifier efficiency .
To achieve unity power factor, the reactive portion of the impedance (imaginary part) must be neutralized, ideally arriving at a purely resistive impedance. For RLC circuits, this involves adding a capacitor in parallel whose impedance Xc cancels the inductor's reactance. Given the reactive power Q = 907 kVAR, the capacitor value is calculated using C = Q / (ω V^2), yielding a necessary 198 μF capacitor to balance out the inductive effect and bring the power factor to unity .
Transformation of secondary impedance to primary impedance involves scaling the impedance by the turns ratio squared. For example, R2' = N2^2 * R2, and similarly for other components like reactance of inductors. This alters the equivalent impedance seen at the primary, thus changing the input current calculation: Iin = Vrms / Ztotal. With Z' determined to 3.63 ∠75, affecting both magnitude and phase - the input current is calculated as a phasor, converting a circuit with a phase shift that relates directly to these impedance transformations .
In a three-phase rectifier, diodes interact in pairs corresponding to the phases with the highest positive and most negative voltage potential at any time. Each diode conducts every 120 degrees, but since they work in pairs, the actual conduction time per pair is 60 degrees within one cycle. This significantly impacts the rectifier’s performance, establishing the pattern and duration of current flow, directly determining the rectified output waveform and its DC level. The transitional nature of diode interaction defines the dynamic load sharing and minimizes ripple effect, crucial for stable DC output .
Adding a capacitor compensates for the inductor's reactive power, bringing the phase shift between voltage and current to zero, indicated by current no longer lagging behind voltage. This is evident in waveforms where post-capacitor introduction, the magnitude of source current decreases, e.g., from 16A to 13.13A, due to reduced reactive power demand. This adjustment effectively minimizes phase displacement, enhancing energy efficiency by aligning voltage and current, facilitating optimal power usage by reducing apparent power .
The relationship is governed by the fact that the average output current Idc,avg = Vdc,avg / R derives from the average DC output voltage, which depends on line voltage: Vdc,avg = 3√2 Vline / π. Line voltage affects Vdc,avg directly, and load resistance sets the magnitude of the output current by Ohm's law. Hence, elevated line voltage results in higher Vdc,avg, increasing Idc,avg proportionally inversely with the resistance R. The combination dictates how efficiently the rectifier converts AC to DC without excessive loss .