EE276 – Digital Electronic Circuits
Combinational circuits
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Combinational circuits- Introduction
Combinational circuits :
▪ Consists of logic gates
▪ Reacts to the values of the signals at their inputs
▪ Output of logic gates at any instant are determined only
from the present combination of inputs.
• Set of Boolean functions – possible to specify it logically – realize the
Boolean function with a combinational circuit.
• Combinational circuits available as ICs as MSI circuits
Important combinational circuits – adders, subtractors, comparators,
decoders, encoders and multiplexers
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Analyzing a combinational circuit
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Truth Table
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Example
• Realize the functions given below using only two-input NAND gates and inverters.
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Contd..
• Minimizing each function separately,
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Contd..
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Contd..
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Example 1 – simple binary adder
• Adds two 1-bit binary numbers – returns a 2-bit sum
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Example 2 – code conversion
• BCD – Excess-3 code conversion
• Form a truth table with bit combinations assigned to the BCD and excess-3
codes.
• Four input variables and four output variables.
• Unused 6 bit
combinations (10 to
15) – treat them as
don’t care conditions.
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Contd..
• BCD – Excess-3 code conversion
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Contd…
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Contd…
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Contd..
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Contd…
• Algebraic manipulation for the purpose of using common gates for two or more
outputs.
• Usual implementation in SoP requires – 7 AND gates and 3 OR gates (without counting
inverters).
• Implementation after algebraic manipulation – 4 AND gates and 4 OR gates (without
counting inverters).
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Contd..
• Logic diagram of BCD – Excess 3 code converter – fewer gates – no more than two
inputs.
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Conclude
Steps in combinational circuit design:
• Set up a truth table which specifies the outputs as a function of the inputs
variables.
• n-input variable – 2n rows in truth table.
• Any particular combination of the values for the input variables never occur in
circuit inputs – don’t care conditions.
• Obtain simplified expression using K-map or algebraic manipulation.
• Large number of variables – small number of terms – K-maps not preferred –
algebraic simplification.
• Manipulate the simplified algebraic expressions into the proper form –
depending on the type of gates to be used in realizing the circuit.
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Contd..
• Number of levels in a gate circuit – maximum number of gates through which the
signal must pass when going between the input and output terminals.
• Minimum SoP, minimum PoS form – 2-level circuit.
• Number of levels can be increased if it is possible to obtain reduced number of gates
or gate inputs.
• Minimum two-level AND-OR, NAND-NAND, OR-NAND, NOR-OR - can be realized
using minimum SoP as a starting point.
• Minimum two-level OR-AND, NOR-NOR, AND-NOR and NAND-AND –can be realized
using minimum PoS as a starting point.
• Multi-level multi output NAND-gate circuits – AND-OR circuits.
• Multi-level multi output NOR-gate circuits – OR-AND circuits.
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Contd..
❑ Constraints in a practical design:
➢ number of gates,
➢ number of inputs to the gates,
➢ propagation time of the signal through the gates,
➢ Number of interconnections,
➢ Limitations of the driving capability of each gate (number of gates to
which the output of the circuit may be connected).
Importance of each constraint – dictated by a particular application.
No general procedure for acceptable implementation.
Elementary objective in most cases – produce the simplified Boolean
functions in a standard form – proceed for performance criteria on case to
case basis.
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