Esp Wroom 32 Datasheet en
Esp Wroom 32 Datasheet en
Espressif Systems
August 22, 2016
About This Guide
This document lists the specifications for the ESP-WROOM-32 module.
The document structure is as follows:
Chapter Title Subject
Chapter 1 Preface A preview of ESP-WROOM-32
Chapter 2 Pin Definitions Device pinout and pin descriptions
Chapter 3 Functional Description Description of major functional modules and protocols
Chapter 4 Electrical Characteristics Electrical characteristics and specifications for ESP-WROOM-32
Chapter 5 Schematics The schematics of ESP-WROOM-32
Release Notes
Date Version Release notes
2016.08 V1.0 First release.
1 Preface 1
2 Pin Definitions 3
2.1 Pin Layout 3
2.2 Pin Description 4
2.3 Strapping Pins 5
3 Functional Description 6
3.1 CPU and Internal Memory 6
3.2 External Flash and SRAM 6
3.3 Crystal Oscillators 6
3.4 Power Consumption 7
3.5 Peripheral Interface Description 8
4 Electrical Characteristics 13
4.1 Absolute Maximum Ratings 13
4.2 Recommended Operating Conditions 13
4.3 Digital Terminal Characteristics 13
4.4 Wi-Fi Radio 14
4.5 Bluetooth LE Radio 14
4.5.1 Receiver 14
4.5.2 Transmit 15
4.6 Reflow Profile 15
5 Schematics 16
List of Tables
1 ESP-WROOM-32 Specifications 2
2 ESP-WROOM-32 Dimensions 3
3 ESP-WROOM-32 Pin Definitions 4
4 Strapping Pins 5
5 Power Consumption by Power Modes 7
6 Interface Description 8
7 Absolute Maximum Ratings 13
8 Recommended Operating Conditions 13
9 Digital Terminal Characteristics 13
10 Wi-Fi Radio Characteristics 14
11 Receiver Characteristics - BLE 14
12 Transmit Characteristics - BLE 15
13 Reflow Profile 15
List of Figures
1 Top and Side View of ESP-WROOM-32 3
2 ESP-WROOM-32 Schematics 16
1 PREFACE
1. Preface
ESP-WROOM-32 is a powerful, generic WiFi-BT-BLE MCU module that targets a wide variety of applications
ranging from low power sensor networks to the most demanding tasks such as voice encoding, music streaming
and MP3 decoding.
At the core of this module is the ESP32 chip, which is designed to be scalable and adaptive. There are 2 CPU cores
that can be individually controlled or powered, and the clock frequency is adjustable from 80 MHz to 240 MHz. The
user may also power off the CPU and make use of the low power coprocessor to constantly monitor the peripherals
for changes or crossing of thresholds. ESP32 integrates a rich set of peripherals, ranging from capacitive touch
sensors, Hall sensors, low noise sense amplifiers, SD card interface, Ethernet, high speed SDIO/SPI, UART, I2S
and I2C.
The integration of Bluetooth, Bluetooth LE and Wi-Fi ensures that a wide range of applications can be targeted,
and that it is future proof: using Wi-Fi allows a large physical range and direct connection to the internet through a
Wi-Fi router, while using Bluetooth allows the user to conveniently connect to the phone or broadcast low energy
beacons for its detection. The sleep current of the ESP32 chip is less than 5 µA, making it suitable for battery
powered and wearable electronics applications. ESP-WROOM-32 supports data rates up to 150 Mbps, and 22
dBm output power at the PA to ensure the widest physical range. As such the chip does offer industry leading
specifications and the best optimized performance for electronic integration, range and power consumption, and
connectivity.
The operating system chosen for ESP32 is freeRTOS with LWIP; TLS 1.2 with hardware acceleration is built in as
well. Secure (encrypted) over the air (OTA) upgrade is also supported, so that developers can continually upgrade
their products even after their release. New SDK features, tutorials and example applications will be released over
the next few months. The software releases are covered under the ESP32 bug bounty program and any bugs
can be reported to bugbounty@[Link]. As the SDK of ESP-WROOM-32 or ESP32 is open-source, the
user can build his own platforms and operating systems. For more in-depth discussion of this, the developer can
contact [Link]@[Link].
ESP-WROOM-32 has Espressif’s long term support — ESP32 will be covered under Espressif’s longevity program
and be available for the next 12 years. The design of ESP-WROOM-32 will be open-source when it has been fully
optimized. Feedbacks about the module, chip, API or firmware can be sent to feedback@[Link].
Note:
* ESP-WROOM-32 with high temperature range option (-40°C ~ 125°C) is available for custom order.
2. Pin Definitions
Length Width Height PAD size (bottom) Pin pitch Shielding can height PCB thickness
18 mm 25.5 mm 2.8 ± 0.1 mm 0.45 mm x 0.9 mm 1.27 mm 2 mm 0.8 ± 0.1 mm
Each strapping pin is connected with its internal pull-up/pull-down during the chip reset. Consequently, if a strap-
ping pin is unconnected or the connected external circuit is high-impendence, the internal weak pull-up/pull-down
will determine the default input level of the strapping pins.
To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or apply the host
MCU’s GPIOs to control the voltage level of these pins when powering on ESP32.
After reset, the strapping pins work as the normal functions pins.
Note:
Firmware can configure register bits to change the settings of ”Voltage of Internal LDO (VDD_SDIO)” and ”Timing of SDIO
Slave” after booting.
3. Functional Description
This chapter describes the modules and functions implemented in ESP-WROOM-32.
• 8 KBytes SRAM in RTC, which is called RTC SLOW Memory and can be accessed by the co-processor
during the deep-sleep mode.
• 8 KBytes SRAM in RTC, which is called RTC FAST Memory and can be used for data storage and accessed
by the main CPU during RTC Boot from the deep-sleep mode.
• 1 Kbit of EFUSE, of which 256 bits are used for the system (MAC address and chip configuration) and the
remaining 768 bits are reserved for customer applications, including Flash-Encryption and Chip-ID.
ESP32 accesses external QSPI flash and SRAM by the high-speed caches. Up to 16 MBytes of external flash are
memory mapped into the CPU code space, supporting 8, 16 and 32-bit access. Code execution is supported.
Up to 8 MBytes of external SRAM are memory mapped into the CPU data space, supporting 8, 16 and 32-bit
access. Data read is supported on the flash and SRAM. Data write is supported on the SRAM.
When using the downloading tools, remember to select the right crystal oscillator type. In circuit design, capac-
itors C1 and C2 that connects to the earth, are added to the input and output terminals of the crystal oscillator
respectively. The values of the two capacitors can be flexible, ranging from 6 pF to 22 pF. However, the specific
capacitive values of C1 and C2 depend on further testing and adjustment of the overall performance of the whole
circuit. Normally, the capacitive values of C1 and C2 are within 10 pF if the crystal oscillator frequency is 26 MHz,
while 10 pF<C1 and C2<22 pF if the crystal oscillator frequency is 40 MHz.
The frequency of the RTC crystal oscillator is typically 32 kHz or 32.768 kHz. The accuracy can be out of the range
of ±20 PPM, since the internal calibration is applied to correct the frequency offset. When the chip operates in low
power modes, the application chooses the external low speed (32 kHz) crystal clock rather than the internal RC
oscillators to achieve the accurate wakeup time.
• Power mode
– Active mode: chip radio is powered on. The chip can receive, transmit, or listen.
– Modem-sleep mode: the CPU is operational and the clock is configurable. Wi-Fi / Bluetooth baseband
and radio are disabled.
– Light-sleep mode: the CPU is paused. The RTC and ULP-coprocessor are running. Any wake-up
events (MAC, host, RTC timer, or external interrupts) will wake up the chip.
– Deep-sleep mode: Only RTC is powered on. Wi-Fi and Bluetooth connection data are stored in RTC
memory. The ULP-coprocessor can work.
– Hibernate mode: The internal 8MHz oscillator and ULP-coprocessor are disabled. The RTC recovery
memory are power-down. Only one RTC timer on the slow clock and some RTC GPIOs are active. The
RTC timer or the RTC GPIOs can wake up the chip from the hibernate mode.
• Sleep Pattern
– Association sleep pattern: The power mode switches between the active mode and modem/light-
sleep mode during this sleep pattern. The CPU, Wi-Fi, Bluetooth, and radio wake up at pre-determined
intervals to keep Wi-Fi / BT connections alive.
– ULP sensor-monitored pattern: The main CPU is in the deep-sleep mode. The ULP co-processor does
sensor measurements and wakes up the main system, based on the measured data from sensors.
The power consumption varies with different power modes/sleep patterns and work status of functional modules
(see Table 5).
U1TXD_out
U1RTS_out
U2RXD_in
U2CTS_in
U2TXD_out
U2RTS_out
I2CEXT0_SCL_in
I2CEXT0_SDA_in
I2CEXT1_SCL_in
I2CEXT1_SDA_in
I2C Any GPIO Two I2C devices in slave or master modes
I2CEXT0_SCL_out
I2CEXT0_SDA_out
I2CEXT1_SCL_out
I2CEXT1_SDA_out
Note:
Functions of Motor PWM, LED PWM, UART, I2C, I2S, general purpose SPI and Remote Controller can be configured to
any GPIO.
4. Electrical Characteristics
Note:
The specifications in this chapter are tested with general condition: VBAT = 3.3V, TA = 27°C, unless otherwise specified.
4.5.2 Transmit
Item Value
Ts max to TL (Ramp-up Rate) 3°C/second max
Preheat
Temperature Min. (Ts Min.) 150°C
Temperature Typ. (Ts Typ.) 175°C
Temperature Min. (Ts Max.) 200°C
Time (Ts ) 60 ~ 180 seconds
Ramp-up rate (TL to TP ) 3°C/second max
Time maintained above: –Temperature (TL )/Time (TL ) 217°C/60 ~ 150 seconds
Peak temperature (TP ) 260°C max, for 10 seconds
Target peak temperature (TP Target) 260°C +0/-5°C
Time within 5°C of actual peak (tP ) 20 ~ 40 seconds
TS max to TL (Ramp-down Rate) 6°C/second max
Tune 25°C to Peak Temperature (t) 8 minutes max
Note:
The 32 kHz crystal is internally connected to ESP32’s GPIO32 and GPIO33. To use ADC, Touch or GPIO functions of
IO32 and IO33, please remove the 32 kHz crystal and its capacitors — C13 and C17, and solder the 0ohm resisters —
R5 and R6.
5. Schematics
GND
3
U1
GND GND
GND
GND XOUT
XIN
C1 C2
15pF 15pF
VDD33 GND
2
C3 C8
100pF GND 0.1uF
GND 40MHz+/-10ppm VDD33
48
47
46
45
44
43
42
41
40
39
38
37
XTAL_P
XTAL_N
VDD3P3_CPU
VDDA
VDDA
U0TXD
GND
U0RXD
CAP1
CAP2
GPIO21
GPIO22
GPIO19
C6 C7
10uF 0.1uF
VDD_SDIO
8
2 3 34 GPIO5 U3
C11 4 VDD3P3 GPIO5 33 SDI/SD1 SCS/CMD 1 5 SDI/SD1
VCC
PCB ANT C10 L1 SENSOR_VP 5 VDD3P3 SD_DATA_1 32 SDO/SD0 /CS DI
2.4pF 1.6nH 270pF 6 SENSOR_VP SD_DATA_0 31 SCK/CLK SCK/CLK 6 2 SDO/SD0
7 SENSOR_CAPP SD_CLK 30 SCS/CMD CLK DO
GND
C12 SENSOR_VN 8 SENSOR_CAPN SD_CMD 29 SHD/SD3 SWP/SD2 7 3 SHD/SD3
CHIP_PU 9 SENSOR_VN SD_DATA_3 28 SWP/SD2 /HOLD /WP
10 CHIP_PU SD_DATA_2 27
GND GND 270pF GPIO34 GPIO17 FLASH
VDET_1 GPIO17
4
GPIO35 11 26
C13 12pF 12 VDET_2 VDD_SDIO 25 GPIO16
GND 32K_XP GPIO16
VDD3P3_RTC
GND
1
VDD_SDIO
U4
32K_XN
GPIO25
GPIO26
GPIO27
XTAL32_IN
GPIO2
GPIO0
GPIO4
MTDO
MTMS
MTCK
NC/500pF 1uF
ESP32 U2
14
15
16
17
13
18
19
20
21
22
23
24
R3 NC/0R GPIO33
GPIO25
GPIO26
GPIO27
GPIO14
GPIO12
GPIO13
GPIO15
GPIO2
GPIO0
GPIO4
C16
0.1uF
2