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VLSI Learning Roadmap for Engineers

The document outlines the skills and knowledge required to enter the VLSI domain, highlighting various profiles such as RTL design, DFT, physical design, analog design, and memory design. Key topics include ASIC design flow, Verilog/VHDL, scripting languages, and hands-on experience with Linux/Unix tools. It emphasizes the importance of understanding specific methodologies and protocols relevant to each profile.

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H M BRUNDA
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0% found this document useful (0 votes)
24 views19 pages

VLSI Learning Roadmap for Engineers

The document outlines the skills and knowledge required to enter the VLSI domain, highlighting various profiles such as RTL design, DFT, physical design, analog design, and memory design. Key topics include ASIC design flow, Verilog/VHDL, scripting languages, and hands-on experience with Linux/Unix tools. It emphasizes the importance of understanding specific methodologies and protocols relevant to each profile.

Uploaded by

H M BRUNDA
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

WANT TO ENTER INTO

VLSI DOMAIN
TYPES OF VLSI / SEMICONDUCTOR COMPANIES
SKILLS REQUIRED
• There are different topics requires to learn for different profiles.

• Some common topics which are required for everyu vlsi profile are
as follows
ANALOG
DIGITAL ELECTRONICS
ELECTRONICS

VERILOG/VHDL APTITUDE

CMOS
LINUX/UNIX FABRICATION

BASIC C/C++ CMOS VLSI


PROGRAMMING DESIGN
GOOD UNDERSTANDING ON :

❖ ASIC DESIGN FLOW

❖ VERILOG HDL/ VHDL

RTL DESIGN AND ❖ BASICS ON SYSTEM VERILOG

VERIFICATION ❖ BULIDING VERIFICATION


PROFILE ENVIRONMENT BY USING
METHADOLOGIES LIKE UVM

❖ PROTOCOLS LIKE APB, AHB, UART, I2C


ETC

❖ HANDS ON EXPERIENCE ON
LINUX/UNIX TOOLS
GOOD UNDERSTANDING ON :

❖ ASIC DESIGN FLOW

❖ VERILOG HDL/ VHDL

❖ SCRIPTING LANGUAGES LIKE TCL ,


DFT PROFILE PERL

❖ DFT RELATED TOPICS LIKE FAULT


MODELS, FAULT COVERAGE , SCAN
CHAIN INSERTION ATGP TOOL ETC

❖ HANDS ON EXPERIENCE ON
LINUX/UNIX TOOLS
GOOD UNDERSTANDING ON :

❖ ASIC DESIGN FLOW

❖ SCRIPTING LANGUAGES LIKE TCL ,


PERL

❖ PHYSICAL DESIGN FLOW LIKE FLOOR


PLANNING,PLACEMENT,CTS,ROUTING
PD (PHYSICAL ETC

DESIGN), STA, ❖ STA TOPICS LIKE TIMING


CHECKS,TIMING MODELS,TIMING
PV(PHYSICAL PATHS,SETUP & HOLD TIME ETC
VERIFICATION) ❖ HANDS ON EXPERIENCE ON
LINUX/UNIX TOOLS

❖ DRC CHECKS,LVS CHECKS ANTENNA


CHECKS, PARASITIC EXTRACTION ETC
GOOD UNDERSTANDING ON :

❖ ANALOG DESIGN AND STA

❖ SCRIPTING LANGUAGES LIKE TCL ,


PERL

❖ IC FABRICATION STEPS

❖ RC CIRCUITS,VOLTAGE AND CURRENT


ANALOG DESIGN REFERNCE CIRCUITS

AND LAYOUT ❖ HANDS ON EXPERIENCE ON


LINUX/UNIX TOOLS
PROFILE
❖ LAYOUT DESIGN AND PHYSICAL
VERIFICATION TOOLS

❖ DRC CHECKS,LVS CHECKS ANTENNA


CHECKS, PARASITIC EXTRACTION ETC
GOOD UNDERSTANDING ON :

❖ ASIC DESIGN FLOW

❖ SCRIPTING LANGUAGES LIKE TCL ,


PERL

❖ CMOS VLSI DESIGN AND STA


MEMORY DESIGN ❖ HANDS ON EXPERIENCE ON
PROFILE LINUX/UNIX TOOLS

❖ MEMORY BASICS

❖ SRAM , DRAM MEMORY READ/WRITE


OPERATIONS AND FIFO DEPTH
THANK YOU

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