Unit 5

Memory Organization
By-
Mrs. Neha Mahajan
Memory
 Types of Memory
• Memory is primarily of three types
a. Cache Memory
b. Primary Memory/Main Memory
c. Secondary Memory
Types of Memory
 Cache Memory
• Very high speed semiconductor memory
which can speed up CPU.
• Acts Generated as a buffer between the CPU
and main memory
• Hold those parts of data and program which
are most frequently used by CPU.
• The disadvantages of cache memory are It has
limited capacity and is very expensive.
 Primary (Main) Memory
• Holds only those data and instructions on which
computer is currently working.
• Volatile memory
• Generally made up of semiconductor device. These
memories are not as fast as registers
• It is divided into two subcategories RAM and ROM.
a) Types of RAM: · Static RAM · Dynamic RAM
b) Types of ROM: · ROM · PROM · EPROM · EEPROM
 Secondary Memory
• Known as external memory or non-volatile.

• Slower than main memory

• Used for storing data/Information permanently

• CPU directly does not access these memories instead

they are accessed via input-output routines

• Known as backup memory.

• These are magnetic and optical memories

 Memory Hierarchy

In the Computer System Design, Memory Hierarchy is

an enhancement to organize the memory such that it
can minimize the access time. The Memory Hierarchy
was developed based on a program behavior known as
locality of references.
Memory Hierarchy
Memory Hierarchy
 Memory Characteristics
1. Location:

• Shows whether the location of the memory device is external

or internal to the computer.

• While the internal memory is embedded directly on the

computer motherboard, external memory is separate from the
main computer unit, in the form of a storage disk such as
disks and tapes.

• External memory devices are controlled from the I/O

controllers, while internal memory takes the form of cache
memory, registers and main memory.
 Memory Characteristics
2. Memory Capacity/ Size:
• Measure of amount of data the memory device can store.
• For internal memory, this is measured in terms of bytes, while
in external memory, it is measured in bytes or words, where a
word length may be 8,16 or 32 bits.

3. Unit of Transfer:
• Measure of the transfer rate of the data in and out of memory.
• In internal memory, this is determined by the number of
electrical lines going into and coming out of the memory with
each line carrying data of word length.
• In external memory, this is determined by the number of bits
read out or written into the memory at a time.
 Memory Characteristics
4. Access Method:
• Refers to the methods through which data is written to, and
consequently read from a memory device.
• There are four access methods which are as listed below;
➢ Direct Access Method
➢ Sequential Access Method
➢ Random Access Method
➢ Associative Access Method
➢ Direct Access Method: Every memory block is marked by a
unique address. Access is made directly by first reaching to the
vicinity and the following sequential search. An example of a
memory device that uses the direct access method is the hard
disk.
 Memory Characteristics
• Sequential Access Method: Uses a shared read-write
mechanism to sequentially access data. An example of a
storage device that uses the sequential access method is the
tape.
• Random Access Method: Each block in memory has its
unique and physically wired-in addressing mechanism. An
example of a storage device that uses the random access
method is the RAM.
• Associative Access Method: Access to data is made by
comparing the required bit location within a word based on a
specified data element. An example of a storage device that
uses the associative access method is the cache memory.
 Memory Characteristics
5. Performance:
• This a measure of overall efficiency of the memory system.
There are three parameters used to measure performance.
➢ Transfer Rate: This is the rate at which data is transmitted into
and out of memory.
➢ Memory Cycle Time: The time required to access a block in
memory as well as the period to the start of the second
access.
➢ Access Time: The time required to carry-out read or
write operation.
 Memory Characteristics
6. Physical Type:
• This is the shape and form the memory takes. There are about
four of such forms which are as listed below:

• Magnetic

• Semiconductor

• Optical

• Magneto-optical
 Memory Characteristics
7. Organization:
• The organization of a memory system generally refers to the
physical arrangement of the bits.

8. Physical Characteristics:
• This is the nature of the memory system. This can take the
forms listed below;
• Volatile
• Non-volatile
• Erasable
• Non-erasable
Comparison SRAM and DRAM
 Types of RAM and ROM
• Random Access Memory (RAM)
• RAM is one of the faster types of main memory accessed directly by the CPU.
• It is the hardware in a computer device to temporarily store data, programs or
program results.
• It is used to read/write data in memory until the machine is working. It is volatile,
which means if a power failure occurs or the computer is turned off, the
information stored in RAM will be lost.
• All data stored in computer memory can be read or accessed randomly at any
time.
• There are two types of RAM:
• SRAM
• DRAM
• DRAM: DRAM (Dynamic Random-Access Memory) is a type of RAM that is used
for the dynamic storage of data in RAM. In DRAM, each cell carries one-bit
information. The cell is made up of two parts: a capacitor and a transistor. The size
of the capacitor and the transistor is so small, requiring millions of them to store
on a single chip. Hence, a DRAM chip can hold more data than an SRAM chip of
the same size. However, the capacitor needs to be continuously refreshed to retain
information because DRAM is volatile. If the power is switched off, the data store
in memory is lost.
 Types of RAM
• SRAM: (Static Random-Access Memory) is a type of RAM used to store static data
in the memory. It means to store data in SRAM remains active as long as the
computer system has a power supply. However, data is lost in SRAM when power
failures have occurred.
• Advantages of RAM
• It is a faster type of memory in a computer.
• It requires less power to operate.
• Program loads much faster
• Disadvantages of RAM
• Less RAM reduces the speed and performance of a computer.
• Due to volatile, it requires electricity to preserve the data.
• It is expensive than ROM
• It is unreliable as compared to ROM
• The Size of RAM is limited.
Read only Memory (ROM)
• Mask ROM (MROM) chips contain a software mask that is
burned onto the chip during the design phase of the
semiconductor manufacturing process. MROM is a type
of read-only memory (ROM) whose contents are programmed
by the integrated circuit manufacturer (rather than by the user).
 Other types of ROM
• PROM (Programmable Read Only Memory):
It is a type of digital read-only memory, in which the user can write any
type of information or program only once. It means it is the empty PROM
chip in which the user can write the desired content or program only once
using the special PROM programmer or PROM burner device; after that,
the data or instruction cannot be changed or erased.
• EPROM (Erasable and Programmable Read Only Memory):
It is the type of read only memory in which stored data can be erased and
re-programmed only once in the EPROM memory. It is a non-volatile
memory chip that holds data when there is no power supply and can also
store data for a minimum of 10 to 20 years. In EPROM, if we want to erase
any stored data and re-programmed it, first, we need to pass the
ultraviolet light for 20 minutes to erase the data; after that, the data is re-
created in EPROM.
 Other types of ROM
• EEPROM (Electrically Erasable and Programmable Read Only Memory):
The EEROM is an electrically erasable and programmable read only
memory used to erase stored data using a high voltage electrical charge
and re-programmed it. It is also a non-volatile memory whose data cannot
be erased or lost; even the power is turned off. In EEPROM, the stored
data can be erased and reprogrammed up to 10 thousand times, and the
data erase one byte at a time.
• Flash ROM:
Flash memory is a non-volatile storage memory chip that can be written or
programmed in small units called Block or Sector. Flash Memory is an
EEPROM form of computer memory, and the contents or data cannot be
lost when the power source is turned off. It is also used to transfer data
between the computer and digital devices.
Comparison of types of ROM
Comparison of EPROM & EEPROM
 Cache Memory
• Cache Memory is a special and very high-speed memory.
• It acts as a buffer between RAM and the CPU.
• It holds frequently requested data and instructions so that they
are immediately available to the CPU when needed.
• Cache memory is used to reduce the average time to access
data from the Main memory.
• There are various independent caches in a CPU, which store
instructions and data.
 Cache Memory
• High speed memory kept in between processor and
RAM to increase the data execution speed.
• Kept near to the processor.
• Major reason for incorporating cache in the system is
that the CPU is much faster than the DRAM and
needs a place to store information that can be
accessed quickly.
• Cache fetches the frequently used data from the
DRAM and buffers (stores) it for further processor
usage.
 Cache Memory
• A cache is a piece of very fast memory, made from
high-speed static RAM that reduces the access time
of the data. It is very expensive and generally
incorporated in the processor, where valuable data
and program segments are kept.
 Cache Performance
• When the processor needs to read or write a location in main
memory, it first checks for a corresponding entry in the cache.
• If the processor finds that the memory location is in the cache,
a Cache hit has occurred and data is read from cache.
• If the processor does not find the memory location in the
cache, a cache miss has occurred.
• For a Cache miss, the cache allocates a new entry and copies
in data from main memory, then the request is fulfilled from
the contents of the cache.
• The performance of cache memory is frequently measured in
terms of a quantity called Hit ratio.
Hit ratio = hit / (hit + miss) = no. of hits/total accesses
We can improve Cache performance using higher cache block
size, higher associativity, reduce miss rate, reduce miss
penalty, and reduce the time to hit in the cache
 Types of Cache
• Primary Cache – A primary cache is always
located on the processor chip. This cache is small and
its access time is comparable to that of processor
registers.

• Secondary Cache – Secondary cache is placed

between the primary cache and the rest of the
memory. It is referred to as the level 2 (L2) cache.
Often, the Level 2 cache is also housed on the
processor chip
 Different Levels of Cache
• L1-cache is the fastest cache and it usually comes within the
processor chip itself. L1 cache typically ranges in size from 8KB
to 64KB and uses the high-speed SRAM instead of the slower
and cheaper DRAM used for main memory.
• L2 cache comes between L1 and RAM and is bigger than the
primary cache.
• L3 cache is not found nowadays as its function is replaced by
L2 cache. L3 caches are found on the motherboard rather
than the processor. It is kept between RAM and L2 cache.
 Locality of reference
• Since size of cache memory is less as compared to
main memory. So to check which part of main
memory should be given priority and loaded in cache
is decided based on locality of reference.
• Locality of reference refers to a phenomenon in
which a computer program tends to access same set
of memory locations for a particular time period.
• In other words, Locality of Reference refers to the
tendency of the computer program to access
instructions whose addresses are near one another.
Locality of reference
 Types of Locality of reference
• Spatial Locality of reference:
• Spatial locality means instruction or data near (close proximity) to the current
memory location that is being fetched, may be needed by the processor soon.
• This is different from the temporal locality in that we are making a guess that the
data/instructions will be needed soon.
• With temporal locality we were talking about the actual memory location that was
being fetched.
• Temporal Locality of reference:
Temporal locality means current data or instruction that is being
fetched may be needed soon. So we should store that data or
instruction in the cache memory so that we can avoid again
searching in main memory for the same data.
 Cache Coherence
• For higher performance in a multiprocessor
system, each processor will usually have its
own cache. Cache coherence refers to the
problem of keeping the data in these caches
consistent. The main problem is dealing with
writes by a processor.
• There are two general strategies for dealing
with writes to a cache:
Write Policies
 Write Policies
• Write-through - all data written to the cache is also written to
memory at the same time.
• Write-back - when data is written to a cache, a dirty bit is set
for the affected block. The modified block is written to
memory only when the block is replaced.
• Write-through caches are simpler, and they automatically deal
with the cache coherence problem, but they increase bus traffic
significantly. Write-back caches are more common where
higher performance is desired. The MSI cache coherence
protocol is one of the simpler write-back protocols.
 Cache Mapping
• Cache mapping is a technique by which the
contents of main memory are brought into the
cache memory.

• There are three different types of mapping used for

the purpose of cache memory which are as follows:
Direct mapping,

• Associative mapping, and

• Set-Associative mapping.
 Direct Mapping
In Direct mapping A particular block of main memory can map to only
one particular line of the cache.
The line number of cache to which a particular block can map is given by-
Cache line number = ( Main Memory Block Address ) Modulo
(Number of lines in Cache)
Example-
Consider cache memory is divided into ‘n’ number of lines.
Then, block ‘j’ of main memory can map to line number (j mod n)
only of the cache.
Direct Mapping
 Direct Mapping Example
• Let’s assume there is 16 word 64KW main
memory, and a 128 line Cache. Then find the
corresponding Tag, Index and word bits in
direct mapping.
✓ 128 lines Cache = 128 blocks in cache
✓Also, no. of blocks in M. M = 64Kw/ 16 W = 4K
✓No. of bits required for addressing M.M. is 216
= 64Kw
 Direct Mapping

• Cache line no.= (MM block) Mod (no. of lines in the cache)
Direct Mapping
Direct Mapping
 Associative Mapping
• A main memory block can load into any line of cache that is
freely available at that moment.
• This makes fully associative mapping more flexible than direct
mapping.
• Memory address is interpreted as tag and word
• Tag uniquely identifies block of memory
• Every line’s tag is examined for a match
• Cache searching gets expensive
Associative Mapping
 K- way Set Associative Mapping

•In Set associative mapping, Cache lines are

grouped into sets where each set contains k
number of lines.
•A particular block of main memory can map to
only one particular set of the cache.
•However, within that set, the memory block can
map any cache line that is freely available.
 K- way Set Associative Mapping
• How to select set no.?

Cache set number = ( Main Memory Block Number ) Modulo (Number of

sets in Cache)
K- way Set Associative Mapping
 Set Associative addressing example-1
1. Consider a 2-way set associative mapped cache of size 16
words with block size 4 words. The size of main memory is 128
words. Find-
• Number of bits in tag
• Tag directory size
Answer
Given-
• Set size = 2
• Cache memory size = 16 words
• Block size = Frame size = Line size = 4 words
• Main memory size = 128 words with block size of 4 words
 Set Associative addressing example
Number of Bits in Physical Address-
We have,
• Size of main memory = 128 words = 27
Thus, Number of bits in physical address = 7 bits

Number of Bits in Block Offset-

We have,
Block size = 4 words = 22
Thus, Number of bits in block offset = 2 bits
 Set Associative addressing example

• Number of Lines in Cache-

• Total number of lines in cache = Cache size / Line size

= 16 words / 4 words = 4 lines

Thus, Number of lines in cache = 4 lines

• Number of Sets in Cache-

• Total number of sets in cache

= Total number of lines in cache / Set size

= 4 / 2 = 2 sets = 21 sets

Thus, Number of bits in set number = 1 bit

 Set Associative addressing example
• Number of Bits in Tag-
Number of bits in tag
= Number of bits in physical address – (Number of bits in set number
+ Number of bits in block offset)
= 7 bits – (1 bit + 2 bits)
= 7 bits – 3 bits = 4 bits
Thus, Number of bits in tag = 4 bits
 Set Associative addressing example

Tag directory size

= Number of lines in cache x Number of bits in tag

= 4 x 4 bits = 16 bits = 2 bytes

Thus, size of tag directory = 2 bytes

 Set Associative addressing example-2
2. Consider a 2-way set associative mapped cache of size 16 KB
with block size 256 bytes. The size of main memory is 128 KB.
Find-
• Number of bits in tag
• Tag directory size
Answer
Given-
• Set size = 2
• Cache memory size = 16 KB
• Block size = Frame size = Line size = 256 bytes
• Main memory size = 128 KB
 Set Associative addressing example
Number of Bits in Physical Address-
We have,
• Size of main memory = 128 KB = 217 bytes
• Thus, Number of bits in physical address = 17 bits

Number of Bits in Block Offset-

We have,
Block size = 256 bytes = 28 bytes
Thus, Number of bits in block offset = 8 bits
 Set Associative addressing example
• Number of Lines in Cache-

• Total number of lines in cache = Cache size / Line size

= 16 KB / 256 bytes = 214 bytes / 28 bytes = 64 lines

Thus, Number of lines in cache = 64 lines

• Number of Sets in Cache-

• Total number of sets in cache = Total number of lines in cache

/ Set size = 64 / 2 = 32 sets = 25 sets

Thus, Number of bits in set number = 5 bits

Set Associative addressing example
 Set Associative addressing example

Tag directory size

= Number of lines in cache x Number of bits in tag

= 64 x 4 bits = 256 bits = 32 bytes

Thus, size of tag directory = 32 bytes

 Set Associative addressing University example-3

3.Q- Consider a 4 – way set associative mapped cache

with block size 4 KB . The Size of the main memory is 16
GB and there are 10 bits in the tag.
Find –
Size of Cache Memory and
Tag directory size
Solution-
Given-
Set size = 4,
Block size = Frame size = Line size = 4 KB,
Main memory size = 16 GB,
Number of bits in tag = 10 bits
We consider that the memory is byte addressable.
• Number of Bits in Physical Address-
• We have, Size of main memory = 16 GB = 234
bytes
• Thus, Number of bits in physical address = 34
bits
• Number of Bits in Set Number-
Number of bits in set number = Number of bits in physical
address – (Number of bits in tag + Number of bits in block
offset)
= 34 bits – (10 bits + 12 bits) = 34 bits – 22 bits = 12 bits
Thus, Number of bits in set number = 12 bits

• Number of Sets in Cache-

We have- Number of bits in set number = 12 bits

Thus, Total number of sets in cache = 212 sets

• Number of Lines in Cache-
We have-
Total number of sets in cache = 212sets
Each set contains 4 lines
Thus,
Total number of lines in cache = Total number of
sets in cache x Number of lines in each set
= 212 x 4 lines = 214 lines
• Size of Cache Memory-

Size of cache memory = Total number of lines in

cache x Line size
= 214 x 4 KB = 216 KB = 64 MB
Thus, Size of cache memory = 64 MB
• Tag Directory Size-

Tag directory size = Number of tags x Tag size

= Number of lines in cache x Number of bits in
tag
= 214 x 10 bits = 163840 bits
= 20480 bytes = 20 KB
Thus, size of tag directory = 20 KB
 Set Associative addressing example
• A computer uses 32-bit byte addressing. The computer uses a
2-way associative cache with a capacity of 32KB. Each cache
block contains 16 bytes. Calculate the number of bits in the
TAG, SET, and OFFSET fields of a main memory address.
Answer
• Since there are 16 bytes in a cache block, the OFFSET field
must contain 4 bits (24 = 16).
• To determine the number of bits in the SET field, we need to
determine the number of sets. Each set contains 2 cache
blocks (2-way associative) so a set contains 32 bytes. There
are 32KB bytes in the entire cache, so there are 32KB/32B =
1K sets. Thus the set field contains 10 bits (2 10 = 1K).
• Finally, the TAG field contains the remaining 18 bits