SE422 - Assignment
OPAMP Design
23/04/2024
1 Introduction
Previously, we designed and implemented a comparator, an electronic circuit that produces an output signal
with the same sign as the difference between both inputs. An operational amplifier (or OPAMP) is a difference
amplifier with a very high gain, so we could use a comparator as an OPAMP since a comparator has a very high
+ −
gain when vin ≈ vin . However, an OPAMP is mostly used in feedback: part of the output is fed back and applied
to the input(s). This is a problem for a comparator, because we don’t control the phase shift that a signal with
an arbitrary frequency f undergoes when traveling through the device.
2 Miller Compensation
Suppose we have an OPAMP with frequency response A(f ). We want to guarantee that the phase shift that
amplified signals undergo - thus when |A(f )| ≥ 1 - is not higher than some critical threshold ϕc . This avoids
unstable behavior of the amplifier - like high overshoots or rapid oscillations. This critical threshold is defined as
function of the phase margin ∆φm : the difference between the actual phase shift and 180◦ . Conventionally, we
choose ∆φm = 68◦ for the frequency fc where |A(f )| = 1. fc corresponds to the gain-bandwidth (GBW). This
is visualized in figure 1a.
(b) OPAMP
(a) Phase Margin
A comparator has two nodes that determine its behavior, namely those where the impedance to ground is
high. These are the outputs of stages I and II. These nodes each have an associated pole pnd = RI1CI for the
output node of the first stage, and pd = RII1CII for the second stage, where CII is the load capacitance CL . We
also call these poles the non-dominant and the dominant pole, respectively.
In order to control the position of these poles, and thus the phase margin, we add a so-called Miller capacitor CS
to the comparator circuit - as you can see in figure 1b. By doing this, the two poles move and we also introduce
a zero:1
pd ≈ 1
CS gm,II RI RII ,
1 While computing these expressions, we neglected the parasitic capacitances. For this hypothesis to hold, the transistors should
be small enough. Hence, choose a small transistor length L and set W accordingly.
1
gm,II
pnd ≈ CII ,
gm,II
z= CS
3 OPAMP Design Procedure
To obtain a phase margin of 68°, we must set pnd ≈ 2.2 GBW. At the same time, we want to reduce the impact
of the zero, by setting z ≈ 10 GBW.
A typical OPAMP design follows then the template below:
1. Given are: load CL (= CII ) and the GBW.
2. Determine CS : CS = 0.22 CII ,
3. Determine gm1 : gm1 = GBW × CS , 2 ,
4. Determine gm6 : gm6 = 10 gm1 ,
5. For each transistor Mx , choose an appropriate value for VDS,Sat and determine the currents I1 and I6 based
on the value of the transconductance.
W
6. With I1 = I2 = I3 = I4 , I5 = 2I1 and I7 = I6 , determine the transistor sizes L .
4 Assignment
Given:
The supply voltage VDD = 5 V, and
Group Number Load Capacitance CL Gain Bandwidth
1 100 pF 1 MHz
2 150 pF 10 MHz
3 200 pF 1 MHz
4 250 pF 10 MHz
5 300 pF 1 MHz
6 500 pF 10 MHz
7 1000 pF 1 MHz
8 2000 pF 10 MHz
9 2500 pF 1 MHz
10 5000 pF 10 MHz
Questions: In your report, provide an answer (and additional comments if deemed necessary) to (at least)
these questions:
1. Compute CS and the currents in all branches
2. Compute the sizes of the transistors
3. Implement the circuit in LTSPICE
4. Perform a .dc sweep over vip , while keeping vin = 2.5V
5. Perform the same .dc sweep while stepping over different values of vin .
6. Put the device in unity-gain configuration and sweep vip .
7. Determine the gain-bandwidth and phase margin by doing an .ac sweep (1 Hz → 100 GHz). If needed,
adjust the value of CS .
8. Apply a step to the input of the device in unity-gain configuration, step over CS and observe the step
response.
9. Measure the output impedance of the OPAMP without feedback and with unity gain feedback.
Summarize your results with the necessary figures in a written report. If any of your results deviate from what
was expected, comment and try to explain. The report must be in pdf format and can not contain more then 5
pages. Upload your report NLT 17/05/2024 on BelADL.
2 GBW must be in pulsations/sec, not in Hz