STP40NF03L
N - CHANNEL 30V - 0.020 - 40A TO-220
STripFET POWER
MOSFET
TYPE VDSS RDS(o n) ID
STP40NF03L 30 V < 0.022 40 A
■ TYPICAL RDS(on) = 0.020
■
LOW THRESHOLD DRIVE
DESCRIPTION
This Power MOSFET is the latest development of
STMicroelectronics unique ”Single Feature
Size” strip-based process. The resulting 3
transistor shows extremely high packing density 2
1
for low on-resistance, rugged avalanche
characteristics and less critical alignment steps
therefore a remarkable manufacturing TO-220
reproducibility.
APPLICATIONS
■
HIGH CURRENT, HIGH SPEED SWITCHING
■
SOLENOID AND RELAY DRIVERS
INTERNAL SCHEMATIC DIAGRAM
■
MOTOR CONTROL, AUDIO AMPLIFIERS
■
DC-DC & DC-AC CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VDS Drain- source Voltage (VGS = 0) 30 V
VDGR Drain- gate Voltage (RGS = 20 k) 30 V
VGS Gate-source Voltage 20 V
o
ID Drain Current ( continuous) at Tc = 25 C 40 A
ID Drain Current ( continuous) at Tc = 100 oC 28 A
IDM( Drain Current ( pulsed) 160 A
Ptot Total Dissipation at Tc = 25 oC 70 W
Derating Factor 0.46 W/oC
EAS (1) Single Pulse Avalanche Energy 250 m/ J
o
Tstg Storage Temperature -65 to 175 C
o
Tj Max. Operating Junction Temperature 175 C
( Pulse width limited by safe operating area ( 1 starting Tj = 25 oC, ID =20A , VDD = 15V
October 1999 1/8
STP40NF03L
THERMAL DATA
o
Rthj -case Thermal Resistance Junction-case Max 2. 1 C/W
o
Rthj -amb Thermal Resistance Junction-ambient Max 62. C/W
Tl Maximum Lead Temperature For Soldering Purpose 5 o
C
300
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source ID = 250 A VGS = 0 30 V
Breakdown Voltage
IDSS Zero Gate Voltage VDS = Max Rating 1 A
Drain Current (VGS = 0) VDS = Max Rating Tc =125 oC 10 A
IGSS Gate-body Leakage VGS = 20 V nA
100
Current (VDS = 0)
ON ()
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS = VGS ID = 250 A 1 1.7 2. 5 V
R DS(on) Static Drain-source On VGS = 10 V ID = 20 A 0.018 0.022
Resistance VGS = 4. 5 V ID = 20 A 0.028 0.035
ID(o n) On State Drain Current VDS > ID(o n) x RDS(on )max 40 A
VGS = 10 V
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs () Forward VDS > ID(o n) x RDS(on )max ID =20 A 20 S
Transconductance
Ciss Input Capacitance VDS = 25 V f = 1 MHz VGS = 0 830 pF
Cos s Output Capacitance 230 pF
Crss Reverse Transfer 92 pF
Capacitance
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STP40NF03
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t d(on) Turn-on Delay Time VDD = 15 V ID = 20 A 35 ns
tr Rise Time RG = 4.7 VGS = 4.5 V 205 ns
(Resistive Load, see fig. 3)
Qg Total Gate Charge VDD = 24 V ID = 40 A VGS = 5 V 18 23 nC
Q gs Gate-Source Charge 7 nC
Qgd Gate-Drain Charge 8 nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(of f) Turn-off Delay Time VDD = 15 V ID = 20 A 90 ns
tf Fall Time RG = 4.7 VGS = 4.5 V 240 ns
(Resistive Load, see fig. 3)
td(of f) Off-voltage Rise Time Vclamp = 24 V ID = 20 A 150 ns
tf Fall Time RG = 4.7 VGS = 4.5 V 155 ns
tc Cross-over Time (Inductive Load, see fig. 5) 340 ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD Source-drain Current 40 A
ISDM Source-drain Current 160 A
()
(pulsed)
VSD () Forward On Voltage ISD = 40 A VGS = 0 1. 5 V
trr Reverse Recovery ISD = 40 A di/dt = 100 A/s 65 ns
Time VDD = 15 V Tj = 150 oC
Qrr Reverse Recovery (see test circuit, fig. 5) 72 nC
Charge
IRRM Reverse Recovery 2 A
Current
() Pulsed: Pulse duration = 300 s, duty cycle 1.5 %
() Pulse width limited by safe operating area
Safe Operating Area Thermal Impedance
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STP40NF03L
Output Characteristics Transfer Characteristics
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
4/8
STP40NF03
Normalized Gate Threshold Voltage vs Normalized On Resistance vs Temperature
Temperature
Source-drain Diode Forward Characteristics
5/8
STP40NF03L
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Fig. 4: Gate Charge test Circuit
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/8
STP40NF03
TO-220 MECHANICAL DATA
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
E
A
D
C
L2
F
H
G
Dia.
F
F
L5
L9
L7
L6 L4
P011C
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STP40NF03L
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of use of such information nor for any infringement of patents or other rights of third parites which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all informaiton previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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