Chapter-3
Operational Amplifier
Nebiyu Tenaye
Addis Ababa University
Addis Ababa Institute of Technology
School of Electrical & Computer Engineering
Applied Electronics -II
ECEG-3112
May, 2017
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Overview
Overview I
1 Overview
2 Objective
3 Introduction
4 The Ideal Op Amp
The Op Amp Terminals
Function and Characteristics of the Ideal Op Amp
5 The Inverting Configuration
Closed-Loop Gain
Effect of Finite Open-Loop Gain
Input and Output Resistances
An Important Application - The Weighted Summer
6 The Non-inverting Configuration
The Closed-Loop Gain
Effect of Finite Open-Loop Gain
Application - The Voltage Follower
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Overview
Overview II
7 Difference Amplifiers
A Single-Op-Amp Difference Amplifier
The Instrumentation Amplifier
8 Integrators and Differentiators
The Inverting Integrator
The Op-Amp Differentiator
9 DC Imperfections
Offset Voltage
Input Bias and Offset Currents
10 Frequency Response
Frequency Dependence of the Open-Loop Gain
Frequency Response of Closed-Loop Amplifiers
11 Large-Signal Operation of Op Amps
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Objective
Chapter Objectives
In this chapter you will learn the following:
The ideal operational amplifier,
The different configurations of op-amps, and
Frequency response and large signal operations of op-amps.
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Introduction
Introduction
The operational amplifier (Op amps) have been in use for a long
time, their initial applications being primarily in the areas of
analog computation and sophisticated instrumentation.
Early op amps were constructed from discrete components
(vacuum tubes and then transistors, and resistors).
The introduction of integrated circuit (IC) reduced the cost and
improved the performance.
One of the reasons for the popularity of the op amp is its
versatility.
IC op amp has characteristics that closely approach the assumed
ideal.
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The Ideal Op Amp The Op Amp Terminals
The Op Amp Terminals
From a signal point of view the op amp has three terminals: two input
terminals (1 and 2) and one output terminal (3).
Most IC op amps require two dc power supplies, as shown in two termi-
nals, 4 and 5, are brought out of the op-amp package and connected to
a positive voltage VCC and a negative voltage −VEE , respectively.
Some times other terminals can include terminals for frequency compen-
sation and terminals for offset nulling.
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The Ideal Op Amp Function and Characteristics of the Ideal Op Amp
Function and Characteristics of the Ideal Op Amp
Op amp is designed to sense the difference between the voltage signals
applied at its two input terminals and multiply this by a number A.
v3 = A(v2 − v1 )
Characteristics of the Ideal Op Amp
Infinite input impedance
Zero output impedance
Zero common-mode gain or, equivalently, infinite common-mode
rejection
Infinite open-loop gain A
Infinite bandwidth
Question: But, is an amplifier with infinite gain of any use?
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The Ideal Op Amp Function and Characteristics of the Ideal Op Amp
An amplifiers input is composed of two components
differential input (vId ) - is difference between inputs at inverting and
non-inverting terminals
vId = v2 − v1
common-mode input (vIcm ) - is input present at both terminals
1
vIcm = (v2 + v1 )
2
The input signals v1 and v2
v1 = vIcm − vId /2 and v2 = vIcm + vId /2
Similarly, two components of gain exist
differential gain (A) - gain applied to differential input ONLY
common-mode gain (Acm ) - gain applied to CM input ONLY
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The Ideal Op Amp Function and Characteristics of the Ideal Op Amp
Figure 2: Input signals in terms
Figure 1: Equivalent circuit of the ideal of differential and
op amp. common-mode components.
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The Inverting Configuration
The Inverting Configuration
Op amps are not used alone; rather, the op amp is connected to passive
components in a feedback circuit.
There are two such basic circuit configurations employing an op amp
and two resistors: the inverting configuration and the noninverting con-
figuration
Figure 3: The inverting closed-loop configuration.
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The Inverting Configuration Closed-Loop Gain
Closed-Loop Gain
Assuming an ideal op amp. How to analyze closed-loop gain for inverting
configuration of an ideal op-amp?
Step 1 Begin at the output terminal
Step 2 If vo is finite , then the voltage between the op-amp input termi-
nals should be negligibly small and ideally zero.
vo
v2 − v1 = = 0 , because A is ∞
A
A virtual short circuit between v1 and v2 .
A virtual ground exist at v1 .
Step 3 Define current in to inverting input (i1 ).
vI − v1 vI − 0 vI
i1 = = =
R1 R1 R1
Step 4 Determine where this current flows?
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The Inverting Configuration Closed-Loop Gain
It cannot go into the op amp, since infinite input impedance draws zero
current. i1 will have to flow through R2 to the low-impedance terminal
3.
Step 5 Define vo in terms of current flowing across R2 .
vI R2 R2
vo = v1 − i1 R2 = 0 − R2 = − vI G=−
R1 R1 R1
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The Inverting Configuration Effect of Finite Open-Loop Gain
Effect of Finite Open-Loop Gain
How does the gain expression change if open loop gain (A) is not assumed
to be infinite?
One must employ analysis similar to the previous.
The voltage at v1 becomes
vo vo
v2 − v1 = v1 = −
A A
The current i1 becomes
vI − v1 vI + vAo
i1 = =
R1 R1
The output voltage vo becomes
R2
!
vo vI + vAo 1+ R1 R2
vo = v1 − i1 R2 = − − R2 vo 1+ = −v1
A R1 A R1
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The Inverting Configuration Effect of Finite Open-Loop Gain
The Gain will be
vo −R /R
GA<∞ = = 2 1
vi 1 + R2 /R1
1+
A
Figure 5: Analysis of the inverting configuration taking into account the finite
open-loop gain of the op amp.
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The Inverting Configuration Input and Output Resistances
Input and Output Resistances
The Input Resistance is
vi vi vi
Ri = = = = R1
ii (vi − v1 )/R1 vi /R1
For a Voltage amplification Ri must be large. Then the gain would
be reduced, so such configuration suffers from low Ri . Consider the
following circuit and find the expression of the closed loop gain
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The Inverting Configuration Input and Output Resistances
The closed loop gain
vo R2 R4 R4
=− 1+ +
vi R1 R2 R3
It can be seen a higher Ri can be achieved without compromising the
closed loop gain.
Since the output of the inverting configuration is taken at the termi-
nals of the ideal voltage source A(v2 − v1 ), it follows that the output
resistance of the closed-loop amplifier is zero.
Ro = 0
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The Inverting Configuration An Important Application - The Weighted Summer
An Important Application - The Weighted Summer
Weighted Summer - is a closed-loop amplifier configuration which pro-
vides an output voltage which is weighted sum of the inputs.
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The Non-inverting Configuration
The Non-inverting Configuration
The input signal vI is applied directly to the positive input terminal of
the op amp while one terminal of R1 is connected to ground.
Then the polarity / phase of the output is same as input.
Figure 6: The noninverting configuration.
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The Non-inverting Configuration The Closed-Loop Gain
The Closed-Loop Gain
For an ideal case the closed-loop gain by using the previous methods.
vo R2
=1+
vi R1
Figure 7: The non-inverting configuration.
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The Non-inverting Configuration Effect of Finite Open-Loop Gain
Effect of Finite Open-Loop Gain
Assuming the op amp to be ideal except for having a finite open-loop
gain A. The closed-loop gain
vo 1 + R2 /R1
GA<∞ = =
vi 1 + R2 /R1
1+
A
For
R2
A1+
R1
the closed-loop gain can be approximated by the ideal value.
The percentage error in G resulting from the finite op-amp gain A as
1 + R2 /R1
Percentage gain error = −
A + 1 + (R2 /R1 )
The input impedance Ri of this closed-loop amplifier is ideally infinite,
since no current flows into the positive input terminal of the op amp.
The output is taken at the terminals of the ideal voltage source thus the
output impedance Ro of the non-inverting configuration is zero.
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The Non-inverting Configuration Application - The Voltage Follower
The Voltage Follower
The property of high input impedance is a very desirable feature
of the noninverting configuration.
It enables using this circuit as a buffer amplifier to connect a
source with a high impedance to a low-impedance load. Buffer
amplifier is not required to provide any voltage gain
This circuit is commonly referred to as a voltage follower, since the
output “follows” the input.
Figure 8: a) The unity-gain buffer or follower amplifier. (b) Its equivalent
circuit model.
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Difference Amplifiers
Difference Amplifiers
A difference amplifier is one that responds to the difference between
the two signals applied at its input and ideally rejects signals that are
common to the two inputs.
Ideally, the amp will amplify only the differential signal (vId ) and
reject completely the common-mode input signal (vIcm ). However,
a practical circuit will behave as below
vo = Ad vId + Acm vIcm
The efficacy of a differential amplifier is measured by the degree of its
rejection of common-mode signals in preference to differential signals.
|Ad |
CM RR = 20 log
Acm
Question: The op amp is itself a difference amplifier; why not just use
an op amp?
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Difference Amplifiers
Difference Amplifiers
A difference amplifier is one that responds to the difference between
the two signals applied at its input and ideally rejects signals that are
common to the two inputs.
Ideally, the amp will amplify only the differential signal (vId ) and
reject completely the common-mode input signal (vIcm ). However,
a practical circuit will behave as below
vo = Ad vId + Acm vIcm
The efficacy of a differential amplifier is measured by the degree of its
rejection of common-mode signals in preference to differential signals.
|Ad |
CM RR = 20 log
Acm
Question: The op amp is itself a difference amplifier; why not just use
an op amp? very high (ideally infinite) gain of the op amp
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Difference Amplifiers A Single-Op-Amp Difference Amplifier
A Single-Op-Amp Difference Amplifier
Analyzing the difference amplifier below using superposition.
R2 R4 R2
vo1 = − vI1 vo2 = 1+ vI2
R1 R3 + R4 R1
We have to make the two gain magnitudes equal in order to reject
common-mode signals.
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Difference Amplifiers A Single-Op-Amp Difference Amplifier
R2 R4 R2
= 1+
R1 R3 + R4 R1
R2 /R1 R4 R4 /R3
= =
1 + R2 /R1 R3 + R4 1 + R4 /R3
The condition is obtained when
R2 R4
=
R1 R3
Assuming the condition is satisfied, the output voltage
R2
vo = (vI2 − vI1 )
R1
In addition to rejecting common-mode signals, a difference amplifier is
usually required to have a high input resistance. Assuming R4 = R2 and
R3 = R1 and applying a differential input.
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Difference Amplifiers A Single-Op-Amp Difference Amplifier
vId = R1 iI + 0 + R1 iI
Thus
vId
RId = = 2R1
iI
Note that if the amplifier is required to have a large differential gain (R2 /R1 ),
then R1 of necessity will be relatively small and the input resistance will be
correspondingly low, a drawback of this circuit.
Another drawback of the circuit is that it is not easy to vary the differential
gain of the amplifier.
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Difference Amplifiers The Instrumentation Amplifier
The Instrumentation Amplifier
The low-input-resistance problem can be solved by using voltage
followers to buffer the two input terminals. But why not get some
voltage gain.
Solution: using a Non-inverting Op Amp.
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Difference Amplifiers The Instrumentation Amplifier
The output vo
R4 R2
vo = 1+ (vI2 − vI1 )
R3 R1
The Advantages are
very high input resistance
high differential gain
symmetric gain (assuming that A1 and A2 are matched)
The Disadvantage
Ad and Acm are equal in first stage - meaning that the
common-mode and differential inputs are amplified with equal gain
need for matching - if two op amps which comprise stage 1 are not
perfectly matched, one will see unintended effects
The Solution is to disconnect the two resistors (R1 ) connected to node
X from ground and connecting them together.
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Difference Amplifiers The Instrumentation Amplifier
For a differential input applied the gain would remain the same. For
a common mode input voltage vIcm an equal voltage appears at the
negative input terminals of A1 and A2 , causing the current through 2R1
to be zero. Thus vo1 and vo2 will be equal to the input. Thus the first
stage no longer amplifies vIcm .
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Integrators and Differentiators The Inverting Integrator
The Inverting Integrator
By placing a capacitor in the feedback path and a resistor at the input, we
obtain the circuit of below. We shall now show that this circuit realizes the
mathematical operation of integration. Let the input be a time-varying function
vI (t).
The transient description
Zt
1
vO (t) = − vI (t)dt − vO (t0 )
CR
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Integrators and Differentiators The Inverting Integrator
The steady-state description
Vo (s) 1
=−
Vi (s) sCR
Thus the integrator transfer function has magnitude of 1/ωCR and phase
φ = +90◦
This configuration also known as a Miller integrator has a disadvan-
tage.
At ω = 0, the magnitude of the integrator transfer function is
infinite. This indicates that at dc the op amp is operating with an
open loop.
Solution: By placing a very large resistor in parallel with the capacitor,
negative feedback is employed to make dc gain “finite”.
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Integrators and Differentiators The Inverting Integrator
The integrator transfer function becomes
Vo (s) RF /R
=−
Vi (s) 1 + sCRF
The lower the value we select for RF , the higher the corner frequency will
be and the more nonideal the integrator becomes. Thus selecting a value
for RF presents the designer with a trade-off between dc performance
and signal performance.
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Integrators and Differentiators The Op-Amp Differentiator
The Op-Amp Differentiator
Interchanging the location of the capacitor and the resistor of the integrator
circuit results in the circuit which performs the mathematical function of dif-
ferentiation.
The transient description
dvI (t)
vO (t) = −CR
dt
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Integrators and Differentiators The Op-Amp Differentiator
The steady-state description
Vo (s)
= −sCR
Vi (s)
Thus the integrator transfer function has magnitude of ωCR and phase
φ = −90◦
This configuration as a differentiator has a disadvantage.
Differentiator acts as noise amplifier, exhibiting large changes in
output from small (but fast) changes in input. As such, it is rarely
used in practice.
When the circuit is used, it is usually necessary to connect a small-valued
resistor in series with the capacitor. This modification, unfortunately,
turns the circuit into a nonideal differentiator.
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DC Imperfections Offset Voltage
Offset Voltage
Now we consider some of the important nonideal properties of the op amp.
What happens If the two input terminals of the op amp are tied together and
connected to ground.
Ideally since vid = 0, we expect vO = 0
In practice a finite dc voltage exists at the output.
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DC Imperfections Offset Voltage
The causes of VOS is unavoidable mismatches in the differential stage of
the op amp. It is impossible to perfectly match all transistors.
General-purpose op amps exhibit VOS in the range of 1 mV to 5 mV.
Also, the value of VOS depends on temperature.
Analysis to determine the effect of the op-amp VOS on their performance
is the same for both inverting and the noninverting amplifier configura-
tions.
R2
VO = VOS 1 +
R1
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DC Imperfections Offset Voltage
How to reduced Offset Voltage
offset nulling terminals A variable resistor (if properly set) may be used to
reduce the asymmetry present and, in turn, reduce offset.
capacitive coupling A series capacitor placed between the source and op amp
may be used to reduce offset, although it will also filter out dc
signals.
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DC Imperfections Input Bias and Offset Currents
Input Bias and Offset Currents
In order for the op amp to operate, its two input terminals have to be
supplied with dc currents, termed the input bias currents, IB .
IB1 + IB2
IB =
2
IOS = |IB1 − IB2 |
input offset currents, IOS - the difference between bias current at both
terminals.
The resulting output voltage
VO = IB1 R2 u IB R2
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DC Imperfections Input Bias and Offset Currents
To reduce the value of the output dc voltage due to the input bias currents,
logically it is ↓ R2 but higher R2 needed for gain.
The solution is introducing a resistance R3 in series with the noninverting input.
The output voltage when calculated
VO = −IB2 R3 + R2 (IB1 − IB2 R3 /R1 )
Assuming IB1 = IB2 = IB
VO = IB [R2 − R3 (1 + R2 /R1 )]
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DC Imperfections Input Bias and Offset Currents
Thus we can reduce VO to zero by selecting R3 such that
R2 R1 R2
R3 = =
1 + R2 /R1 R1 + R2
We conclude that to minimize the effect of the input bias currents, one
should place in the positive lead a resistance equal to the equivalent dc
resistance seen by the inverting terminal.
This is the case for op amps constructed using bipolar junction transis-
tors (BJTs). Those using MOSFETs in the first (input) stage do not
draw an appreciable input bias current; nevertheless, the input terminals
should have continuous dc paths to ground.
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Frequency Response Frequency Dependence of the Open-Loop Gain
Frequency Dependence of the Open-Loop Gain
The differential open-loop gain A of an op amp is not infinite; rather, it is finite
and decreases with frequency.
It is high at dc, but falls off at a rather low frequency.
Internal compensation - is the presence of internal passive components
(caps) which cause op-amp to demonstrate STC low-pass response.
Frequency compensation - is the process of modifying the open-loop gain
to increase stability.
Figure 9: Open-loop gain of a general-purpose internally compensated op amp.
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Frequency Response Frequency Dependence of the Open-Loop Gain
The gain of an internally compensated op-amp may be expressed as
shown below
A0
The transfer function in Laplace domain: A(s) =
1 + s/ωb
A0
The transfer function in Frequency domain: A(ω) =
1 + ω/ωb
A0 ωb
The transfer function for high frequnecy: A(ω) ≈
ω
A 0 ωb ωt
Magnitude gain for high frequnecy: |A(ω)| ≈ =
ω ω
Unity gain occurs at ωt ωt = A 0 ωb
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Frequency Response Frequency Response of Closed-Loop Amplifiers
Frequency Response of Closed-Loop Amplifiers
The effect of limited op-amp gain and bandwidth on the closed-loop
transfer functions of the inverting configurations.
Step 1 Define closed-loop gain of an inverting amplifier with finite open-
loop gain (A)
Vo −R2 /R1
=
Vi 1 + (1 + R2 /R1 )/A
Step 2 Insert frequency-dependent description of A
Vo −R2 /R1 −R2 /R1
= =
Vi 1 + R2 /R1 1+ 1+R 2 /R1
+ s 1+R2 /R1
1+ A0 ωb A0
A0
1 + s/ωb
Step 3 Assume A0 1 + R2 /R1
Vo −R2 /R1
=
Vi 1 + s(1+Rωt2 /R1 )
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Frequency Response Frequency Response of Closed-Loop Amplifiers
By using the same methods the effect of limited op-amp gain and band-
width on the closed-loop transfer functions of the noninverting configu-
rations.
Vo 1 + R2 /R1
=
Vi 1 + s(1+Rωt2 /R1 )
3dB frequency - is the frequency at which the amplifier gain is attenuated
3dB from maximum (aka. dc value).
ωt
ω3dB =
1 + R2 /R1
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Large-Signal Operation of Op Amps
Large-Signal Operation of Op Amps
The following are limitations on the performance of op-amp circuits when
large output signals are present.
1 Output Voltage Saturation
Op amps operate linearly over a limited range of output voltages. If
supply voltage +/- 15V is vO will saturate around +/- 13V.
2 Output Current Limits
Another limitation on the operation of op amps is that their output
current is limited to a specified maximum. If the circuit requires a
larger current, the op-amp output voltage will saturate at the level
corresponding to the maximum allowed output current.
3 Slew Rate
Slew Rate is the maximum rate of change possible at the output of a
real op amp.
dvo
SR = max
dt
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Large-Signal Operation of Op Amps
If slew rate is less than rate of change of input it becomes problematic.
Slewing occurs because the bandwidth of the op-amp is limited, so the
output at very high frequencies is attenuated.
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Large-Signal Operation of Op Amps
4 Full-Power Bandwidth
Op-amp slew-rate limiting can cause nonlinear distortion in
sinusoidal waveforms.
Assume a unity-gain follower with a sine-wave input
vI = Vi sin ωt
The rate of change
dvI
= ωVi cos ωt
dt
Now if ωVi exceeds the slew rate of the op amp, the output
waveform will be distorted in the manner shown.
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Large-Signal Operation of Op Amps
Full-power bandwidth (fM ) is the frequency at which an output sinusoid
with amplitude equal to the rated output voltage of the op amp begins
to show distortion due to slew-rate limiting.
SR
SR = ωM VoM ax fM =
2πVoM ax
Maximum output voltage (VoM ax ) - is equal to (AvI ).
Output sinusoids of amplitudes smaller than VoM ax will show
slewrate distortion at frequencies higher than fM
At a frequency ω higher than fM , the maximum amplitude of the
undistorted output sinusoid is
ω
M
Vo = VoM ax
ω
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Large-Signal Operation of Op Amps
Questions?
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