SECTION -A (ATTtMPT AU QUESTIONS) 20
1 A Define the term Computer architecture and Computer organization. 2
8 Why is a Harvard architecture computer faster? Justify. 2
C Show the following conditional control statements by two register transfer statements 2
with control functions.
If (P=l) then (RH-- R2) else if (Q=l) then (RH--R3)
D Register A holds the binary values 10011101. What is the register value after 2
arithmetic shift right? Starting from the initial number 10011101, determine the
re2ister value after arithmetic shift left, and state whether there is an overflow.
E Illustrate the different types of instruction formats. 2
F What is the significance of control word in register organization? 2
G Exolain the term cvcle stealin2. 2
H Comoare oro2rammed 1/0 with interruot initiated 1/0. 2
I Describe associative memory. List the advantages and disadvantages of associative 2
memorv.
J Calculate the number of 128 • 8 RAM chips that are needed to provide a memory 2
capacity of 2048 bytes.
SECTION -8 (ATTEMPT ANY FIVE QUESTIONS) 30
2 A Describe the function of data register, address register, accumulator and program 6
counter.
8 Draw the diagram of a bus system in which it uses 3 state buffers and a decoder 6
instead of the multiplexers.
C Discuss the IEEE-754 standard floating-point representation with diagram. 6
D Write a program to evaluate arithmetic expression using stack organized computer 6
with 0-address instructions.
X =(A-Bl • (((C - D • El/ Fl/ GI
E What are the different methods of asynchronous data transfer? Explain in detail. 6
F Demonstrate 2.5 DRAM with suitable diuram. 6
SECTION -C (ATTEMPT ANY ONE PART FROM EACH QUESTION) 50
3 A Explain in detail four registers bus organization with the help of a diagram. 10
8 Show the multiplication process using Booth algorithm, when the following binary 10
numbers, (+13) x (·15) are multiplied.
4 A Describe Neumann architecture with diagram in detail. 10
8 Explain system bus in detail with its components. Why do we need bus? 10
5 A An instruction is stored at location 400 with its address field at location 401. The 10
address field has the value 500. A processor register Rl contains the number 200.
Evaluate the effective address if the addressing mode of the instruction is (i) direct (ii)
immediate (iii) relative (iv) register indirect (v) index with Rl as index register.
8 What do you mean by processor organization? Explain various types of processor 10
[Link].
6 A Draw and explain the block dia2ram of tvoical OMA controller. 10
8 Discuss the different modes of data transfer. 10
7 A Assess and describe maooin2 orocess in cache memorv in detail. 10
8 Define address space and memory space in virtual memory. Also explain the role of 10
memory table in virtual memory with block diagram.
SECTION -A (ATTEMPT All QUESTIONS) 20
1 A List and briefly define the main structural components of a computer. 2
B Define system bus. Why do we need bus? 2
C Design a 4-bit combinational inaemental circuit using four full adder circuits. 2
D Show the operation in the form of register transfer language for given block diagram. 2
I
Control
circuit Ip ~I R2 4-- Clock
E
F
Why do computers use addressinR modes?
cb
Rank the different types of CPU organizations on the basis of their merits and
2
2
demerits.
G Why do we use Input-Output Interface? list the reasons. 2
H Compare synchronous and asynchronous data transfer. 2
I Recall and classify writing into cache in brief. 2
J Examine DRAM and SRAM on the basis of their benefits. 2
SECTION -8 (ATTEMPT ANY FIVE QUESTIONS) 30
2 A Draw the block diagram of 4-bit register with parallel load and also explain it in brief. 6
B Represent the number (-1460.125ho in double precision format. 6
C A digital computer has a common bus system for 16 registers of 32 bits each. The bus 6
is constructed with multiplexers.
iv. How many selection inputs are there in each multiplexer?
v. What size of multiplexers are needed?
vi. How many multiplexers are there in the bus?
D Convert the following arithmetic expressions from infix to reverse Polish notation. 6
iii. A0 B + c•D + E°F
A•(B+C•(D+E)]
iv.
F•IG+Hl
E Explain in detail the HandshakinR techniaue of asvnchronous data transfer. 6
F Assess the merits and demerits of associative mappinR and direct mappinR in brief. 6
SECTION-< (ATTEMPT ANY ONE PART FROM EACH QUESTION) 50
3 A Describe Harvard architecture with diaeram in detail. 10
B Explain stored proeram or2anization in detail with block dia2ram. 10
4 A Draw a 4-bit arithmetic circuit and also write its function table showing all the 10
microoperations.
B Show the systemic multiplication process of (-12) x (15) usinR Booth's al2orithm. 10
5 A Write a program to evaluate arithmetic expression using one-address and two-address 10
instructions.
X = (A+ Bl/ (((C - D / E) • F) • G)
B Draw and briefly explain the block diagram of register stack and memory stack in 10
reference to stack oreanization.
6 A Recall priority interrupt and polling. Draw and explain the block diagram of Daisy-<:hain 10
priority interrupt.
B How many ways a computer buses can be used to communicate with memory and 10
1/0? Explain in detail.
7 A Assess and describe the 2D and [Link] memory organization in detail. 10
B Draw and demonstrate the chip interconnection of a 1024 x 8 memory constructed 10
with 128 x 8 RAM chips and 512 x 8 ROM chips.