ENGINEERING
Kelavani Matidal'[Link]
OF
ShriVile Parle SANGHUI lvlnnbai)
DWARKADAS J. Aff1iated to the Universit of
(utonomous College (cGPA:3.13)
th'a Grade
NAiC Accred1ted
Name: dirya Shah
Roll No.: Gi-oy
SAP ID: GOo022uooo
Date of Performance:
Experiment No. 03
Theorem
Verification ofSuperposition
Performance Max Marks Marks Obtained
Sr. Marks Split Up
No. Indicator (25)
5
Pre Lab Questions Knowledge
2 Preparation of Observation Describe
3 Execution of Experiment Demonstration
5
4 Calculation/Evaluation of Result Interpret/Develop
5 Lab Ethics Attitude towards
Learning
Total 25
Outstanding: 5,Excellent: 4, Good: 3, Fair: 2, Needs Improvement: 1
lholvsty
Signature of Lab Instructor
Basic Electrical Engineering &Digital Electronics Laboratory &Tutorial DJS23FLESI03
Kelavani Mandals
ENGINEERING
Shri Vile Parle COLLEGE OF
DWARKADAS J. SANGHVI Mumbaij
Universit of
Affiliated tothe
(Autonomous College Grade (CCPA:3.13)
with "A
NAAC Accredited
Aim: theorem.
Verification ofsuperposition
Apparatus: Breadboard, connecting wires.
Multimeter, Resistors,
Power supply,
Theory:
that the response
superposition theorem for electrical circuits states voltage or
The having more than one indenend
current in any branch of abilateral linear circuit
each independent soyos
source equals the algebraic sum of the responses caused by
are replaced by their internal
acting alone, while all the other independent sources
impedances.
To ascertain the contribution of each individual source all of the other sources first mue
be "turned off" (set to zero) by:
Replacing all other independent voltage sources with a short circuit (thereby
eliminating difference of potential i.e. V=0, internal impedance of ideal voltage source
iszero (short circuit)).
Replacing all other independent current sources with an open circuit) thereby
eliminating current that is I =0, internal impedance of ideal current source is
(open circuit). infinite
This procedure is followed for each source in
added to determine the true operation of the turn, then the resultant responses are
the circuit. The resultant circuit operation is
superposition of the various voltage and current sources.
Circuit Diagram:
lks2
1.5kS2
RI R2
RL4.7ke
R3
2.2k S2
R4
3.9k2
Basic Electrical
Engineering &Digital Electronics
Laboratory &Tutorial DJS23FLES103
Kelavani Mandal's
ENGINEERING
OF
Shri Vile Parle SANGHVICOLLEGE
DWARKADAS J. Universit of Mumbai)
Affiliated to the
(Autornomous College (CGPA:3.13)
with"A Grade
NAC Accredited
Procedure: diagram.
as per the circuit
1. Connect the circuit R.
Measure output voltage VL
voltage across in place of Vi and
2. and put a short circuit
Disconnect Vi source from the circuit
3. of V2 and
measure output voltage
VL.
circuit and put a short circuit in place
source from the
4. Disconnect V2 VL".
measure output voltage table.
in the observation
5. Tabulate results
Calculations: short circuit
Considering source V1 alone, replacing source V2 by
A. Ik2 1.5k2
RË R2
RL
I,
R2
.2,2kQ
R4
3.9kS2
I = - 0.293
O. 30
B. Considering source V2 alone, replacing source Vi by short circuit
Iks2 1.SkS2
RË R2
RL
VLS4,7kS2 R3
2.2k 2
R4
3.9ks2
Basic Electrical Engineering & Digital Electronics Laboratory &Tutorial
DJS23FLES103
ENGINEERINC
O b s e r
Mat1dal's OF
COLLEGE Mumbai
Kelavani
Parle SANGHVI Universitof
Shri Vile
DWARKADAS J. Affiliatedto the:3.13) Th
College Grade (cGFA
Autonomous "
Accreditedrith
NAAC
(I,J,)-4.91,
-I, -2. -0.9)S
-1.51, V
) 20)-)
3.91, -
sources are acting
C. Both the 1.5k 2
lks2
RË R2
+
RL
VL S4.7k2
R3
2.2k 2
R4
3.9k2
Ii-0.413
1 , .).68g
6
-0.199
Basic Electrical Engineering &Digital Electronics Laboratory & DJS23FLES103
Tutorial
Mandal's ENGINEERING
Shri Vile Parle
Kelavani COLLEGE OF
[Link] the Universit of Mumbail
Affiliated to
(Autonomous Colle ge Grade (cGPA:3.13)
with A"
NAAC Acredited
Observation table:
Theoretical values VL
V:
VL'
Vi
).34)
0.SS53
3 3 3,233
O,33624
2.2933
5
10
h.56
Practical values
VL
V Vi-Vi+ V (Measured)
V: V
V
3
o.5S |361
5 2.32 327
10 |.4
6-5)
Conclusions: an this eeperimet, we
veilicd the superpeiben themn
The then sa Jhat th vellage acass locd esistane oith hetp
Basic Electrical Engineering &Digital Electronics Laboratory &Tutorial
DJS23FLES103