Qualcomm
Round-1
➢ About power concept: dynamic power, static power
➢ High Vt cells & Low Vt cells
➢ What is Latch up condition? How to avoid it?
➢ What is electromigration?
➢ Stacking concept from BVLSI and why do we do that?
➢
(a) Will the above circuit work without any violation?
(b) Calculate the new value of “dly” to avoid the violation, if any?
(c) Will the delay of CLK_BUF affect the maximum frequency of operation?
➢
Round 2:
➢ Intro and about projects mentioned in resume
➢ Blocking and non-blocking statements
➢ Given few lines of code and asked me to tell the values of a, b
Ex:
Case1 case2
a=1, b=2; a=1, b=2;
a<=b; a=b;
b<=a; b=a;
value of a, b in both cases
➢ What is the RTL implementation of generate usage in code
➢ Why generate is used and how is it helpful?
➢ Difference between latch and flipflop.
➢ When does a latch forms in Verilog coding.
NXP:
Asked me entirely communications questions
➢ Explain about receiver
➢ Block diagram of communication system on receiver side
➢ Explanation of each block
➢ What is a transceiver
➢ About tristate buffer
➢ Latch vs flipflop
➢ About frequency divider
➢ Python related question: how do u code a function in python
➢ Filters, digital filter (types, graphs), design of filters
➢ ADC & DAC
➢ Explain any ADC with blocks (I explained counter type ADC)
Samsung:
➢ Intro and about projects (I mentioned fifo in resume)
➢ What is fifo, why is it used.
➢ In depth about project:
• How the project has been implemented?
• Explanation about each block
• Working of fifo, full condition, why gray code is used
• About synchronizer, types of synchronizers, 2 flop synchronizer
• What is MTBF and its dependency on frequency
• Explain about toggle synchronizer and mux based synchronizer
(I used metastability word so topic shifted to that concept)
➢ What is metastability? How to avoid it?
➢ FIFO Problem solving
Similar questions with changed values (made me solve 4 such problems on
fifo)
➢ About clock domain crossing and reset domain crossing
➢ Difference between flipflop and latch (difference between value storing
and value retaining)
➢ Verilog codes:
• Basic mux code and asked me to questions related to the code
• D flipflop code
• 4 bit shift register
• 3 bit counter
• Frequency divider
➢ FSM questions:
• 1101 with overlap
• 1010 with overlap
• 1001 non overlap
➢ What is setup and hold time? Some problem related to finding max
frequency.
CDOT
round1:
completely about resume, projects in depth, i kept some communications
related project so they asked completely about that and about btech project
too (2 questions like that) next they've asked me what subjects i studied in
MTech after i mentioned the subject names, they circled about Asic subject and
asked me questions in asic design, what is floor planning, need for floor
planning, why is it important etc next they asked me to write an algorithm for
memory (writing and reading into the memory), 8085 microprocessor pin
diagram related question, multiplexing in microprocessor, about address latch
enable. Later few HR kinda questions like any interest for further studies,
what's your interested role hardware/software. My interview is around
just 20min that's it
round 2: (around 10-12 min)
what's your fav subject, i said wireless communications. So they've asked me
like: what's the difference between wireless networks and wireless
communication, difference between wireless and cellular, types of cellular
networks, which is better wired or wireless communications, again about
MTech project,what did u learn in cellular communications, what is diversity,
diversity types, is diversity good or bad, why is it helpful, compare pla, pal,
fpga as per their architecture(not board but architecture based). some Hr
question like: what will u do if i give some unrelated role to you. what will you
do about it? what coding languages do u know, any hardware
related languages?