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CMOS Logic Design and Implementation Guide

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0% found this document useful (0 votes)
10 views4 pages

CMOS Logic Design and Implementation Guide

Uploaded by

Nikhila
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd

Questions

1. What is inverting and non-inverting buffer? Design and explain the


working of a CMOS non-inverting buffer.
2. Define Noise margin. Write down the equations for low and high
noise margins
3. With a neat diagram explain the working of NMOS realization of a
NAND gate.
4. Explain the general structure of PLA with a neat diagram.
5. Briefly explain different 3 PLDs. Draw the logic diagram of memory
cell.
6. Tabulate the PLA programming table for the Boolean function.
A(x,y,z)=Sum(1,2,4,6)
B(x,y,z)=Sum(0,1,6,7)
C(x,y,z)=Sum(2,6)
D(x,y,z)=Sum(1,2,3,5,7)
7. With a neat diagram explain the working of CMOS realization of a
NOT gate.
8. Write the different types of power dissipation in Transistor circuits.
Explain the power dissipation(s) that occurs in NMOS and CMOS
circuits.
9. What is a tristate buffer? With neat diagram and explain the
different types of tristate buffers.
10. Draw the customary schematic for the PLA which implements
the function F(a,b,c)= Σm(0,2,3,7) and G(a,b,c)= ΠM(0,1,4,6).
11. What are the drawbacks of PLA’s? Design a PAL to realize the
logic function f1=X1x2x3’+x1’x2x3; f2=x1’x2’+x1x2x3 and mention
its advantages over PLA’s?
12. Explain the following with neat diagrams.
a) PMOS transistor as a switch
b) NMOS realization using NAND gates.
13. With necessary circuit diagram explain how PMOS transistor
acts as a switch?
14. Explain with circuit diagram the various transistor states of a
CMOS NAND gate?
15. Implement the following functions using PLA. Use minimum
no. of AND gates and OR gates with minimum inputs. F1 ( A, B, C) =
(3, 5, 6, 7) and F2 ( A, B, C) = (0, 2, 4, 7).

Solutions

Answer 6:

Given function:
A(x,y,z) = Σ(1,2,4,6)
B(x,y,z) = Σ(0,1,6,7)
C(x,y,z) = Σ(2,6)
D(x,y,z) = Σ(1,2,3,5,7)

a)Truth table:

b) PLA logic diagram construction:

A=x'y'z+x'yz'+xy'z'+xyz'

A = x'y'z+xz'+yz'

B = x'y'z'+x'y'z+xyz'+xyz

B=x'y'+xy

C=x'yz'+xyz'
C = yz'

D= x'y'z+x'yz'+x'yz+xy'z+xyz

D=z+x'y

PLA Programming table:

Answer 16:

The Boolean expressions are


F1 = AC + AB + BC and F2 = B'C' + A'C' + ABC

F1' = B'C' + A'B' + A'C' and F2' = A'C + B'C + ABC'.

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