Chapter 11: Basic I/O Interface
11–3 THE PROGRAMMABLE
PERIPHERAL
• 82C55 programmable peripheral interface
(PPI) is a popular, low-cost interface
component found in many applications.
• The PPI has 24 pins for I/O, programmable in
groups of 12 pins and groups that operate in
three distinct modes of operation.
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• 82C55 is used for interface to the keyboard
and parallel printer port in many PCs.
– found as a function within an interfacing chip set
– also controls the timer and reads data from the
keyboard interface
• An experimentation board is available that
plugs into the parallel port of a PC, to allow
access to an 8255 located on the board.
• The 8255 is programmed in either assembly
language or Visual C++ through drivers
available with the board.
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Basic Description of the 82C55
• The three I/O ports (labeled A, B, and C) are
programmed as groups.
– group A connections consist of port A (PA7–PA0)
and the upper half of port C (PC7–PC4)
– group B consists of port B (PB7–PB0) and the
lower half of port C (PC3–PC0)
• 82C55 is selected by its CS pin for
programming and reading/writing to a port.
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Figure 11–18 The pin-out of the 82C55 peripheral interface
adapter (PPI).
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Programming the 82C55
• 82C55 is programmed through two internal
command registers shown in Figure 11–20.
• Bit position 7 selects either command byte A
or command byte B.
– command byte A programs functions of group
A and B
– byte B sets (1) or resets (0) bits of port C only
if the 82C55 is programmed in mode 1 or 2
• Group B (port B and the lower part of port C)
are programmed as input or output pins.
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Figure 11–20 The command byte of the command register in the 82C55. (a)
Programs ports A, B, and C. (b) Sets or resets the bit indicated in the select a
bit field.
– group B operates in mode 0 or
mode 1
– Mode 0 is basic input/output mode
that allows the pins of group B to
be programmed as simple input
and latched output connections
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• Group A (port A and the upper part of port C)
are programmed as input or output pins.
• Group A can operate in modes 0, 1, and 2.
– mode 2 operation is a bidirectional mode of
operation for port A
• If a 0 is placed in bit position 7 of the
command byte, command byte B is selected
• This allows any bit of port C to be set (1) or
reset (0), if the 82C55 is operated in either
mode 1 or 2.
– otherwise, this byte is not used for programming
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Mode 0 Operation
• Mode 0 operation causes 82C55 to function:
– as a buffered input device
– as a latched output device
• Fig 11–21 shows 82C55 connected to a
set of eight seven-segment LED displays.
• These are standard LEDs.
– the interface can be modified with a change
in resistor values for an organic LED (OLED)
display or high-brightness LEDs
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Figure 11–21 An 8-digit LED display interfaced to the 8088 microprocessor through
an 82C55 PIA.
– ports A & B are programmed as
(mode 0) simple latched output ports
– port A provides segment data inputs
port B provides a means of selecting
one display position at a time for
multiplexing the displays
– the 82C55 is interfaced to an 8088
through a PLD so it functions at
I/O port numbers 0700H–0703H
– PLD decodes the I/O address and
develops the write strobe for the WR
pin of the 82C55
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Barry B. Brey
An LCD Display Interfaced to the
82C55
• LCDs (liquid crystal displays) have replaced
LED displays in many applications.
• Fig 11–22 shows an Optrex DMC-20481 LCD
display interfaced to an 82C55.
– DMC-20481 is a 4-line by 20-characters-per-line
display that accepts ASCII code as input data
• It also accepts commands that initialize it and
control its application.
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Barry B. Brey
Figure 11–22 The DMC-20481 LCD display interfaced to the
82C55.
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Barry B. Brey
• The data connections, which are attached to
the 82C55 port A, are used to input display
data and to read information from the display.
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Barry B. Brey
Key Matrix Interface
• Keyboards come in a variety of sizes, from
standard 101-key QWERTY keyboards to
special keyboards that contain 4 to 16 keys.
• Fig 11–25 is a key matrix with 16 switches
interfaced to ports A and B of an 82C55.
– the switches are formed into a 4 4 matrix,
but any matrix could be used, such as a 2 8
• The keys are organized into four rows and
columns: (ROW0–ROW3) (COL0–COL3)
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Barry B. Brey
Figure 11–25 A 4 4 keyboard matrix connected to an 8088 microprocessor through
the 82C55 PIA.
– the 82C55 is decoded at I/O
ports 50H–53H for an 8088
– port A is programmed as an
input port to read the rows
– port B is programmed as an
output port to select a column
– a flowchart of the software
required to read a key from the
keyboard matrix and debounce
the key is illustrated in Fig 11–26
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Barry B. Brey
Figure 11–26 The flowchart of a keyboard-scanning procedure.
– keys must be debounced, normally
with a time delay of 10–20 ms
– the software uses a procedure
called SCAN to scan the keys and
another called DELAY10 to waste
10 ms of time for debouncing
– the main keyboard procedure is
called KEY and appears in
Example 11–17
– the KEY procedure is generic, and
can handle any configuration from
a 1 1 matrix to an 8 8 matrix.
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Pentium Pro Processor, Pentium II, Pentium, 4, and Core2 with 64-bit Extensions Copyright ©2009 by Pearson Education, Inc.
Architecture, Programming, and Interfacing, Eighth Edition Upper Saddle River, New Jersey 07458 • All rights reserved.
Barry B. Brey