Setting the 'ModelSim Run All' parameter to 'No' during the initial setup prevents the automatic execution of the simulation in ModelSim. This allows users to open ModelSim, select the signals they wish to display in the waveform window, and save these choices before starting the simulation. This step is crucial for tailoring the simulation outputs and optimizing the process before automating it by setting the parameter to 'Yes' in subsequent runs .

Recompiling the VHDL model is essential whenever modifications are made to VHDL files to ensure that the simulation runs accurately with the updated digital model. It is achieved by placing the 'work' library in the working directory and using a Windows batch file to execute compilation commands utilizing ModelSim tools such as vcom and vlib. This ensures synchronization between the updated VHDL model and the rest of the simulation setup in ModCoupler .

ModCoupler can handle several data types: bit, std_logic, real, integer, bit_vector, and std_logic_vector. For bit and std_logic types, logic '0' and '1' states are used; values are mapped directly to ModelSim and PSIM nodes. Real type signals are sent directly between PSIM and ModelSim. For integers, decimal parts are truncated before communication. Bit_vector and std_logic_vector signals can either be treated as integers if the Split input buses parameter is 'No', or each bit can be mapped to a separate node in PSIM if the parameter is 'Yes' .

ModCoupler allows the splitting of input and output buses represented by std_logic_vector signals. When the 'Split input buses' or 'Split output buses' parameter is set to 'Yes', each bit of the std_logic_vector is mapped to a separate input or output node in PSIM. If set to 'No', the entire std_logic_vector is treated as an integer, with each bit in the vector corresponding to the respective bits of an integer where the first element represents the least significant bit .

ModCoupler acts as a communication link between ModelSim and PSIM, allowing the co-simulation of power electronics equipment by enabling the integration of a digital control algorithm simulated in ModelSim with a power stage simulated in PSIM. The ModCoupler block, added on the PSIM side, manages input-output signals, time-step control, and VHDL clock signal frequency, ensuring information is forwarded correctly to the digital circuit for calculations. Once ModelSim finishes its calculations, VHDL outputs are returned to close the loop for the next simulation step .

To start a new simulation with ModCoupler after modifying VHDL files or schematics, users must first recompile the updated VHDL model to reflect changes. Then, the 'ModelSim Run All' parameter should be set to 'No' to manually select and save the signals to display. The user should press the PSIM 'Run simulation engine' button to initialize the process, then configure the desired signals in ModelSim before commencing the simulation by pressing 'Run-All'. Before rerunning, ensure ModelSim's 'Restart' is executed rather than closing and reopening the entire software .

In setting up the ModCoupler environment, the PSIM schematic file serves as the foundation for the analog simulation. Users must add the ModCoupler block to their PSIM schematic to facilitate communication between ModelSim and PSIM, configure input-output management, time-step control, and VHDL clock generation. This schematic provides the necessary structural and signal information to ModCoupler to ensure effective co-simulation and synchronizes with digital signals simulated in ModelSim .

In ModCoupler co-simulation, the clock signal frequency impacts synchronization between the digital and analog sections, as it dictates the timing of VHDL simulations in ModelSim. The clk signal is not processed as an input because its period is typically smaller than the PSIM time step, meaning it governs the internal timing within ModelSim rather than dictating a communication signal. This setup minimizes the risk of misalignment between the simulations and optimizes time-step management .

Within a ModCoupler co-simulation environment, digital and analog components interact in a cycle where, at each simulation instant, both simulators are paused to allow for value exchange. Input signals are sent from the ModCoupler module to the digital circuit in ModelSim, where control algorithms are processed. Upon completing ModelSim calculations, resulting VHDL outputs return to the PSIM analog components, closing the loop. This cyclic interaction ensures that each simulation step corresponds correctly between the faster digital clock in ModelSim and the overall PSIM time step, maintaining alignment and coherence across both simulation domains .

The co-simulation architecture benefits from ModCoupler by facilitating precise and efficient signal management between analog simulations in PSIM and digital simulations in ModelSim. ModCoupler manages the synchronization of simulation time steps, enables effective transfer of input and output signals using compatible data types, and ensures that the digital control algorithms and analog components remain in sync throughout the simulation process. This integration enables users to simulate complex power electronics systems with a mixture of analogue and digital components accurately .