Chapter (2)

Fundamental laws
2.1 Introduction

This chapter discusses the series and parallel connections for voltage/current sources,
resistances, inductors and capacitors. Then it gives the basic and fundamental laws for analyzing
electric circuits.

The mesh and nodal analysis of the electric circuits are also highlighted in this chapter. Finally,
the chapter gives some ascending difficulty problems.

2.2 Series Connection

Components connected in series are connected along a single conductive path, so the same
current flows through all of the components but voltage is dropped (lost) across each of the
resistances. In a series circuit, the sum of the voltagesconsumed by each individual resistance is
equal to the source voltage.

2.2.1 Sources

Components connected in series are connected along a single conductive path, so the same
current flows through all of the components but voltage is dropped (lost) across each of the
resistances. In a series circuit, the sum of the voltages consumed by each individual resistance is
equal to the source voltage.

Current sources can't be connected in series except if they have the same value and polarity.

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2.2.2 Resistance/Inductances

The total resistance of an electrical circuit with resistorswired in a series is the sum of the
individual resistances: Each resistor in a series circuit has the same amount of current flowing
through it. ... The current flowing through each resistor in a parallel circuit is different, depending on
the resistance.

As the resistors are connected together in series the same current passes through each resistor
in the chain and the total resistance, RT of the circuit must be equal to the sum of all the individual
resistors added together. That is

and by taking the individual values of the resistors in our simple example above, the total
equivalent resistance, REQ is therefore given as:

REQ = R1 + R2 + R3 = 1kΩ + 2kΩ + 6kΩ = 9kΩ

So we see that we can replace all three individual resistors above with just one single
“equivalent” resistor which will have a value of 9kΩ. For n resistors

Rtotal = R1 + R2 + R3 + ….. Rn
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 These interconnections of inductors produce more complex networks whose overall inductance
is a combination of the individual inductors. However, there are certain rules for connecting inductors
in series or parallel and these are based on the fact that no mutual inductance or magnetic coupling
exists between the individual inductors.

Inductors are said to be connected in “Series” when they are daisy chained together in a straight
line, end to end. In the Resistors in Series tutorial we saw that the different values of the resistances
connected together in series just “add” together and this is also true of inductance. Inductors in series
are simply “added together” because the number of coil turns is effectively increased, with the total
circuit inductance LT being equal to the sum of all the individual inductances added together.

Inductor in Series Circuit

The current, ( I ) that flows through the first inductor, L1 has no other way to go but pass through
the second inductor and the third and so on. Then, series inductors have a Common Current flowing
through them, for example:

IL1 = IL2 = IL3 = IAB …etc.

In the example above, the inductors L1, L2 and L3 are all connected together in series between
points A and B. The sum of the individual voltage drops across each inductor can be found using
Kirchoff’s Voltage Law (KVL) where, VT = V1 + V2 + V3 and we know from the previous tutorials on
inductance that the self-induced emf across an inductor is given as: V = L di/dt.

So by taking the values of the individual voltage drops across each inductor in our example
above, the total inductance for the series combination is given as:

By dividing through the above equation by di/dt we can reduce it to give a final expression for
calculating the total inductance of a circuit when connecting inductors together in series and this is
given as:

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 Inductors in Series Equation

Ltotal = L1 + L2 + L3 + ….. + Ln etc.

Then the total inductance of the series chain can be found by simply adding together the
individual inductances of the inductors in series just like adding together resistors in series.

2.2.3 Capacitance

When capacitors are connected in series, the total capacitance is less than any one of the
series capacitors’ individual capacitances. If two or more capacitors are connected in series, the
overall effect is that of a single (equivalent) capacitor having the sum total of the plate spacings of
the individual capacitors. As we’ve just seen, an increase in plate spacing, with all other factors
unchanged, results in decreased capacitance.

Thus, the total capacitance is less than any one of the individual capacitors’ capacitances. The
formula for calculating the series total capacitance is the same form as for calculating parallel
resistances:

2.3 Parallel Connection

Parallel Circuit. A parallel circuit is a closed circuit in which the current divides into two or more
paths before recombining to complete the circuit. Each load connected in a separate path receives
the full circuit voltage, and the total circuit current is equal to the sum of the individual branch
currents.

2.3.1 Sources

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 Ideal voltage sources can be connected together in both parallel or series the same as for
any circuitelement. Series voltages add together while parallel voltages have the same value. Note
that unequal ideal voltage sources cannot be connected directly together in parallel.

Connecting two or more current sources in parallelis equivalent to one current source whose
totalcurrent output is given as the algebraic addition of the individual source currents. ... Current
sources of different values may be connected together in parallel.

2.3.2 Resistance/Inductances

Voltage is the same across each component of theparallel circuit. The sum of the currents
through each path is equal to the total current that flows from the source. You can find
total resistance in a Parallel circuit with the following formula:

1/Rt = 1/R1 + 1/R2 + 1/R3 +...

When inductors are connected in parallel, the total inductance is less than any one of the
parallel inductors’ inductances. Again, remember that the definitive measure of inductance is the
amount of voltage dropped across an inductor for a given rate of current change through it. Since
the current through each parallel inductor will be a fraction of the total current, and the voltage
03
across each parallel inductor will be equal, a change in total current will result in less voltage
dropped across the parallel array than for any one of the inductors considered separately. In other
words, there will be less voltage dropped across parallel inductors for a given rate of change in
current than for any of those inductors considered separately, because total current divides among
parallel branches. Less voltage for the same rate of change in current means less inductance.

Thus, the total inductance is less than any one of the individual inductors’ inductances. The
formula for calculating the parallel total inductance is the same form as for calculating parallel
resistances:

2.3.3 Capacitance

When capacitors are connected in parallel, the total capacitance is the sum of the individual
capacitors’ capacitances. If two or more capacitors are connected in parallel, the overall effect is
that of a single equivalent capacitor having the sum total of the plate areas of the individual
capacitors. As we’ve just seen, an increase in plate area, with all other factors unchanged, results
in increased capacitance.

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 Thus, the total capacitance is more than any one of the individual capacitors’ capacitances.
The formula for calculating the parallel total capacitance is the same form as for calculating series
resistances:

2.4 Star/delta transformation of resistances

Three resistors can be connected as star or delta as shown:

1
1
R1 R31 R12

R3 R2
3 2
3 2 R23
Star-connection Delta-connection
Star and delta connections of resistors

Star/delta transformation Delta/star/ transformation

R12 = R1 + R2 + R1 * R2/R3 R1=R12*R13/( R12 + R23 + R31)
R23 = R2 + R3 + R2 * R3/R1 R2=R21*R23/( R12 + R23 + R31)
R31 = R3 + R1 + R3 * R1/R2 R3=R31*R32/( R12 + R23 + R31)
Example:
For the star connected resistors (R1= 100, R2= 200 and R3= 300), find the equivalent delta (R12, R23
and R31).

R12 = 100 + 200 + 100 * 200/300 = 366.7Ohm

R23 = 200 + 300 + 200 * 300/100 = 1100 Ohm
R31 = 300 + 100 + 300 * 100/200 = 550 Ohm

06
For the above values of delta connections (R12, R23 and R31), find the equivalent star resistors (R1, R2
and R3).

R1 = 366.7 * 550 /(366.7 + 550 + 1100) = 100 Ohm

R2 = 366.7 * 1100 /(366.7 + 550 + 1100) = 200 Ohm
R3 = 550 * 1100 /(366.7 + 550 + 1100) = 300 Ohm

2.5 Ohm's law

It is the most fundamental law used in circuit analysis. It provides a simple formula describing the
voltage-current relationship in a conducting material. Statement : "The voltage or potential
difference across a conducting material is directly proportional to the current flowing through
the material".

Mathematically

V∝I

V=RI or I = V / R or R =V/ I

where the constant of proportionality R is called the resistance or electrical resistance, measured
in ohms (Ω). Graphically, the V − I relationship for a resistor according to Ohm’s law is depicted in
Fig. 1.5.

Fig. 1.5: V − I relationship for a resistor according to Ohm’s law.

At any given point in the above graph, the ratio of voltage to current is always constant.

2.5.1 Voltage Divider Rule (VDR)

Voltage divider rule provides a useful formula to
determine the voltage across any resistor when
two or more resistors are connected in series with a
voltage source. In Fig. 2.3, the voltage across the

00
individual resistors can be given in terms of the supply voltage and the magnitude of individual
resistances as follows

Fig. xx Voltage divider ruler

V1 = Vs ( R1 / ( R1 + R2) ) ( 2.9 )
V2 = Vs ( R2 / ( R1 + R2) ) ( 2.10 )
In general, for n number of resistors connected in series, the voltage across the i th resistor can be
specified as:
Vi = Vs Ri / ( R1 + R2 + ……. + Rn) (2.11)

2.5.2 Current Divider Rule (DDR)

A parallel circuit is often called a current divider for its ability to proportion—or divide—the
total currentinto fractional parts. ... Once again, it should be apparent that the current through each
resistor is related to its resistance, given that the voltage across all resistors is the same.

Fig. Current Divider rule

2.6 Kirchoff’s Laws

Arguably the most common and useful set of laws for solving electric circuits are the Kirchoff’s
Voltage and current laws. Several other useful relationships can be derived based on these laws.

2.6.1 Kirchoff’s Voltage Law (KVL)

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 “The sum of all the voltages (rises and drops) around a closed loop is equal to zero.”In
other words, the algebraic sum of all voltage rises is equal to the algebraic sum of all the voltage In
other words, closed loop. In Fig. 2.1, all voltage rises is equal to the algebraic sum KVL the voltage
drops around a the algebraic sum of 2.1, consider mesh BEDB, then according to of all drops around
a closed loop. In Fig. 2.1, consider mesh BEDB, then according to KVL V3 = V4 + V5

Fig. 2.2: Circuit diagrams to

demonstrate the application of KVL

Figure 2.2(a) contains a single loop hence a single current, I is flowing around it. Therefore a
single equation will result as given below hence a single current, I is flowing around it. Therefore a
single Fig. 2.2(a) contains a single loop equation will result as given below:

Vs = I R1 + I R2 (2.1)

If Vs , R1 and R2 are known, then I can be found.

Fig. 2.2(b) contains two meshes with currents I1 and I2 hence there will be two equations as
shown below. Note that the branch meshes R2 is common to both meshes with currents I1 and I2
flowing in opposite directions.

Left loop : Vs = R1 I1 + R2 (I1 − I2 )

Vs = (R1 + R2 )I1 − R2 I2 (2.2)

Right loop
0 = R2 (I2 − I1 ) + R3 I2
0 = −R2 I1 + (R2 + R3) I2 (2.3)
Given Vs, R1 , R2 & R3 , Equations 2.2 and 2.3 can be solved simultaneously to evaluate I 1 and I2 .
For the circuit diagram of Fig. 2.2(c), three equations need to be written as follows. Also note that
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there is no circuit element shared between loops 2 and 3 hence I 2 and I3 are independent of each
other.

Left bottom loop

Vs = (I1 − I3 )R1 + (I1 − I2 )R2
Vs = (R1 + R2 )I1 − R2 I2 − R1 I3

Right bottom loop

0 = (I2 − I1 )R2 + I2 R3
0 = −R2 I1 + (R2 + R3 )I2
Upper loop
0 = (I3 − I1 )R1 + I3 R4
0 = −R1 I1 + (R1 + R4 )I3
If Vs and resistors’ values are known, the mesh currents can be evaluated by solving Equations 2.4,
2.5 and 2.6 simultaneously.

2.6.2 Kirchoff’s Current Law (KCL)

“The algebraic sum of all the currents entering or leaving a node in an electric circuit is
equal to zero.” In other words, the sum of currents entering is equal to the sum of currents leaving
the node in an electric circuit. Consider node B in Fig. 2.1, then according to KCL I1 + I4 = I2 + I3

Example For the circuit diagrams depicted in Fig. 2.4, write the nodal equations.

Fig. 2.4: Circuit diagrams to demonstrate the application of KCL in the above example.

Figure 2.4(a) contains just one node excluding the reference, hence one equation is required.

Is = V / R1 + V/R2 + V/R3

If Is , R1 , R2 and R3 are know in Equation 2.12, V can be determined. In Fig. 2.4(b), two equations are

02
written for the two nodes labeled V1 and V2 .

Left node
Is = V1 / R1 + (V1 – V2 ) / R4
Is = ( 1/R1 + 1/R2 ) V1 – 1/R4 V2 (2.13)
Right node:
0 = (V2 – V1 ) / R4 + V2/R2 + V2 / R3
0 = - 1/R4 V1 + ( 1/R2 + 1/R3 + 1/R4) V2 (2.14)
Equations 2.13 and 2.14 can be simultaneously solved to determine the node voltages provided the
resistors’ values and Is are known. Figure 2.4(c) contains 3 nodes hence three equations are required
to solve for node voltages V1 , V2 and V3 .

Left node:
Is = V1/R1 + (V1 – V2)/R4
Is = (1/R1 + 1/R2 ) V1 – (1/ R4 ) V2 (2.15)
Middle node:
0= (V2 – V1 ) / R4 + V2/R2 + (V2 – V3 ) / R5
0 = (- 1/R4 ) V1 + ( 1/R2 + 1/R4 + 1/ R5) V2 – (1/R5 ) V3
(2.16)
Right node:
0 = (V3 – V2) / R5 + V3/R3
0 = (- 1/R5) V2 + ( 1/R3 + 1/R5) V3 (2.17)
Node voltages V1, V2 and V3 can be evaluated by simultaneously solving Equations 2.15, 2.16 and
2.17 using Cramer’s rule.

2.7 Mesh analysis

The mesh analysis technique consists of the following steps:

1. Transform all currents sources to voltage sources, if possible.

2. Identify and assign a current to each mesh of the network (preferably in the same direction).

3. Write mesh equations using KVL and simplify them.

4. Solve the simultaneous system of equations.

5. Number of equations = number of meshes in the network.

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 Three meshes can be identified with currents I1 , I2 and I3 as illustrated in Fig. 2.8 where all the
currents are assumed to be flowing in the clockwise direction.

Fig. 2.8: For mesh analysis, three loops are highlighted with currents I 1, I2 and I3

Observe the common (shared) circuit elements between the meshes such as R2 (between meshes
1 and 2) and R3 (between meshes 2 and 3). The current through R2 , for instance, will be I1 − I2 when
considering mesh 1 whilst it will be I2 − I1 for mesh 2.

The KVL equations can now be written as follows

(I1 − I2 )R2 = Vs

(I2 − I1 )R2 + I2 R1 + (I2 − I3 )R3 = 0

(I3 − I2 )R3 + I3 R4 = 0
Substitute the given values of the resistors and voltage source,
I2 – 2 I 3 = = 0 (2.26)
The solution of the above simultaneous equations can be obtained either by substitution or by
Cramer’s rule or matrix method.

∴ Is= I1 = 5 A,
IR1 = I2 = 2 A,
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IR4 = I3 = 1 A,
IR2 = I1 − I2 = 3 A and
IR3 = I2 − I3 = 1 A

2.7.1 Supermesh
A supermesh exists when an ideal current source appears between two meshes of an electric
circuit. In such a situation, like supernode, mesh equations are written for the meshes involved and
added giving a single equation. Again, there would be one less equation than the number of variables
(mesh currents) and hence a constraint equation is needed. This would be based on the magnitude of
the ideal current source present between the two meshes and their mesh currents. The following
example will help clarify this scenario.

Example
Determine the current supplied by the 10 V voltage source in the circuit diagram of Fig. 2.21.

Fig. 2.21: Illustration of supermesh

Mesh 1
10 I1 + 10 ( I1 – I2 ) + 10 ( I1 – I3 ) = 0
3 I 1 – I2 – I3 = 0 (2.32)
Supermesh
[ 10 ( I2 – I1 ) ] + [ 10 ( I3 – I1 ) + 10 I3 ] = 10
- 2 I 1 + I2 + 2 I3 = 1 ( 2.33)

Constraint Equation
I2 – I3 = 1 ( 2.34 )
The current supplied by the 10 V source is I2, thus according to Cramer's rule

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2.7.2 Mesh Analysis by Inspection
It may seem rather cumbersome and demanding (especially for the beginners) to write correct
nodal and mesh equations using the methods outlined in Sections 2.4.1 and 2.4.2. Although it is vital
that students have a clear understanding of the underlying concepts, nonetheless there are methods
devised to write nodal and mesh equations by inspection using ad hoc relationships. This provides a
useful way to quickly analyse a given circuit to determine a particular current or voltage.

To demonstrate writing mesh equations by inspection, consider Figure 3.2(c) which consists of
three meshes with currents denoted as I1 , I2 and I3 . The mesh equations have been derived earlier
in Equations 2.4, 2.5 and 2.6 and reproduced below for convenience.

Vs = (R1 + R2 )I1 − R2 I2 − R1 I3 (2.35)

0 = −R2 I1 + (R2 + R3 )I2 (2.36)
0 = −R1 I1 + (R1 + R4 )I3 (2.37)

In matrix form, the above equations can be written as

(2.38)

The order of the resistance matrix (R) is the same as number of loops in the circuit. Additionally it has
a general structure as outlined below which is independent of the number of equations or meshes.

Rii = ith diagonal entry

= sum of all resistance in the ith mesh.
Rij = off-diagonal entry
- [ sum of resistances common to meshes i and j ]

R = RT i.e. R is a symmetric matrix

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2.8 Nodal analysis
The following steps describe the nodal analysis method
1. Transform all voltage sources to current sources, if possible (see Section 2.8).
2. Identify and assign an arbitrary to current sources, if possible (see Section 2.8). in the network1.
Transform all voltage sources voltage to each node including the reference node assuming all
currents leaving the node. The reference node is normally assumed to be at zero potential.
3. Write nodal equations using KCL and simplify them.
4. Solve the simultaneous system equations.
5. Number of equations is N − 1 where N is the number of nodes in the network including the
reference node.

Example
Calculate the current supplied by the 30 V source and the current through each resistor in the circuit
diagram shown in Fig. 2.6 using (1) nodal analysis, (2) mesh analysis and (3) circuit reduction
techniques, where R1 = R2 = R3 = R4 = 10 Ω.

Fig. (2.6)
Solution 1. Nodal Analysis
Source transformation is not possible for this circuit since it requires a resistor in series with the
voltage source (see Section 2.8). Three nodes are identified in the above circuit diagram and labelled
as 0, 1 and 2 as illustrated in Figure 2.7 where 0 is the reference node. Specify V1 and V2 as voltages
of nodes 1 and 2 respectively.

The voltage source, Vs and R2 are in parallel therefore V1 = Vs = 30 V is known by inspection.

Applying KCL at node 2 assuming all currents are leaving the node, therefore
(V2 – V1 ) / R1 + V2 / R3 + V2 / R4 = 0
(V2 – 30 ) / 10 + V2 / 10 + V2 / 10 = 0
V2 – 30 + V2 + V2 = 0
V2 = 10 V

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The required currents can now be found using Ohm’s law.
IR1 = (V1 – V2) / R1 = (30 – 10) / 10 = 2 A
IR2 = V1 / R2 = 30 / 10 = 3 A
IR3 = V2 / R3 = 10 / 10 = 1 A
IR4 = V2 / R4 = 10 / 10 1 A
The current supplied by the voltage source, Is is given by the sum of currents IR1 and IR2 i.e.
Is = IR1 + IR2 = 2 + 3 = 5 A

Fig. 2.7: Circuit diagram showing three nodes labelled as 0, 1, 2 where 0 is the reference node.
2.8.1 Super node
A super node exists when an ideal voltage source appears between any two nodes of an electric
circuit. The usual way to solve this is to write KCL equations for both nodes and simply add them
together into one equation ignoring the voltage source in question. However, this would mean one
less equation than the number of variables (node voltages) present in the circuit. A constraint
equation can be easily specified given by the magnitude of the ideal voltage source present between
the nodes and the respective node voltages. The following example will help clarify this scenario.

Example
Determine the voltage across the 1 A current source in the circuit diagram of Fig. 2.20 using nodal
analysis.

Fig.2.20: Illustration of a supernode

A simple inspection of the circuit diagram reveals the existence of three nodes excluding the
reference and are labelled as V1 , V2 and V3 as their respective node voltages. The presence of an
ideal voltage source between nodes 2 and 3 creates a supernode and a constraint equation is
36
necessary. As mentioned, nodal analysis is carried out as normal and the nodal equations of nodes 2
and 3 will be added together.

Node 1

1 = ( V1 – V2 ) / 10 + ( V1 –V3 ) / 10

10 = 2 V1 – V2 – V3 (2.29)

Supernode
0 = ( (V2-V1)/10 + ( (V3/10) + ( V3 – V1) )

0 = - V1 + V 2 = V 3 (2.30)

Since there are three variables and two equations, therefore another equation is needed. This can be
written as the constraint equation between nodes 2 and 3 as follows:

Constraint Equation
V2 − V3 = 2 (2.31)

Equations 2.29, 2.30 and 2.31 can be solved simultaneously to determine the node voltages V 1 , V2
and V3 . Herein, the voltage, V1, across the current source is required only. Hence by using Cramer’s
rule

30
2.8.2 Nodal Analysis by Inspection
The circuit diagram in Fig. 2.4(c) can be used to demonstrate the technique to write nodal equations
by inspection. The equations for this circuit have been derived earlier and reproduced below for
reader’s convenience.

Is = ( 1 / R1 + 1 / R4 ) V1 – (1 / R4) V2
0 = - (1 / R4 ) V1 + ( 1 / R2 + 1 / R4 + 1 / R5 ) V2 – ( 1/ R5 ) V3
0 = - ( 1 / R5 ) V 2 + ( 1 / R 3 + 1 / R 5 ) V 3

Noting that 1 / R = G ( conductance ), the above equations can be rewritten as follows

Is = ( G 1 + G 4 ) V 1 – G4 V 2 (2.39)
0 = - G4 V 1 + ( G 2 + G 4 + G 5 ) V2 – G5 V 3 (2.40)
0 = - G5 V 2 + ( G 3 + G 5 ) V 3 (2.41)

In matrix form

The conductance matrix (G) has the same order as the number of nodes excluding the reference
node. Moreover, it has a general structure as outline below which is independent of the number of
nodes in the network.

Gii = ith diagonal entry

= sum of all conductances directly connected to ith node.
Gij = off-diagonal entry
−[sum of conductances connected between nodes i and j].
G = GT i.e. G is a symmetric matrix

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2.9 Problems

33
32
4- Determine the currents flowing in each branch for the circuit shown in Fig. 4.

10Ω 20Ω 30Ω

60Ω 10Ω
10A 10Ω
30Ω 30Ω
Fig. 4
5- Determine the currents flowing in each branch for the circuit shown in Fig. 5.

1Ω 2Ω 3Ω

5Ω
6Ω 1Ω
2Ω
70V 3Ω 3Ω
{
Fig. 5

6- Use kirchoff''s voltage and current laws to find the currents flowing in each branch in Fig. 6.

30Ω 40Ω

5Ω 10Ω
10Ω 32

50V 60V
{ {
 Fig. 6
7- Apply the loop current method to determine the currents in each branch in Fig. 7.

10Ω

I1
10Ω 10Ω

10Ω 10Ω 10Ω

I1 I1

90V 60V 80V

{ {Fig. 7 {

8- Apply the loop current method to determine the currents in each branch in Fig. 8.

10A

I1
10Ω 10Ω

3Ω 10Ω 1Ω
I1 I1

50V 30V 40V

{ { {

Fig. 8

9- Apply the nodal voltage method to determine

10Ωthe currents in each branch in Fig. 9.

1Ω V2 10Ω
V1
V3
1Ω
10Ω 32
90V 50V
{ {
10- Apply the nodal voltage method to determine the currents in each branch in Fig. 10.

20
Ω

10 V2 10
V1 Ω Ω V3
5Ω 10
10 Ω
90V Ω 80V
{ {

Fig. 10

11- Determine the load current iL in the load resistance of Fig. 11 using Thevenin's theorem for:
RL = 10 , 15 and 20 Ω .

1Ω 2Ω 3Ω
a
5Ω iL
6Ω RL
2Ω
70V 3Ω 3Ω
{
b

Fig. 11
12- Determine the load resistance RL in Fig. 11 that absorbs maximum power.
13- Determine the load current iL in the load resistance of Fig. 11 using Norton's theorem for:
RL = 10 , 15 and 20 Ω .
14- Determine the current i in Fig. 12 using super position theorem.
30Ω 40Ω

i
5Ω 10Ω
10Ω
50V 60V
{ {

Fig. 12
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