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Logic Gate Verification and Design Guide

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0% found this document useful (0 votes)
20 views7 pages

Logic Gate Verification and Design Guide

Uploaded by

senoptimus5
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd

AIM: Verify the truth table of OR gate using IC 7432

on breadboard.
Q. Draw the symbol, truth table and logic output
equation of following gates:
[Link] [Link] [Link] [Link]-OR

AIM: Verify the truth table of OR gate using IC 7432


on breadboard.
Q. Draw the symbol, truth table and logic output
equation of following gates:
[Link] [Link] [Link] [Link]-OR

AIM: Verify the truth table of NAND gate using IC


7400 on breadboard.
Q. Draw the symbol, truth table and logic output
equation of following gates:
[Link] [Link]-OR
AIM: Verify the truth table of NOR gate using IC
7402 on breadboard.
Q. Draw the symbol, truth table and logic output
equation of following gates:
[Link] [Link]-NOR

AIM: Construct AND,OR and NOT gate using


universal gate NOR
Q. Realize following logic operation using NAND
GATE

AIM: Construct AND,OR and NOT gate using


universal gate NAND
Q. Realize following logic operation using NOR GATE

AIM: Construct logic circuit on breadboard to verify


De Morgan’s theorem
Q. State both De Morgan’s theorem and prove them.
AIM: Design half adder using Boolean expression.
Q. Implement full adder using half adder.

AIM: Design half subtractor using Boolean


expression.
Q. Implement full adder using half adder.

AIM: Construct and test BCD to 7segment decoder


using IC 7447/7448
Q. State and explain the types of 7 segment display
with suitable diagram

AIM: Construct and test BCD to 7segment decoder


using IC 7447/7448
Q. State and explain the types of 7 segment display
with suitable diagram

AIM: Build /test function of MUX


Q. Design 16:1 Mux using 4:1 Mux
AIM: Build /test function of MUX
Q. Design 16:1 Mux using 4:1 Mux

AIM: Build /test function of DEMUX


Q. Design 1:8 Demux using 1:4 Demux

AIM: Build /test function of DEMUX


Q. Design 1:8 Demux using 1:4 Demux

AIM: Build / test function of RS flip flop.


Q. Draw the symbol and truth table of following flip
flop
[Link] FF 2.D FF 3. T FF

AIM: Build / test function of RS flip flop.


Q. Draw the symbol and truth table of following flip
flop
[Link] FF 2.D FF 3. T FF
AIM: Build / test function of master slave JK flip flop.
Q. Draw the symbol and truth table of following flip
flop
[Link] FF 2.D FF 3. T FF

AIM: Build / test function of master slave JK flip flop.


Q. Draw the symbol and truth table of following flip
flop
[Link] FF 2.D FF 3. T FF

AIM: Build / test function of T flip flop.


Q. Draw the symbol and truth table of following flip
flop
[Link] FF 2.D FF 3. SR FF

AIM: Build / test function of T flip flop.


Q. Draw the symbol and truth table of following flip
flop
[Link] FF 2.D FF 3. SR FF
AIM: Build / test function of D flip flop.
Q. Draw the symbol and truth table of following flip
flop
1. JK FF 2.T FF 3. SR FF

AIM: Build / test function of D flip flop.


Q. Draw the symbol and truth table of following flip
flop
1. JK FF 2.T FF 3. SR FF

AIM: Implement Ripple counter using digital IC


Q. Draw 4 bit Ripple up counter with truth table

AIM: Implement Ripple counter using digital IC


Q. Draw 4 bit Ripple up counter with truth table

AIM: implement Decade counter using Digital IC


Q. Draw proper observation table of Decade counter

AIM: implement Decade counter using Digital IC


Q. Draw proper observation table of Decade counter

AIM: Test output of given R-2R type Digital to analog


converter for given input
Q. Draw observation table for given input with
calculation

AIM: Test output of given R-2R type Digital to analog


converter for given input
Q. Draw observation table for given input with
calculation

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