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Learn thoroughly what should be learned.

And having learned, stand according to that
VIT - A place to learn; A chance to grow
 Course Objectives
To apply the knowledge of solid state devices
principles to analyze electronic circuits.

To demonstrate amplifiers under different

configurations and analyse their responses.

To impart the knowledge of analog circuit design for

various applications.

Dr. Aravind C K, [Link]., SELECT 2

Dr. Aravind C K, [Link]., SELECT 3
✓Transistor(BJT) –both holes and electrons play a part in the conduction
process----it is called a bipolar transistor

✓Bipolar transistor has two principal disadvantages

• First, it has a low input impedance because of forward biased emitter junction.

• Secondly, it has considerable noise level.

✓Even though the low input impedance problem may be improved by careful
design and use of more than one transistor, yet it is difficult to achieve input
impedance more than a few megaohms
Dr. Aravind C K, [Link]., SELECT 4
FET Characterises

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✓A bipolar junction transistor (BJT) is a current controlled device i.e.,
output characteristics of the device are controlled by base current and not by
base voltage

✓A field effect transistor (FET), the output characteristics are controlled by

input voltage (i.e., electric field) and not by input current.

✓This is probably the biggest difference between BJT and FET.

✓There are two basic types of field effect transistors:

(i) Junction field effect transistor (JFET)
(ii) Metal oxide semiconductor field effect transistor (MOSFET)

Dr. Aravind C K, [Link]., SELECT 6

Junction Field Effect
Transistor (JFET)

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✓A junction field effect transistor is a three terminal semiconductor device in
which current conduction is by one type of carrier i.e., electrons or holes.

✓In a JFET, the current conduction is either by electrons or holes and is

controlled by means of an electric field between the gate electrode and the
conducting channel of the device.

✓The JFET has high input impedance and low noise level.

Dr. Aravind C K, [Link]., SELECT 8

Dr. Aravind C K, [Link]., SELECT 9
 Constructional details
✓A JFET consists of a p-type or n-type silicon bar containing two PN
junctions at the sides

✓The bar forms the conducting channel for the charge carriers.

✓If the bar is of n-type, it is called n-channel JFET

✓If the bar is of p-type, it is called a p-channel JFET

✓The two PN junctions forming diodes are connected internally and a

common terminal called gate is taken out
Dr. Aravind C K, [Link]., SELECT 10
✓FET has essentially three terminals -gate (G), source (S), and drain (D).

Dr. Aravind C K, [Link]., SELECT 11

VGS =0 V and VDS >0 V.

Dr. Aravind C K, [Link]., SELECT 12

 JFET polarities
✓The voltage between the gate and source is such that the gate is reverse-
biased.

✓The drain and source terminals are interchangeable i.e., either end can be
used as source and the other end as drain.

n-channel JFET polarities Dr. Aravind C K, [Link]., SELECT

p-channel JFET polarities 13
✓The following points may be noted :

✓(i) The input circuit (i.e. gate to source) of a JFET is reverse biased. This
means that the device has high input impedance.

✓(ii) The drain is so biased w.r.t. source that drain current I flows from the
D

source to drain.

✓(iii) In all JFETs, source current IS is equal to the drain current i.e. IS = ID.

Dr. Aravind C K, [Link]., SELECT 14

Principle and Working
of JFET

VIT - A place to learn; A chance to grow

 Principle
✓Thus JFET operates on the principle that the width and hence resistance
of the conducting channel can be varied by changing the reverse voltage
VGS

Dr. Aravind C K, [Link]., SELECT 16

✓The two pn junctions at the sides form two depletion layers.

✓The current conduction by charge carriers is through the channel between the two
depletion layers and out of the drain.

✓ The width and hence resistance of this channel can be controlled by changing the input
voltage VGS.

✓ The greater the reverse voltage VGS, the wider will be the depletion layers and narrower
will be the conducting channel.

✓The narrower channel means greater resistance and hence source to drain current
decreases.

✓Reverse will happen should VGS decrease.

Dr. Aravind C K, [Link]., SELECT 17

 Working (VGS=0)
✓When a voltage V is applied between drain and source terminals and voltage
DS

on the gate is zero, the two pn junctions at the sides of the bar establish
depletion layers.

✓The electrons will flow from source to drain through a channel between the
depletion layers.

✓ The size of these layers determines the width of the channel and hence the
current conduction through the bar.

Dr. Aravind C K, [Link]., SELECT 18

 Working (VGS )
✓When a reverse voltage VGS is applied between the gate and source, the width of
the depletion layers is increased.

✓ This reduces the width of conducting channel, thereby increasing the resistance of
n-type bar.

✓Consequently, the current from source to drain is decreased.

✓On the other hand, if the reverse voltage on the gate is decreased, the width of the
depletion layers also decreases.

✓This increases the width of the conducting channel and hence source to drain
current
Dr. Aravind C K, [Link]., SELECT 19
✓The current from source to drain can be controlled by the application of
potential (i.e. electric field) on the gate. For this reason, the device is called
field effect transistor.

✓It may be noted that a p-channel JFET operates in the same manner as an
n -channel JFET except that channel current carriers will be the holes
instead of electrons and the polarities of VGS and VDS are reversed.

Dr. Aravind C K, [Link]., SELECT 20

Difference Between JFET
and Bipolar Transistor

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 Unipolar Vs bipolar
✓In a JFET, there is only one type of carrier, holes in p-type channel and
electrons in n-type channel. For this reason, it is also called a unipolar
transistor.

✓In an ordinary transistor, both holes and electrons play part in conduction.
Therefore, an ordinary transistor is called a bipolar transistor.

Dr. Aravind C K, [Link]., SELECT 22

 input impedance.
✓The input circuit (i.e., gate to source) of a JFET is reverse biased, therefore,
the device has high input impedance.

✓The input circuit of an ordinary transistor is forward-biased and hence has

low input impedance.

Dr. Aravind C K, [Link]., SELECT 23

 GATE Current
✓The primary functional difference between the JFET and the BJT is that no
current (actually, a very, very small current) enters the gate of JFET (i.e. I =
G

0A).

✓A typical BJT base current might be a few A while JFET gate current a
thousand times smaller

Dr. Aravind C K, [Link]., SELECT 24

 Control
✓A bipolar transistor uses a current into its base to control a large current
between collector and emitter whereas a JFET uses voltage on the ‘gate’ ( =
base) terminal to control the current between drain (= collector) and source (
= emitter).

✓Thus a bipolar transistor gain is characterised by current gain whereas the

JFET gain is characterised as a transconductance i.e., the ratio of change in
output current (drain current) to the input (gate) voltage.

Dr. Aravind C K, [Link]., SELECT 25

 Noise
✓In JFET, there are no junctions as in an ordinary transistor. The conduction
is through an n- type or p-type semi-conductor material.

✓For this reason, noise level in JFET is very small.

✓BJT –Junction create noise

Dr. Aravind C K, [Link]., SELECT 26

Dr. Aravind C K, [Link]., SELECT 27
 JFET as Amplifier
✓For the proper operation of
JFET, the gate must be
negative w.r.t. source i.e., input
circuit should always be
reverse biased.

✓This is achieved either by

inserting a battery V in the
GG

gate circuit or by a circuit

known as biasing circuit

Dr. Aravind C K, [Link]., SELECT 28

✓A small change in the reverse bias on the gate produces a large change in
drain current.

✓This fact makes JFET capable of raising the strength of a weak signal.

✓During the positive half of signal, the reverse bias on the gate decreases.
This increases the channel width and hence the drain current.
✓During the negative half-cycle of the signal, the reverse voltage on the gate
increases. Consequently, the drain current decreases.
✓ The result is that a small change in voltage at the gate produces a large
change in drain current.
✓These large variations in drain current produce large output across the load
R . In this way, JFET acts as an amplifier.
L

Dr. Aravind C K, [Link]., SELECT 29

 Output Characteristics

✓Shorted-gate drain current (I ). It is the drain current with source short-circuited to

DSS

gate (i.e. V = 0) and drain voltage (V ) equal to pinch off voltage. It is sometimes called
GS DS

zero-bias current.
✓Pinch off Voltage (V ). It is the minimum drain-source voltage at which the drain current
P

essentially becomes constant.

✓Gate-source cut-off voltage V . It is the gate-source voltage where the channel is
GS (off)

completely cut off and the drain current becomes zero.

✓ VGS (off) will always have the same magnitude value as VP. For example, if VP = 6 V, then VGS
(off) = − 6 V. Since these two values are always equal and opposite, only one is listed on the

specification sheet for a given JFET.

Dr. Aravind C K, [Link]., SELECT 30

Dr. Aravind C K, [Link]., SELECT 31
Dr. Aravind C K, [Link]., SELECT 32
Dr. Aravind C K, [Link]., SELECT 33
Expression for Drain Current (ID)

Dr. Aravind C K, [Link]., SELECT 34

Transfer Characteristics

Dr. Aravind C K, [Link]., SELECT 35

✓Fig. shows the transfer characteristic curve of a JFET. Write the equation
for drain current.

Dr. Aravind C K, [Link]., SELECT 36

 Calculation of Amplifier
Parameters
✓The main parameters of a JFET are
(i) A.C. drain resistance
(ii) transconductance
(iii) amplification factor.
a.c. drain resistance (r ).
d

It is the ratio of change in drain-source voltage (ΔVDS) to the change in drain current
(ΔID) at constant gate-source voltage

It is clear that above the pinch-off voltage, the change in ID is small for a change in
VDS because the curve is almost flat. Therefore, the drain resistance of a JFET has a
large value, ranging from 10 kΩ to 1 MΩ.
Dr. Aravind C K, [Link]., SELECT 37
✓Transconductance ( g f s ).
✓It is the ratio of change in drain current ( I ) to the change in gate-source
D

voltage (V ) at constant drain-source voltage.

GS

✓Amplification factor ( μ ). It is the ratio of change in drain-source voltage

( V ) to the change in gate-source voltage ( V ) at a constant drain
DS GS

current.

Dr. Aravind C K, [Link]., SELECT 38

Relation Among JFET Parameters

Dr. Aravind C K, [Link]., SELECT 39

Dr. Aravind C K, [Link]., SELECT 40
JFET Biasing

Dr. Aravind C K, [Link]., SELECT 41

 JFET Biasing
✓Two most commonly used methods are (i) self-bias (ii) potential divider
method

Dr. Aravind C K, [Link]., SELECT 42

 JFET with Voltage-Divider Bias

✓The circuit is so designed that I R is larger

D S

than V2 so that VGS is negative. This provides

correct bias voltage.

✓ The advantage of this method of biasing is

that it provides good stability of the operating
point
Dr. Aravind C K, [Link]., SELECT 43
✓Determine ID and VGS for the JFET with voltage-divider bias in Fig. given
that VD = 7V.

Dr. Aravind C K, [Link]., SELECT 44

Effect of RS on the resulting Q-point

Dr. Aravind C K, [Link]., SELECT 45

Transfer Characteristics

Dr. Aravind C K, [Link]., SELECT 46

✓It should be obvious from the above that given IDSS and VP (as is normally
provided on specification sheets) the level of ID can be found for any level of
VGS

Dr. Aravind C K, [Link]., SELECT 47

 ✓Sketch the transfer curve defined by IDSS
=12 mA and VP=-6 V.

Dr. Aravind C K, [Link]., SELECT 48

Dr. Aravind C K, [Link]., SELECT 49
JFET VOLTAGE-DIVIDER CONFIGURATION

Dr. Aravind C K, [Link]., SELECT 50

AC Analysis

Dr. Aravind C K, [Link]., SELECT 51

Dr. Aravind C K, [Link]., SELECT 52
 FET SMALL-SIGNAL MODEL
✓The ac analysis of an FET configuration requires that a small-signal ac
model for the FET.

✓The gate-to-source voltage controls the drain-to-source (channel) current

of an FET.

ID= gfs VGS

gfs=gm= transconductance factor

Dr. Aravind C K, [Link]., SELECT 53

 Graphical Determination of gm
✓gm is actually the slope of the characteristics at the point of operation

Dr. Aravind C K, [Link]., SELECT 54

✓Determine the magnitude of gm for a JFET with IDSS 8=mA and VP=-4V at the
following dc bias points:
✓(a) V =-0.5 V.
GS

✓(b) V =-1.5 V.
GS

✓(c) V =-2.5 V.
GS

Dr. Aravind C K, [Link]., SELECT 55

✓Determine the following for the network of Fig.
(a) IDQ and VGSQ.
(b) VD.
(c) VS.
(d) VDS.
(e) VDG.

Dr. Aravind C K, [Link]., SELECT 56

Dr. Aravind C K, [Link]., SELECT 57
Dr. Aravind C K, [Link]., SELECT 58
Dr. Aravind C K, [Link]., SELECT 59