Objective: Realize the R-S and D-flip flops and verify their truth table.
Apparatus Required
Proteus Software, Desktop
Theory
The memory elements used in clocked sequential circuits are called flip-flops. These
circuits are binary cells capable of storing one bit of information. A flip-flop circuit has two
outputs, one for the normal value and one for the complement value of the bit stored in it. A
flip-flop circuit can be constructed from two NAND gates or two NOR gates.
(a) Logic Diagram (b) Truth table
Figure 34: SR Latch using NOR
RS Flip Flop: The SR flip-flop is one of the fundamental parts of the sequential circuit
logic. SR flip-flop is a memory device and a binary data of 1 – bit can be stored in it. SR
flip-flop has two stable states in which it can store data in the form of either binary zero or
binary one. Like all flip-flops, an SR flip-flop is also an edge sensitive device.
SR flip–flop is one of the most vital components in digital logic and it is also the most basic
sequential circuit that is possible. The S and R in SR flip-flop means ‘SET’ and ‘RESET’
respectively. Hence it is also called Set–Reset flip- flop.
The symbolic representation of the SR Flip Flop is shown below.
(a) Logic Diagram
(b) (b) Graphical Symbol
Figure 35: RS Flip Flop using clock
(a) Truth table (b) characteristic equation
Figure: RS Flip flop characteristics
D Flip Flop: The D flip-flop is a modification of the clocked RS flip-flop. NAND
gates 1 and 2 form a basic flip-flop and gates 3 and 4 modify it into a clocked RS flip-
flop. The D input goes directly to the S input, and its complement is applied to the R
input. As long as the clock pulse input is at 0, gates 3 and 4 have a 1 in their outputs,
regardless of the value of the other inputs.
Logic Diagram
(a) Truth table (b) characteristic equation
Figure: D Flip flop characteristics
Result: