Static Timing Analysis Overview

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Static Timing Analysis Overview

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aparichitbhadouriya2002

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STA Tutorial

By Vishwa

1. Types of clocks
2. Clock uncertainity
3. Timing path
4. Arrival time
5. Required time
6. Slack
7. Cppr & crpr
8. Slew (Transition delay)
9. Propogation delay
10. Timing Arcs
11. unateness
12. Jitter
13. Crosstalk
14. skew
15. Clk-q delay
16. Timing models
17. Timing exceptions
18. Library setup and hold time
19. Setup and Hold analysis
20. GBA-PBA analysis
21. Data to data check
22. Latch timing
23. Load
24. Clock checks
25. Transistor level circuit for flops
26. Negative and positive latch transistor level operation
27. Time borrowing
28. Timing graph
 Convert logic gates into nodes
 Convert pins to nodes
29. On-Chip-Variation
 Sources of variation – etching
 Sources of variation - oxide thickness
 Relationship between resistance, drain current and delay
 OCV based setup timing analysis
 Setup timing analysis after pessimism removal
 OCV based hold timing analysis
 Hold timing analysis after pessimism removal
30. AOCV & POCV
31. Derating Factor
32. Static and dynamic power
33. Wire load model
34. Spef
35. Capacitance and it’s types
36. STA Fixes at signoff stage
37. DRC

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Static Timing Analysis Overview

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Static Timing Analysis Overview

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STA Tutorial

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