MOSFET Amplifier Analysis Tutorial
MOSFET Amplifier Analysis Tutorial
The ratio of RG1/RG2 defines VGS, adjusting bias points for thermal stability and operational efficiency by maintaining a consistent threshold voltage range while adapting to potential drops. This stability ensures the transistor remains in saturation or desired region for flipping polarity requirements and enhances DC biasing edge that mitigates thermally-driven drifts.
To draw the small-signal equivalent circuit, replace all DC sources with short circuits and capacitors with open circuits at mid-band frequencies. Calculate gm from gm = 2 * ID/VGS and ro as VA/ID. Use these to find Rin, Rout, and determine AM = Vout/Vin, considering the voltage dividers formed with RL and other resistive components.
Determining poles involves identifying reactive components' time constants with nodes they influence. Use fPi = 1/(2πRiCi) for estimating poles, where Ri and Ci are the resistance-capacitance pairs effective at points of interest. The zeros come from transfer function factorization after solving for impedance paths. The lower 3 dB cutoff frequency (fL) relates to focusing on dominant low-frequency pole if any.
For mid-band voltage gain, identify transconductance gm of the MOSFET and effective load resistance RL'. The gain is given by AV = -gm * RL', where RL' includes RD and additional load contributions through parallel or cascading elements. The known parameters of kn, Vth, Vdd allow for finding VGS, ID, leading to a calculation of gm = 2 * ID / (VGS - Vt)
The contribution of reactive components is evaluated by calculating how capacitive reactance changes with frequency, especially using hand-calculated or simulated Bode plots. Internal capacitances like Cgs and Cgd influence the gain-bandwidth product and pole locations as frequency shifts. These values are typically used to form equivalent low-pass filters or assess Miller Effect implications at expected operating frequencies.
To maximize symmetric signal swing, set the quiescent point (Q-point) such that the transistor operates in the saturation region with maximum headroom. RD is calculated by setting Vds = (Vdd - ID*RD)/2 at the midpoint of the load line in ID-VDS characteristics. This aligns the DC operation for maximum symmetric swing while maintaining operation within the saturation limits.
The open-loop gain A and feedback factor β define the gain-feedback product Aβ = A*β. Af = A / (1 + Aβ) and is solved once these factors are identified. Output resistance Ro and its feedback-modified counterpart Rof are evaluated using the resistive network analysis, considering the roles of gm, RD, ro2, RF, and RL under neglect of ro1 for simplification. Rof can be adjusted based on β's effect on equivalent output impedance.
Lower and upper cutoff frequencies are determined by RC high-pass and low-pass filter characteristics, analyzing time constants of Cc1 with RG1 and RG2 (for lower cutoff) and internal capacitance like Cgs for high cutoff frequency. The bandwidth is the frequency range between these cuts, influenced by the amplifier's rapid response fall-off after upper cutoff and gain drop before lower cutoff.
The source voltage Vx at the upper transistor of a MOSFET is calculated considering the threshold voltage (VT) and the mobility-related parameter (μnCox). Drain current is influenced by VGS, VT, and the transconductance factor as per the quadratic characteristic equations of the MOSFET.
The overall voltage gain expression for a circuit with a signal generator and amplifier can be given by the product of the amplifier's voltage gain and the load effect. The unloaded voltage gain is 100, and with a connected load RL, the voltage across it becomes 4 Vpp. This can be used to back out RL using the formula for voltage division and iterating on the source resistance Rs. Generally, Rs is determined by matching the theorems, matching known values such as the unloaded and loaded output, and resolving Rs from those conditions.