MP2698

5V, All-in-One Power Bank Solution IC

with 3.6A Boost Current and
5.0A Fast-Charging Capability

DESCRIPTION FEATURES
The MP2698 is a highly integrated, flexible,  4.0V to 6.0V Operating Voltage Range
switch-mode, battery charge management and  Up to 24V Sustainable Input Voltage
system power-path management device  Input Source BC1.2 and Non-Standard
designed for single-cell Li-ion and Li-polymer Adapter Detection
batteries for use in a wide range of portable  Integrated Input Current-Based and Input
applications. Voltage-Based Power Management
The IC uses two operating modes, charge Function
mode and boost mode, to manage system and  Up to 5.0A Programmable Charge Current
battery power based on the state of the input  Reverse Boost Operation Mode with up to
and output. 3.6A Boost Current and 5V Voltage for
System Power
When input power is present, the MP2698
 Output USB Type Detection
operates in charge mode. The device detects
 Analog Voltage Output IB Pin for Battery-
the battery voltage automatically and charges
Current Monitoring
the battery in four phases: trickle current charge,
pre-charge, constant-current charge, and  Programmable 3.1V to 4.675V Charge
constant-voltage charge. Voltage with 0.5% Accuracy
 Four LEDs Battery Gauge Indicators
In the absence of an input source, the MP2698  JEITA-Compatible Negative Temperature
switches to boost mode to power SYS from the Coefficient (NTC) Protection
battery. The IC supports BC1.2 output by  Programmable Timer Back-Up Protection
identifying the request through DP2/DM2.  Thermal Regulation and Thermal Shutdown
To guarantee safe operation, the IC includes  USB Output Cable Impedance
input over-voltage protection (OVP), battery Compensation
over-voltage protection (OVP), thermal  Integrated Short-Circuit Protection (SCP)
shutdown, battery temperature monitoring, and and Over-Voltage Protection (OVP) for
a programmable timer to prevent the prolonged Pass-Through Path
charging of an abnormal battery.  Integrated SCP and OVP for Boost Mode
With the I2C interface, the IC can flexibly  Integrated 8-Bit SAR ADC for Battery
program the charging and boosting parameters, Voltage Measurement
such as input current limit, charging current,  Available in a QFN-28 (4mmx4mm)
battery regulation (charge-full) voltage, safety Package
timer, boost output current limit, and so on. The
IC can also provide the operation status
APPLICATIONS
through the I2C registers and battery status via  Sub-Battery Applications
four LEDs.  Power-Bank Applications for Smartphones,
Tablets, and Other Portable Devices
The MP2698 is available in a QFN-28
All MPS parts are lead-free, halogen-free, and adhere to the RoHS
(4mmx4mm) package. directive. For MPS green status, please visit the MPS website under
Quality Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are
trademarks of Monolithic Power Systems, Inc. or its subsidiaries.

MP2698 Rev. 1.0 [Link] 1

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

TYPICAL APPLICATION
USBOUT
5V OUTPUT

IB SYS CSYS
DM2
Apple
PMID BC1.2
Q2
Charge
(Output)
DP2
CPMID BST
USBIN VIN Q3
L1 RS1 ICHG
5V INPUT SW
VBATT
Q1 IBATT
CSP CBATT
CIN Battery
Q4
BATT
DM1 Apple VREFNTC
BC1.2 MP2698
Charge
DP1 (Input) NTC
STAT
INT
CE LED1
AP
LED2
SCL
SDA LED3
LED4
PB VCC
VCC
AGND PGND
C4

MP2698 Rev. 1.0 [Link] 2

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

ORDERING INFORMATION
Part Number* Package Top Marking
MP2698GR-xxxx** QFN-28 (4mmx4mm) See Below
EV2698-R-00A Evaluation Kit (w/ MCU) See Below
EVKT-2698 Evaluation Kit (w/ USB Dongle) See Below
*For Tape & Reel, add suffix –Z (e.g.: MP2698GR–xxxx-Z).
**"xxxx" is the register setting option. The factory default is "0000". This content can be viewed in the I2C Register
Map section on page 25. For customized options, please contact an MPS FAE to obtain an "xxxx" value.

TOP MARKING

MPS: MPS prefix

Y: Year code
WW: Week code
MP2698: Part number
LLLLLL: Lot number

EVALUATION KIT EVKT-2698

EVKT-2698 Kit contents: (Items below can be ordered separately)
# Part Number Item Quantity
1 EV2698-R-01A MP2698 evaluation board 1
Includes one USB-to-I2C dongle, one USB cable, one
2 EVKT-USBI2C-02-Bag 1
ribbon cable
USB thumb drive that stores the GUI installation file
3 Tdrive-2698 1
and supplemental documents.

Order direct from [Link] or our distributors.

EVKT-2698 Evaluation Kit Set-Up

MP2698 Rev. 1.0 [Link] 3

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

PACKAGE REFERENCE
TOP VIEW

QFN-28 (4mmx4mm)

PIN FUNCTIONS
Package
Name I/O Description
Pin #
Positive line of the USB data line pair for BC1.2 detection. Connect a 3MΩ
1 DP1 I/O
resistor from DP1 to GND.
Positive line of the USB data line pair for BC1.2 detection. Connect a 3MΩ
2 DM1 I/O
resistor from DM1 to GND.
3 AGND Power Analog ground. Connect AGND (pin 3) with PGND.
Press button input. A low-to-high edge invokes the USB2 detection and power
4 PB I
output. PB should be tied high when not in use.
5 SYS Power System power supply. Place a >1µF ceramic capacitor from SYS to PGND.
Positive line of the output USB data line pair for output. DP2 together with
6 DP2 I/O DM2 implements USB2 host port detection automatically. Connect a 1MΩ
resistor from DP2 to GND.
Negative line of the output USB date line pair for output. DM2 together with
7 DM2 I/O DP2 implements USB2 host port detection automatically. Connect a 1MΩ
resistor from DM2 to GND.
Logic input pin to charge and discharge the battery. CE at active high
8 CE I
enables the battery charging and discharging operation.
Open-drain interrupt output. INT can send a charging status and fault
9 INT O
interrupt signal to the host.
10 SCL I/O I2C interface clock. Connect SCL to the logic rail through a 10kΩ resistor.
11 SDA I/O I2C interface data. Connect SDA to the logic rail through a 10kΩ resistor.

MP2698 Rev. 1.0 [Link] 4

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

PIN FUNCTIONS (continued)

Package
Name I/O Description
Pin #
12 LED1 O
13 LED2 O Battery gauge indicator output. Connect a resistor and an LED in series from
14 LED3 O LEDx to VCC.
15 LED4 O
16 STAT O Indicator for charging operation.
Battery current representation. The IB current indicates the charge current to
17 IB O the battery in charge mode and the discharge current out of the battery in boost
mode. Connect a resistor from IB to AGND to get proper current information.
18 CSP I Positive battery terminal / battery charge current sense negative input.
19 BATT I Battery positive terminal.
Temperature sense input. Connect a negative temperature coefficient
thermistor to NTC. Program the hot and cold temperature window with a resistor
20 NTC I
divider from VREFNTC to NTC to GND. Charging is suspended when the NTC
voltage is out of its range.
21 VREFNTC O Reference voltage output for powering up the NTC.
22 AGND Power Analog ground. Place AGND (pin 22) far away from the noisy power ground.
Internal circuit power supply. Bypass VCC to AGND with a 10µF ceramic
23 VCC I
capacitor. VCC cannot carry an external load higher than 30mA.
Bootstrap. Connect a bootstrap capacitor between BST and SW to form a
24 BST I floating supply across the power switch driver to drive the power switch’s gate
above the supply voltage.
25 PGND Power Power ground.
26 SW Power Switching output node.
Power input of the power stage. Connect PMID to the drain of the reverse-
blocking MOSFET and the drain of the high-side MOSFET internally. Bypass
27 PMID Power
PMID with ceramic capacitors (≥47μF) from PMID to PGND as close to the IC
as possible.
Power input of the IC from USB1. Place a ceramic capacitor (≥10μF) from
28 VIN Power
VIN to PGND as close to the IC as possible.

MP2698 Rev. 1.0 [Link] 5

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance (4)

θJA θJC
VIN, PMID, SYS to PGND ............ -0.3V to +24V QFN-28 (4mmx4mm)..............44......... 9 .... °C/W
SW to PGND ..........-0.3V (-2V for 20ns) to +24V
NOTES:
BST to PGND ............................. SW to SW + 6V 1) Exceeding these ratings may damage the device.
BATT to PGND ............................ -0.3V to +5.3V 2) The maximum allowable power dissipation is a function of the
All other pins to AGND ................. -0.3V to +6.0V maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
Continuous power dissipation (TA = +25°C) (2) TA. The maximum allowable continuous power dissipation at
........................................................................ 2W any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
Junction temperature ................................ 150°C dissipation produces an excessive die temperature, causing
Lead temperature (solder) ........................ 260°C the regulator to go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
Storage temperature .................-65°C to +150°C damage.
3) The device is not guaranteed to function outside of its
Recommended Operating Conditions (3) operating conditions.
Supply voltage (VIN) ........................ 4.0V to 6.0V 4) Measured on JESD51-7, 4-layer PCB.
IIN .................................................................... 3A
ISYS ....................................................... up to 3.6A
ICC ........................................................ up to 5.0A
VBATT .................................................... up to 4.5V
Operating junction temp. (TJ) ....-40°C to +125°C

MP2698 Rev. 1.0 [Link] 6

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

ELECTRICAL CHARACTERISTICS
VIN = 5.0V, VBATT = 3.5V, RS1 = 10mΩ, TA = +25°C, unless otherwise noted.
Parameters Symbol Condition Min Typ Max Units
VIN to PMID switch (Q1) on
RIN to PMID 32 mΩ
resistance
PMID to SYS switch (Q2) on
RPMID to SYS 32 mΩ
resistance
High-side switch on resistance RHS 18 mΩ
Low-side switch on resistance RLS 8 mΩ
Peak current limit for high-side
IPEAK_HS Charger CC mode 9.0 A
switch
Peak current limit for low-side Boost mode (REG0C[7:5] =
IPEAK_LS 8.0 A
switch 100)
Operating frequency FSW 550 kHz
VCC LDO output voltage VVCC VIN = 5V, IVCC = 100mA 4.35 4.50 4.65 V
VCC UVLO VCC_UVLO VCC rising 2.0 2.2 2.4 V
VCC UVLO hysteresis 280 mV
VCC POR for IIC VCC_POR VCC rising 2 V
VCC POR hysteresis 150 mV
Charge Mode
VIN > VIN_UVLO, VIN > VBATT,
1.35 1.70 mA
charge disabled, SYS float
Input quiescent current IQ  VIN > VIN_UVLO, VIN > VBATT,
charge enabled, BATT 2.0 2.4 mA
and SYS float
Input under-voltage lockout VIN_ULVO VIN falling 3.13 3.28 V
Input VULVO hysteresis 320 mV
VIN rising 360 460 570 mV
VIN vs. VBATT headroom
VIN falling 60 140 210 mV
VIN over-voltage protection VIN_OVP VIN rising 6 V
VIN over-voltage protection
180 mV
hysteresis
System over-current
ISYSOCP 4.0 5.5 6.5 A
protection threshold
System over-current blanking
TSYSOCBLK 3 ms
time
System over-current recover
TSYSRECVR 300 ms
time
VIN under-voltage protection
VIN_UVP VIN falling 3.15 V
detection
VIN under-voltage protection
400 mV
detection hysteresis
Discharge dummy load at VIN RIN_DUM 55 Ω
Discharge dummy load at SYS RSYS_DUM 25 Ω

MP2698 Rev. 1.0 [Link] 7

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

ELECTRICAL CHARACTERISTICS (continued)

VIN = 5.0V, VBATT = 3.5V, RS1 = 10mΩ, TA = +25°C, unless otherwise noted.
Parameter Symbol Condition Min Typ Max Units
Battery termination (charge
VBATT_REG Depends on the I2C setting 3.100 4.675 V
full) voltage [I2C]
REG04[7:2] = 101100, VBATT_REG
-0.5 0.5
Charge voltage regulation = 4.2V
%
accuracy REG04[7:2] = 110010, VBATT_REG
-0.5 0.5
= 4.35V
Constant-current charge
ICC Depends on the I2C setting 0.5 5.0 A
current [I2C]
REG02[7:2] = 100011, ICC = 4A -5 5 %
Charge current regulation
REG02[7:2] = 001010, ICC = 1.5A -5 5 %
accuracy
REG02[7:2] = 000000, ICC = 0.5A -15 15 %
Battery pre-charge threshold REG04[4] = 1, VBATT rising 2.85 3.00 3.15 V
VBATT_PRE
[I2C] REG04[4] = 0, VBATT rising 2.65 2.80 2.95
Battery pre-charge hysteresis VBATT falling 200 mV
Battery short threshold VBATT_TC VBATT rising 1.9 2.0 2.1 V
Battery short threshold
VBATT falling 250 mV
hysteresis
Trickle charge current ITC VBATT = 1V, RS1 = 10mΩ 100 mA
Depends on the I2C setting, RS1
Pre-charge current [I2C] IPRE 100 1600 mA
= 10mΩ
REG03[7:4] = 0011, IPRE =
Pre-charge current accuracy 400mA, VBATT = 2.6V, RS1 = -20 20 %
10mΩ
Termination current [I2C] ITERM Depends on the l2C setting 200 1700 mA
REG03[3:0] = 0000, ITERM =
Termination current accuracy 200mA, VBATT_REG = 4.2V, RS1 = 80 220 mA
10mΩ
Recharge threshold below
VRECH REG04[0] = 1 270 mV
VBATT_REG
Input Voltage- and Input Current-Based Power Path
Input voltage regulation REG00[6:3] = 1010, VIN = 5V,
-3 3 %
accuracy VIN_REG = 4.68V
Input current limit IIN_LMT REG00[2:0] = 111 2707 2850 3000 mA
Protection
Battery over-voltage Rising, as a percentage of 103.5 VBATT_
VBATT_OVP
protection VBATT_REG % REG

Battery over-voltage Falling, as a percentage of VBATT_

2.0%
protection hysteresis VBATT_REG REG

Thermal shutdown rising

TJ_SHDN TJ rising 150 °C
threshold (5)
Thermal shutdown hysteresis
(5) 20 °C

MP2698 Rev. 1.0 [Link] 8

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

ELECTRICAL CHARACTERISTICS (continued)

VIN = 5.0V, VBATT = 3.5V, RS1 = 10mΩ, TA = +25°C, unless otherwise noted.
Parameter Symbol Condition Min Typ Max Units
VREFNTC voltage VVREFNTC VIN = 5V, IVREFNTC = 1mA 4.8 V
NTC low temp rising
VCOLD As a percentage of VVREFNTC 70.4% 71.0% 71.6% VREFNTC
threshold
NTC low temp rising
As a percentage of VVREFNTC 0.7% VREFNTC
threshold hysteresis
NTC cool temp rising
VCOOL As a percentage of VVREFNTC 68.5% 69.0% 69.5% VREFNTC
threshold
NTC cool temp rising
As a percentage of VVREFNTC 0.7% VREFNTC
threshold hysteresis
NTC warm temp falling
VWARM As a percentage of VVREFNTC 55.5% 56.1% 56.7% VREFNTC
threshold
NTC warm temp falling
As a percentage of VVREFNTC 1.2% VREFNTC
threshold hysteresis
NTC hot temp falling
VHOT As a percentage of VVREFNTC 47.6% 48.1% 48.6% VREFNTC
threshold
NTC hot temp falling
As a percentage of VVREFNTC 1.2% VREFNTC
threshold hysteresis
Boost Mode
VIN < VIN_UVLO, VBATT = 4.2V,
Standby quiescent current IQ_STB 18 22 μA
boost off (sleep mode)
ISYS = 0, VPMID = 5.5V, boost
Boost quiescent current IQ_BST 2.3 mA
enabled, VBATT = 4.2V
REG07[5:4] = 00, VOUT(BST) =
Boost output voltage at PMID VPMID_BST 5.05 5.15 5.25 V
5V, ISYS = 10mA
Boost output voltage As a percentage of VOUT(BST),
-2 2 %
accuracy ISYS = 10mA
Boost output PMID power
VPMID rising 4.75 V
good
VBATT = 3.6V, VPMID falling 3.85 V
Boost output under-voltage VPMID_BST_
protection VBATT = 4.2V, VPMID falling,
UVLO 160 mV
higher than VBATT
REG07[5:4] = 00, 5V boost
Boost output over-voltage mode, VBATT = 3.7V, boost is
VOVP_BST_5V 5.8 6.1 6.3 V
protection threshold enabled, force a voltage at
SYS until switching is off
Boost output over-voltage
protection threshold 400 mV
hysteresis
Programmable range 0.9 3.6 A
Boost output current limit [I2C] IBST_LIMT REG05[2:0] = 111,
3.6 A
VBATT = 3.7V, 5V output

MP2698 Rev. 1.0 [Link] 9

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

ELECTRICAL CHARACTERISTICS (continued)

VIN = 5.0V, VBATT = 3.5V, RS1 = 10mΩ, TA = +25°C, unless otherwise noted.
Parameter Symbol Condition Min Typ Max Units
During boosting 2.5 V
Battery voltage UVLO VBATT_UVLO
Before boost starts 2.9 V
System no load to turn-off Output current in boost mode,
IBST_OFF 50 80 110 mA
boost automatically VSYS = 5V, VBATT = 3.7V
Battery current is below IOFF in
Delay for light load turn-off 36 S
boost mode
IBATT = 1A (discharge) 0.4 V
IB voltage output VIB Battery current indication
-5 5 %
tolerance, IBATT = 1A
Logic IO Pin Characteristics
Low logic voltage threshold VL 0.4 V
High logic voltage threshold VH 1.3 V
Input DP1/DM1 USB Detection
DP1 voltage source VDP1_SRC IDP1_SRC < 250µA 0.5 0.6 0.7 V
DM1 voltage source VDM1_SRC IDM1_SRC < 250µA 0.5 0.6 0.7 V
DP1 pull-up voltage source VDP1_UP 3 3.3 3.6 V
DM1 pull-up voltage source VDM1_UP 3 3.3 3.6 V
Data detect voltage VDAT_REF 0.25 0.325 0.4 V
Data connect detect current
IDP_SRC 7 13 μA
source
DM1 pull-down resistance RDM_DOWN 14.3 20 24.8 kΩ
DM1 sink current IDM1_SINK 50 100 150 μA
DP1 sink current IDP1_SINK 50 100 150 μA
Leakage current input IDP_LKG -1 1 μA
DP1/DM1 IDM_LKG -1 1 μA
Output DP2/DM2 USB Detection
DP2 starting voltage VDP2_LGC 2.5 2.7 2.9 V
DM2 starting voltage VDM2_LGC 2.5 2.7 2.9 V
DP2/DM2 short resistance RSHORT 85 200 Ω
Pull-down resistor in DM2 RPULL_DOWN 14.3 20 24.8 kΩ
DCP detection voltage VDCP 0.3 1.1 V
DCP delay time TDCP 0.8 1 1.2 s
2 (5)
I C Interface (SDA, SCL)
Input high threshold level VPULL_UP = 1.8V, SDA and SCL 1.3 V
Input low threshold level VPULL_UP = 1.8V, SDA and SCL 0.4 V
Output low threshold level ISINK = 5mA 0.4 V
I2C clock frequency FSCL 400 kHz
Indication and Logic
LED1, LED2, LED3, LED4,
VLED_Low Sink 5mA 0.4 V
STAT pin output low voltage

MP2698 Rev. 1.0 [Link] 10

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

ELECTRICAL CHARACTERISTICS (continued)

VIN = 5.0V, VBATT = 3.5V, RS1 = 10mΩ, TA = +25°C, unless otherwise noted.
Parameter Symbol Condition Min Typ Max Units
Press Button (PB)
PB pull-up resistance RPB PB pulled up to VCC 350 kΩ
PB input logic low voltage VL_PB 0.4 V
PB input logic high voltage VH_PB 1.2 V
Digital Clock and Watchdog Timer
Digital clock FDIG1 VREF LDO enabled 1000 kHz
Watchdog timer tWDT REG05H bit[5:4] = 01 40 s
ADC for Battery Voltage
Effective resolution (current) 8 bits
Conversion time (5) tSR_CONV 20 µs
NOTE:
5) Guaranteed by design

MP2698 Rev. 1.0 [Link] 11

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

TYPICAL PERFORMANCE CHARACTERISTICS

CIN = 10μF, CBATT = 44μF, CPMID = 22μF, CSYS = 1μF, L1 = 2.2μH, RS1 = 10mΩ, real/simulation
battery load, TA = 25°C, unless otherwise noted.
VBATT_REG vs. Temperature VBATT_OVP_R vs. Temperature

106.0
VBATT_REG_4.35V (V)

4.4 105.0

VBATT_OVP_R (%)
104.0

103.0
4.3
102.0

101.0

4.2 100.0
-50 0 50 100 -50 0 50 100
TEMPERATURE (°C) TEMPERATURE (°C)
ICC_5A vs. Temperature Boost_Out_5V vs. Temperature

5.40
5500
5.30
BOOST_OUT_5V (V)

5200
5.20
ICC_5A (mA)

4900
5.10
4600
5.00

4300 4.90

4000 4.80
-50 0 50 100 -50 0 50 100
TEMPERATURE (°C) TEMPERATURE (°C)
FSW vs. Temperature I_OLIM vs. Temperature
570 4750

4500
550
I_OLIM (mA)

4250
Fsw (KHz)

530 4000

3750
510
3500

490 3250
-50 0 50 100 -50 0 50 100
TEMPERATURE (°C) TEMPERATURE (°C)

MP2698 Rev. 1.0 [Link] 12

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

CIN = 10μF, CBATT = 44μF, CPMID = 22μF, CSYS = 1μF, L1 = 2.2μH, RS1 = 10mΩ, real/simulation
battery load, TA = 25°C, unless otherwise noted.
Charge Profile Steady State Waveform
Ramp-up BATT, VIN = 5.5V, ICC = 4A Pre-charge, VIN = 5V, ITC = 100mA, VBATT =
1.5V
CH1: VIN CH1: VIN
1V/div. 1V/div.

CH2: VBATT
1V/div.

CH2: VBATT
2V/div.
CH4: IL
500mA/div.
CH4: IBATT
1A/div.
CH3: VSW CH3: VSW
5V/div. 5V/div.
10s/div. 4μs/div.

Steady State Waveform Steady State Waveform

Pre-charge, VIN = 5V, IPRE = 400mA, VBATT = CC charge, VIN = 5V, ICC = 4A, VBATT = 3V
2.6V
CH1: VIN CH1: VIN
1V/div. 1V/div.
CH2: VBATT CH2: VBATT
1V/div. 1V/div.
CH4: IL
1A/div.

CH4: IL
500mA/div.

CH3: VSW
CH3: VSW
5V/div.
5V/div.
4μs/div. 2μs/div.

CC Charge Efficiency CV Charge Efficiency

ICC = 3A VBATT = 4.2V
1
0.97
0.95
0.95 0.9
EFFICIENCY (%)

EFFICIENCY (%)

0.93 0.85
0.8
0.91
0.75
0.89
0.7
0.87 0.65
0.85 0.6
2.8 3.3 3.8 4.3 0 1 2 3
V_BATT (V) I_BATT (V)

MP2698 Rev. 1.0 [Link] 13

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

CIN = 10μF, CBATT = 44μF, CPMID = 22μF, CSYS = 1μF, L1 = 2.2μH, RS1 = 10mΩ, real/simulation
battery load, TA = 25°C, unless otherwise noted.
Steady State Waveform EN On Waveform
Boost, SYS = 5V/3.6A, VBATT = 3.0V Boost, SYS = 5V/3.6A, VBATT = 3.0V
CH2: VSYS CH1: VPDIM
２V/div. 1V/div.
CH1: VBATT
1V/div.
CH4: IL
2A/div.
CH2: VSYS
2V/div.
CH4: ISYS
1A/div.

CH3: VSW
CH3: VSW
2V/div.
5V/div.
1μs/div. 1ms/div.

EN Off Waveform Discharge Efficiency @ BATT = 3.7V

Boost, SYS = 5V/3.6A, VBATT = 3.0V VSYS = 5V

1
CH1: VPDIM
1V/div.
0.9
CH4: ISYS
EFFICIENCY (%)

1A/div.
0.8

CH2: VSYS 0.7

2V/div.

0.6
CH3: VSW
5V/div.
4ms/div. 0.5
0.01 0.1 1
IOUT (A)

MP2698 Rev. 1.0 [Link] 14

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

BLOCK DIAGRAM

PMID SYS DM2 DP2

Q2 Charge USB2
USB1 Output
Pump
K2*IIN Signaling
Charge BST
Pump Current Limit
DP1 A4

DM1 A3 K3*ISYS
VIN
SW
Q1 QH
Current

A2
Sense CSP
QL
VIN Driver A1
Voltage BATT
Clamp Detect
K1*ICHG
PWM
LDO Signal PGND

A3
VBATT

VCC Mode VREFNTC

Control PWM Controller
Sleep
Mode
NTC
VNTC
PB

Control Logic&
Mode Selection K1*ICHG
AGND

CE
JEITA
INT
SDA
IB
SCL
VBATT_Full
GMV
STAT VBATT
IPRE / ICC
250mV
BATT+

LED1
VIN

GMI
K1*ICHG
LED2 IIN_REF I2C
Indication

GMINI
K2*IIN Setting
LED3
K3*VIN
LED4 GMINV VREG_Ref
VBATT
TRef
GMT
TJ

Thermal
Protection

Figure 1: Charge Mode

MP2698 Rev. 1.0 [Link] 15

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

BLOCK DIAGRAM (continued)

Figure 2: Boost Mode

MP2698 Rev. 1.0 [Link] 16

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

OPERATION In charge mode, the internal VCC LDO is

enabled when the following conditions are valid:
The MP2698 is an I2C-controlled, synchronous
switching charger with bidirectional operation  VPMID > VCC_POR (2V)
for a boost function that can step up battery  No thermal shutdown
voltage to power the system. Depending on the
input and output status, the MP2698 operates The VCC load capability should not be higher
in one of the three modes: charge mode, boost than 30mA.
mode, or sleep mode. In charge mode, the IC Input Power Status Indication
supports a precision Li-ion or Li-polymer The IC qualifies the voltage and current of the
charging system for single-cell applications. In input source before start-up. The input source
boost mode, the IC boosts the battery voltage must meet the following requirements:
to SYS for powering systems. In sleep mode,
the IC stops charging or boosting and operates  VIN > VBATT + 460mV
at a low current from the input or the battery to  VIN > VIN_UVLO
reduce power consumption when the IC is not
operating. The IC monitors USB1 and USB2 to Once the input power source meets the
ensure a smooth transition between different conditions above, the system status register
modes of operation. REG08 bit[2] asserts that the input power is
good, and DP1/DM1 detection begins if enabled.
Power Supply Then the step-down converter is ready to
The internal bias circuit of the IC is powered by operate.
the highest voltage of either VPMID or VBATT. All of the above conditions are monitored
When VCC rises above the VCC_POR threshold, continuously, and the charge cycle is
the I2C interface is ready for communication, suspended once one of the conditions exits the
and all registers are reset to the default value. limit.
The host can access all registers.
CHARGER MODE OPERATION
VCC supplies the internal bias circuits and the
high-side and low-side MOSFET gate drivers. Charge Cycle
The pull-up rail of STAT can also be connected In charge mode, the IC has five control loops to
to VCC (see Figure 3). regulate the input voltage, input current, charge
current, charge voltage, and device junction
temperature.
When the input power is qualified as a good
power supply, the IC checks the battery voltage
to provide four main charging phases: trickle-
charge, pre-charge, constant-current charge,
and constant-voltage charge.
1. Phase 1 (trickle-charge): If the battery
voltage is lower than VBATT_TC (2.1V), a
trickle-charging current of 100mA is applied
on the battery, which helps reset the
protection circuit in the battery pack.
2. Phase 2 (pre-charge): When the battery
Figure 3: VCC Power Supply Circuit voltage exceeds VBATT_TC, the IC starts to
pre-charge the deeply depleted battery
In boost mode, the VCC LDO is enabled once safely until the battery voltage reaches the
boost is enabled. pre-charge to fast-charge threshold
(VBATT_PRE). The pre-charge current can be
programmed via the I2C register REG03
bit[7:4].

MP2698 Rev. 1.0 [Link] 17

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

3. Phase 3 (constant-current charge): When help the system design meet the thermal
the battery voltage exceeds VBATT_PRE (set requirement in different applications. The
via REG04 bit[1]), the IC enters a constant- junction temperature regulation threshold can
current charge (fast-charge) phase. The fast be set via REG06 bit[1:0]. A new charge cycle
charge current can be programmed as high begins when the following conditions are valid:
as 5A via REG02 bit[7:2].
 The input power is re-plugged, and USB1
4. Phase 4 (constant-voltage charge): When ready.
the battery voltage rises to the pre-
 Battery charging is enabled by the I2C, and
programmed battery regulation (charge-full)
CE is forced to a high logic.
voltage (VBATT_REG) set via REG04 bit[7:2],
the charge current begins to taper off.  No thermistor fault.
The charge cycle is considered completed  No battery over-voltage.
when the charge current reaches the battery-full Automatic Recharge
termination threshold (ITERM) set via REG03
bit[3:0], assuming that the termination function When the battery is charged completely or
is enabled via REG05 bit[7]. charging is terminated, the battery may be
discharged because of the system consumption
During the entire charging process, the actual or self-discharge function. When the battery
charge current may be less than the register voltage is discharged below the recharge
setting due to other loop regulations, such as threshold (programmable via REG04 bit[0]), the
dynamic power management (DPM) regulation IC begins another new charging cycle
(input current or input voltage loops) or thermal automatically without having to restart a
regulation. The thermal regulation reduces the charging cycle manually if the input power is
charge current so the IC junction temperature valid.
does not exceed the preset limit. The multiple
thermal regulation thresholds from 60 - 120°C

Figure 4: Battery Charge Profile

MP2698 Rev. 1.0 [Link] 18

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

Battery Over-Voltage Protection (OVP) The safety timer is reset at the beginning of a
The IC has battery over-voltage protection new charging cycle and can also be reset by
(OVP). If the battery voltage exceeds the toggling VIN or CE. The following actions can
battery over-voltage threshold (103.5% of the restart the safety timer:
battery regulation voltage), charging is disabled.  A new charge cycle is kicked in.
Under this condition, an internal current source
draws a current from BATT to decrease the  Toggle CE high to low to high (charge
battery voltage and protect the battery. enabled).
When battery OVP occurs, only the charging is  Write REG05 bit[3] from 0 to 1 (safety timer
disabled, and the pass-through path is still on. enabled).
CE Control  Write REG01 bit[7] from 0 to 1 (software
CE is a logic input pin for enabling or disabling reset) with REG0B bit[6] = 1.
battery charging or restarting a new charging The IC can suspend the timer automatically
cycle. Battery charging is enabled when REG01 when any fault occurs.
bit[5:4] is set to 01 and CE is pulled to logic low.
Input Voltage-Based and Input Current-
Indication Based Power Management
Apart from multiple status bits designed in the To meet the maximum current limit in USB
I2C register, the IC also has a hardware status specifications and avoid overloading the
output pin (STAT). The status of STAT in adapter, the IC features both input current and
different cases is shown in Table 1. input voltage power management by monitoring
Table 1: Operation Indications the input current and input voltage continuously.
The total input current limit can be programmed
Charging State STAT
in the MP2698 to prevent the input source from
In charging Low
being overloaded. When the input current
Charging complete, sleep
High reaches the limit, the charge current tapers off
mode, charge disable
Charging suspend, battery to keep the input current from increasing further.
Blinking at 1Hz
float If the preset input current limit is higher than the
Safety Timer adapter rating, the back-up input voltage-based
power management also works to prevent the
The IC provides both a pre-charge and
input source from being overloaded. When the
complete-charge safety timer to prevent
input voltage falls below the input voltage
extending the charging cycle due to abnormal
regulation point due to the heavy load, the
battery conditions. The total safety timer for
charge current is also reduced to keep the input
both trickle charge and pre-charge is one hour
voltage from dropping further.
when the battery voltage is lower than VBATT_PRE.
The complete charge safety timer starts when System Over-Current Protection (OCP)
the battery enters fast-charge mode. The fast- The MP2698 also features a system over-
charge safety timer can be programmed current protection (OCP) threshold in charge
through the I2C. The safety timer feature can be mode. If the current still exceeds the OCP
disabled via the I2C. The safety timer does not current (4.5A) after 3ms of blanking time, Q2 is
operate in boost mode. turned off. A fast-off function turns off Q2
quickly when the system current exceeds 8A.
After 300ms, Q2 is turned on again to check if
the OCP has been removed or not.

MP2698 Rev. 1.0 [Link] 19

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

Negative Temperature Coefficient (NTC) Input USB BC1.2 Detection

Thermistor The IC contains a DP1/DM1-based input source
The IC monitors the battery’s temperature detection to set the input current limit
continuously by measuring the voltage at the automatically. DP1/DM1 detection includes a
NTC pins in both charge mode and discharge standard USB BC1.2 and non-standard adapter.
mode. This voltage is determined by the USB1 BC1.2 detection can be forced in host
resistive divider, whose ratio is produced by mode by writing 1 to REG0B bit[0] (see Table 2).
different resistances of the NTC thermistor
When the input source is plugged in, the USB
under different ambient temperatures of the
BC1.2 can identify a standard downstream port
battery.
(SDP), charging downstream port (CDP), and
The IC sets a pre-determined upper and lower dedicated charging port (DCP).
bound of the range internally. If the NTC Table 2: Input Current Limit vs. USB Type
voltage exits this range, then the temperature is
DP1/DM1 Detection REG0F [3:0]
outside of the safe operating limit. At this time,
Apple 1A 0010
charging is stopped unless the operating
Apple 2.1A 0011
temperature returns to the safe range.
Apple 2.4A 0100
To satisfy the JEITA requirement, there are four SDP 0101
temperature thresholds: the cold battery CDP 0110
threshold (TNTC < 0°C), the cool battery DCP 0111
threshold (0°C < TNTC < 10°C), the warm battery Interrupt to Host (INT)
threshold (45°C < TNTC < 60°C), and the hot
The IC also has an alert mechanism, which can
battery threshold (TNTC > 60°C). For a given
output an interrupt signal via INT to alert the
NTC thermistor, these temperatures correspond
system of the operation by outputting a 400μs
to the VCOLD, VCOOL, VWARM, and VHOT.
low-state INT pulse. All of the below events can
When VNTC < VHOT or VNTC > VCOLD, the charging trigger the INT output:
is suspended. When VHOT < VNTC < VWARM, the
 Good input source detected
battery regulation (charge-full) voltage
(VBATT_REG) is reduced by 150mV compared to  USB2 load is plugged in
the programmable threshold. When VCOOL <  Charge is enabled
VNTC < VCOLD, the charging current is reduced to  Charge done
half of the programmable charge current.
 Pre-charge to CC charge
NTC protection can be disabled via REG07  Battery short
bit[3]. When REG07 bit[3] is set to 0, NTC is
 VIN or IN PPM
disabled, and the VREFNTC is disconnected
from VCC.  Any fault in REG09
Maximum Charge Current 1C
The INT output is designed as an open-drain
structure and requires an external pull-up
0 .5C voltage source in real operation.
Thermal Regulation and Thermal Shutdown
Maximum Charge Voltage: 4 .25V
The IC monitors the internal junction
(4 .2 V Typical) temperature continuously to maximize power
.
deliver and avoid overheating the chip. When
4 05 V Maximum
the internal junction temperature reaches the
preset limit, the IC begins reducing the charge
Cold Cool Normal Warm Hot current to prevent higher power dissipation.
T1 T2 T3 T4 When the junction temperature reaches 150°C,
( 0DegC) ( 10DegC) (45DegC) (60 DegC) the pulse-width modulation (PWM) step-down
Figure 5: NTC Window converters are shut down.

MP2698 Rev. 1.0 [Link] 20

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

Battery Current Analog Output Boost Over-Voltage Protection (OVP)

The IC has an IB pin to get the real-time battery The MP2698 also features boost output OVP.
current value in both charge and boost mode. The IC monitors the voltage at SYS
The IB voltage is a fraction of the charge continuously in boost mode. Once VSYS
current and indicates the charge current flowing exceeds VOVP_BST, the MP2698 stops
in and out of the battery during charge/boost switching and turn off Q2. Simultaneously, the
mode. Calculate this voltage with Equation (1): REG09 bit[6] is set to 1, and a 25Ω discharge
dummy load is turned on to discharge the
VIB = IBATT x 0.41(V) (1)
system voltage to protect the rear-end device.
BOOST MODE OPERATION Once VPMID returns to the normal range, the
The IC is able to supply a regulated 5V/3.6A boost and Q2 are turned on again.
output at SYS for powering the system. The IC Boost Over-Current Limit and Short-Circuit
does not enter the boost mode if the battery is Protection
below the weak battery threshold to ensure that In normal boost operation, the MP2698
the battery is not drained. To enable boost
monitors the current flowing through Q2
mode, the input voltage at VIN must be below
continuously. When the boost output current
1.0V. The boost operation can be enabled exceeds the boost output current limit set via
when CE is high. REG05 bit[2:0], the output current loop takes
The boost output current limit can be selected control, and the boost output voltage drops.
as 900mA - 3.6A via I2C (REG05 bit[2:0]). When VSYS drops below the minimum of 4V and
During boost mode, the status register REG08 VBATT + 200mV, Q2 is forced off. After 300ms,
bit[7:6] is set to 11. Boost operation can be Q2 turns on again. If VSYS rises higher than
enabled only when the following conditions are 4.75V within 3ms, Q2 is fully on. Otherwise, Q2
valid. is turned off again.
 VBATT > VBATT_UVLO (2.9V) USB2 Plug-In Detection
 CE is high In sleep mode, SYS is pulled up to VCC with an
internal 6kΩ resistor, and the SYS voltage is
 VIN < 1V monitored. Once the system voltage drops to
 REG0DH bit[6] = 0 80% of VCC, the USB2 plug-in is detected, and
DP2/DM2 detection is initiated.
Once boost is enabled, the IC boosts the PMID
to 5.2V first. Then, the block MOSFET (Q2) is Output DP2/DM2 Detection
regulated linearly with the current limit of IOLIM. Once the USB2 plug-in is detected or the PB
When VSYS is charged above 4.75V within 3ms, falling edge is detected, the IC begins
Q2 is fully turned on. Otherwise, Q2 turns back DP2/DM2 detection.
off and attempts to turn on again after 300ms.
Initially, DP2 and DM2 are connected to 2.7V
In boost mode, the IC employs a fixed 550kHz with an internal resistance of 23kΩ, and the
PWM step-up switching regulator that switches DP2/DM2 voltage is monitored. If DP2 or DM2
from PWM operation to pulse-skipping is lower than 1.7V for 8ms, the 2.7V reference
operation at light load. is disconnected, and DP2 and DM2 are tied
together with a 100Ω resistor.
Battery Under-Voltage Protection (UVLO)
During boost operation, once the battery Automatic Off at Light Load
voltage is below 2.5V, the boost is latched off, The boost turns off automatically if the load
and the REG0DH bit[6] is set to 1. When the current flowing out from SYS is below 80mA for
battery is charged again and VBATT is higher 36s.
than 2.9V, the REG0DH bit[6] can be reset to 0.

MP2698 Rev. 1.0 [Link] 21

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

Thermal Shutdown Protection in Boost Four Led Drivers for Voltage-Based Battery
Mode The IC provides four LED drivers for voltage-
Thermal shutdown protection is active in boost based fuel gauge indication. When USB1 is
mode. Once the junction temperature rises present, LED1 - LEDx is on with the highest bit
above 150°C, the IC enters thermal shutdown blinking. When USB2 is plugged in and boost is
and does not resume normal operation until the enabled, LED1 - LEDx are blinking until the
junction temperature drops below 120°C. boost is turned off (see Table 3).
Sleeping Mode The LEDx indication can be controlled by the
When the input power source is missing and host. The host determines the LED1 - LEDx
boost is disabled, the IC enters sleep mode. on/off function according to the battery voltage
During sleep mode, all MOSFETs are turned off result in REG12 and sends a control command
to minimize leakage and extend the battery run- to REG13 bit[3:0].
time. During the voltage measurement, the battery
Impedance Compensation for Boost Output impedance should be compensated via the I2C
REG06 bit[7:5] based on the battery current to
The IC allows the user to compensate the
get a precise battery voltage.
intrinsic resistance of Q2 and the USB2 output
cable voltage drop by adjusting the boost output PB Control
voltage according to the system load current. PB is used to control the boost mode enable
Additionally, a maximum allowed regulated function. A low-to-high rising edge wakes up the
voltage is set for safety conditions. Calculate device and the boost.
the BST system voltage with Equation (2):
Series Interface
VBST_SYS = VOUT(BST) + (ISYS x RSYS_COMP) (2)
The IC uses an I2C-compatible interface for
Where VBST_SYS is the boost regulation voltage, flexible charging parameters setting and
VOUT(BST) is the system boost voltage set via the instantaneous device status reporting. The I2C
I2C, ISYS is the real-time system load current is a bidirectional, two-wire serial interface. Only
during the operation, and RSYS_COMP is the line two bus lines are required: a serial data line
resistance compensation setting in REG01 (SDA) and a serial clock line (SCL).
bit[3:1].
The I2C interface supports both standard mode
(up to 100kbits) and fast mode (up to 400kbits).
Table 3: LED Indication Table
Mode VBATT SOC LED1 LED2 LED3 LED4
VBATT < 3.6V <25% Flash Off Off Off
[3.6V, 3.8V) [25%, 50%) On Flash Off Off
Charging [3.8V, 4.0V) [50%, 75%) On On Flash Off
CV mode,[4.0V, 4.2V),
[75%, 100%) On On On Flash
Not terminated
VBATT ≥ 4.0, terminated 100% On On On On

VBATT ≥ 4.05V >75% Flash Flash Flash Flash

[3.85V, 4.05V) [50%, 75%) Flash Flash Flash Off
Discharging
[3.65V, 3.85V) [25%, 50%) Flash Flash Flash Off
(all off after 5s)
[VBAT_ULVO, 3.65V) [0%, 25%) Flash Off Off Off
<VBAT_ULVO [0%, 5%) Off Off Off Off

MP2698 Rev. 1.0 [Link] 22

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

Both SDA and SCL are bidirectional lines master into a wait state (clock stretching). Data
connecting to the positive supply voltage via a transfer then continues when the slave is ready
current source or pull-up resistor. When the bus for another byte of data and releases the clock
is free, both lines are high. The SDA and SCL line (SCL).
are both open-drain pins.
The acknowledge bit takes place after every
The data on the SDA line must be stable during byte. The acknowledge bit allows the receiver
the high period of the clock. The high or low to signal the transmitter that the byte was
state of the data line can change only when the received successfully and another byte may be
clock signal on the SCL line is low. One clock sent. All clock pulses, including the
pulse is generated for each data bit transferred. acknowledge bit (the ninth clock pulse), are
generated by the master.
All transactions begin with a start (S) command
and can be terminated by a stop (P) command. The transmitter releases the SDA line during
A high-to-low transition on the SDA line while the acknowledge clock pulse so that the
SCL is high defines a start condition. A low-to- receiver can pull the SDA line low and remains
high transition on the SDA line when the SCL is high during the ninth clock pulse. This is the
high defines a stop condition. “not acknowledge” signal. The master can then
generate either a stop to abort the transfer or a
Start and stop conditions are always generated
repeated start to begin a new transfer.
by the master. The bus is considered to be busy
after the start condition. The bus is considered to After the start, a slave address is sent. This
be free after the stop condition. Every byte on address is seven bits long followed by an
the SDA line must be eight bits long. The eighth data direction bit (r/w). A zero indicates
number of bytes to be transmitted per transfer is a transmission (write), and a one indicates a
unrestricted. Each byte must be followed by an request for data (read).
acknowledge bit. Data is transferred with the
If the register address is not defined, the
most significant bit (MSB) first. If a slave cannot
charger IC sends back NACK and returns to an
receive or transmit another complete byte of
idle state.
data until it has performed another function, it
can hold the clock line (SCL) low to force the

Figure 6: Bit Transfer on the I2C Bus

SDA

SCL
START (S) STOP (P)

Figure 7: Start and Stop Conditions

MP2698 Rev. 1.0 [Link] 23

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

Fi
gure 8: Data Transfer on the I2C Bus

Figure 9: Complete Data Transfer

Figure 10: Single Write

Figure 11: Single Read

Figure 12: Multi Write

Figure 13: Multi Read

MP2698 Rev. 1.0 [Link] 24

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

I2C REGISTER MAP

IC Address: 6BH
Register Name Address R/W Description
REG00 0x00 r/w Input voltage regulation setting and input current limit setting.
REG01 0x01 r/w USB2 cable impedance compensation and register reset enable.
REG02 0x02 r/w Charge current setting and safety timer setting.
REG03 0x03 r/w Pre-charge current setting and termination current level setting.
Battery regulation voltage, pre-charge to CC threshold and auto-recharge
REG04 0x04 r/w
threshold.
REG05 0x05 r/w Boost output current limit setting, charge termination setting.
REG06 0x06 r/w Battery impedance compensation and junction temperature loop setting.
REG07 0x07 r/w Miscellaneous control.
REG08 0x08 r Status register.
REG09 0x09 r Fault register.
REG0A 0x0A na Part information.
REG0B 0x0B r/w Charge control register.
REG0C 0x0C r/w USB2 protocol control register.
REG0D 0x0D r USB2 status register.
REG0E 0x0E r USB1 status register.
REG0F 0x0F r USB2 detection results.
REG12 0x12 r Battery real percentage against the battery regulation (charge-full) voltage.
REG13 0x13 r LED indication control.

MP2698 Rev. 1.0 [Link] 25

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

REG 00H

REG_RST
Reset by

Reset by
WTD
POR

R/W
Bit Name Description Comment

0: disable
7 EN_HIZ 0 Y N r/w Turn off Q1, Q2, Q3, Q4
1: enable
6 VIN_REG [3] 1 Y Y r/w 640mV
Input voltage regulation
5 VIN_REG [2] 0 Y Y r/w 320mV setting.
4 VIN_REG [1] 1 Y Y r/w 160mV Offset: 3.88V
Range: 0 to 1.2V
3 VIN_REG [0] 0 Y Y r/w 80mV Default: 800mV (4.68V)
000: 100mA
2 IIN_LIM [2] 1 Y Y N/A 001: 500mA
010: 1000mA
011: 1500mA Input current limit setting.
1 IIN_LIM [1] 1 Y Y N/A
100: 1800mA Default: 3000mA
101: 2100mA
0 IIN_LIM [0] 1 Y Y N/A 110: 2400mA
111: 3000mA

REG 01H
REG_RST
Reset by

Reset by
WTD
POR

R/W

Bit Name Description Comment

Used to reset all registers to

0: keep current setting default.
7 REG_RST 0 Y Y r/w
1: reset After reset, this bit goes back
to 0 automatically.
Used to reset the watchdog
WTD_TMR 0: normal timer.
6 0 Y N r/w
_RST 1: reset After reset, this bit goes back
to 0 automatically.
0: Q2 disable Only valid when REG0BH
5 Q2_EN 0 Y N r/w
1: Q2 enable bit[6] = 1 .
0: boost disable Only valid when REG0BH
4 BST_EN 0 Y Y r/w
1: boost enable bit[6] = 1.
3 RSYS_CMP [2] 0 Y Y r/w 80mΩ Used to compensate for the
2 RSYS_CMP [1] 0 Y Y r/w 40mΩ USB cable voltage drop.

1 RSYS_CMP [0] 0 Y Y r/w 20mΩ Default: 0mΩ

0 Reserved 0 N/A N/A N/A N/A Bit reserved.

MP2698 Rev. 1.0 [Link] 26

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

REG 02H

REG_RST
Reset by

Reset by
WTD
POR

R/W
Bit Name Description Comment

7 ICC [5] 0 Y Y r/w 3200mA

6 ICC [4] 1 Y Y r/w 1600mA Charge current setting.

5 ICC [3] 0 Y Y r/w 800mA RS1: 10mΩ

Offset: 500mA
4 ICC [2] 1 Y Y r/w 400mA Range: 500mA - 5A
3 ICC [1] 0 Y Y r/w 200mA Default: 2500mA
2 ICC [0] 0 Y Y r/w 100mA
CHG_TMR 00: 5hrs Charge cycle timer setting, if
1 1 Y Y r/w
[1] 01: 8hrs the timer expires, charging is
10: 12hrs stopped.
CHG_TMR
0 1 Y Y r/w 11: 20hrs
[0] Default: 20hrs

REG 03H
REG_RST
Reset by

Reset by
WTD
POR

R/W

Bit Name Description Comment

7 IPRE [3] 0 Y Y r/w 800mA

RS1: 10mΩ
6 IPRE [2] 0 Y Y r/w 400mA Offset: 100mA
5 IPRE [1] 1 Y Y r/w 200mA Range: 100mA - 1600mA
Default: 400mA (0011)
4 IPRE [0] 1 Y Y r/w 100mA
3 ITERM [3] 0 Y Y r/w 800mA
RS1: 10mΩ
2 ITERM [2] 0 Y Y r/w 400mA Offset: 200mA
1 ITERM [1] 0 Y Y r/w 200mA Range: 200mA - 1700mA
Default: 200mA (0000)
0 ITERM [0] 0 Y Y r/w 100mA

MP2698 Rev. 1.0 [Link] 27

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

REG 04H

REG_RST
Reset by

Reset by
WTD
POR

R/W
Bit Name Description Comment

VBATT_REG
7 1 Y Y r/w 800mV
[5]
VBATT_REG
6 1 Y Y r/w 400mV
[4]
VBATT_REG
5 0 Y Y r/w 200mV Offset: 3.1V
[3]
Range: 3.1V - 4.675V
VBATT_REG Default: 4.35V (110010)
4 0 Y Y r/w 100mV
[2]
VBATT_REG
3 1 Y Y r/w 50mV
[1]
VBATT_REG
2 0 Y Y r/w 25mV
[0]
0: 2.8V
1 VBATT_PRE 1 Y Y r/w Default: 3.0V
1: 3.0V
0: 100mV
0 VRECH 1 Y Y r/w Default: 200mV
1: 200mV

REG 05H
REG_RST
Reset by

Reset by
WTD
POR

R/W

Bit Name Description Comment

0: disable
7 EN_TERM 1 Y Y r/w Default: enable
1: enable
0: match ITERM
6 TERM_STAT 0 Y Y r/w 1: indicate before the actual Default: match ITERM
termination (500mA higher) on STAT
WTD_TMR 00: disable timer
5 0 Y N r/w
[1] 01: 40s
Default: 40s
WTD_TMR 10: 80s
4 1 Y N r/w 11: 160s
[0]
Used to enable the charge
EN_ 0: disable cycle timer.
3 1 Y Y r/w
TIMER 1: enable
Default: enable
000: 900mA
2 IOLIM[2] 1 Y Y r/w 001: 1200mA
010: 1500mA
011: 1800mA
1 IOLIM[1] 1 Y Y r/w Default: 3600mA
100: 2000mA
101: 2400mA
0 IOLIM[0] 1 Y Y r/w 110: 3000mA
111: 3600mA

MP2698 Rev. 1.0 [Link] 28

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

REG 06H

REG_RST
Reset by

Reset by
WTD
POR

R/W
Bit Name Description Comment

RBATT_CMP
7 0 Y Y r/w 80mΩ
[2] Used to compensate for the
battery internal resistance and
RBATT_CMP
6 0 Y Y r/w 40mΩ protection IC resistance.
[1]
RBATT_CMP Default: 0mΩ
5 0 Y Y r/w 20mΩ
[0]
4 Reserved 0 N/A N/A N/A N/A
3 Reserved 0 N/A N/A N/A N/A Bit reserved.
2 Reserved 0 N/A N/A N/A N/A

1 TREG [1] 1 Y Y r/w 00: 60°C

01: 80°C
Default: 120°C
10:100°C
0 TREG [1] 1 Y Y r/w 11:120°C

REG 07H
REG_RST
Reset by

Reset by
WTD
POR

R/W

Bit Name Description Comment

Used to detect DM1/DP1 and

USB_DET_ 0: not in DP/DM detection DM2/DP2.
7 0 Y Y r/w
EN 1: forced DP/DM detection After reset, this bit go back to
0 automatically.
6 Reserved 0 N/A N/A r/w N/A Bit reserved.
5 Reserved 0 Y Y r/w N/A Must be set to 0.
4 Reserved 0 Y Y r/w N/A Must be set to 0.
0: disable
3 EN_NTC 1 Y Y r/w Default: enable
1: enable
0: Q1 is forced on
2 Q1_DIS 0 Y N r/w Default: forced on
1: Q1 is forced off
INT_MASK 0: no INT during CHG_FAULT
1 1 Y Y r/w Default: INI in CHG_FAULT
[1] 1: INT in CHG_FAULT
INT_MAST 0: no INT during BAT_FAULT
0 1 Y Y r/w Default: INI in BAT_FAULT
[0] 1: INT in BAT_FAULT

MP2698 Rev. 1.0 [Link] 29

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

REG 08H

REG_RST
Reset by

Reset by
WTD
POR

R/W
Bit Name Description Comment

CHIP_STAT 00: none

7 0 Y Y r
[1] 01: USB1 is SDP or CDP
CHIP_STAT 10: USB1 is DCP or Apple
6 0 Y Y r 11: boost
[0]
CHG_STAT 00: not charging
5 0 Y Y r
[1] 01: trickle charge
CHG_STAT 10: charge
4 0 Y Y r 11: charge done
[0]
PPM_STAT 0: no PPM
3 0 Y Y r
1: VINPPM or IINPPM
0: VIN not good VIN > 3.45V and VIN > VBATT +
2 PG_STAT 0 Y Y r
1: VIN good 460mV
THERM_ 0: normal
1 0 Y Y r
STAT 1: thermal regulation
0 Reserved 0 N/A N/A N/A N/A Bit reserved.

REG 09H
REG_RST
Reset by

Reset by
WTD
POR

R/W

Bit Name Description Comment

WATCHDOG 0: normal
7 0 Y N r
_FAULT 1: watchdog timer expiration
0: normal
BST_
6 0 Y Y r 1: SYS short circuit, or PMID OVP,
FAULT
battery UVLO
5 IC_FAULT [1] 0 Y Y r 000: normal
010: USB1 UV or OV
4 IC_FAULT [0] 0 Y Y r 101: thermal shutdown
110: safety timer expiration
3 IC_FAULT 0 Y Y r 001: battery OVP
NTC_
2 0 Y Y r
FAULT [2] 000: normal
001: NTC cold
NTC_
1 0 Y Y r 010: NTC cool
FAULT [1]
011: NTC warm
NTC_ 100: NTC hot
0 0 Y Y r
FAULT [0]

MP2698 Rev. 1.0 [Link] 30

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

REG 0AH

REG_RST
Reset by

Reset by
WTD
POR

R/W
Bit Name Description Comment

7 Reserved N/A N/A N/A N/A N/A Bit reserved.

6 Reserved N/A N/A N/A N/A N/A Bit reserved.
5 PN [2] 0 N N r
4 PN [1] 1 N N r 011: MP2698
3 PN [0] 1 N N r
NTC_ 0: standard
2 1 N N r
TYPE 1: JEITA
1 Rev [1] 0 N N r
00: first rev
0 Rev [0] 0 N N r

REG 0BH
REG_RST
Reset by

Reset by
WTD
POR

R/W

Bit Name Description Comment

0: disable VIN discharge

7 VIN_DSG 0 Y Y w
1: enable VIN discharge

1: I2C mode, the protocol can

be implemented step-by-step
6 I2C_CTRL 1 Y N w 1: enable I2C control mode by the MCU.
Write this bit to 1 after power-
up.
USB1_ 0: disable USB1 charge
5 1 Y N w
RDY 1: enable USB1 charge
4 Reserved 0 Y Y w N/A Bit reserved.
3 Reserved 0 Y Y w N/A Bit reserved.
2 Reserved 0 Y Y w N/A Bit reserved.
1 Reserved 0 Y Y w N/A Bit reserved.
Used to detect DM1/DP1.
USB1_EN_ 0: disable USB1 type detection
0 0 Y Y w After reset, this bit goes back
DET 1: start USB1 type detection
to 0 automatically.

MP2698 Rev. 1.0 [Link] 31

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

REG 0CH

REG_RST
Reset by

Reset by
WTD
POR

R/W
Bit Name Description Comment

IBATT_
7 1 Y Y r/w
P K[2] 000: 3.3A
Program the peak current limit
001: 5.7A
IBATT_ of the switching MOSFETs.
6 0 Y Y r/w 010: 4.5A
P K[1]
011: 6.8A In buck mode, set these bits to
IBATT_ 100: 8.0A 100.
5 0 Y Y r/w
P K[0]
0: disable SYS discharge
4 SYS_DSG 0 Y Y r/w
1: enable SYS discharge
3 Reserved 1 N/A N/A N/A N/A Bit reserved.
2 Reserved 0 N/A N/A N/A N/A Bit reserved.
Used to detect DM2/DP2.
USB2_EN_ 0: disable USB2 type detection
1 0 Y Y r/w After reset, this bit goes back
DET 1: start USB2 type detection
to 0 automatically.
USB2_EN_ 0: disable USB2 plug-in detection
0 0 Y Y r/w
PLUG 1: enable USB2 plug-in detection

REG 0DH
REG_RST
Reset by

Reset by
WTD
POR

R/W

Bit Name Description Comment

7 Reserved N/A N/A N/A N/A N/A Bit reserved.

When battery UVLO occurs,
this bit is set to 1. Boost is
BATT_ 0: battery not ULVO latched off. This bit is reset to
6 0 Y N r
UVLO 1: battery UVLO 0 when the battery is charged
again and VBATT is higher than
2.9V.
0: Q2 not over current REG01H bit[7] > 0 to clear this
5 Q2_OC 0 Y Y r
1: Q2 over current bit.
Bit reserved for SYS short
4 Reserved 0 N/A N/A N/A N/A
circuit.
0: PMID voltage is not good
3 PMID_OK 0 Y Y r
1: PMID voltage is good
USB2_plug 0: USB2 is not plugged in
2 0 Y Y r
_in 1: USB2 is plugged in
USB1_plug 0: USB1 is not plugged in VIN > 3.45V and VIN > VBATT +
1 0 Y Y r
_in 1: USB1 is plugged in 460mV
USB1_GT_ 0: USB1 voltage is not greater than 1V
0 0 Y Y r
1V 1: USB1 voltage is greater than 1V

MP2698 Rev. 1.0 [Link] 32

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

REG 0EH

REG_RST
Reset by

Reset by
WTD
POR

R/W
Bit Name Description Comment

7 Reserved N/A N/A N/A N/A N/A Bit reserved.

6 Reserved N/A N/A N/A N/A N/A Bit reserved.
0: USB1 not over voltage
5 USB1_OV 0 Y Y r
1: USB1 over voltage
0: USB1 not under voltage
4 USB1_UV 0 Y Y r
1: USB1 under voltage
3 Reserved 0 Y Y r N/A Bit reserved.
2 Reserved 0 Y Y r N/A Bit reserved.
1 Reserved 0 Y Y r N/A Bit reserved.
0 Reserved 0 Y Y r N/A Bit reserved.

REG 0FH
REG_RST
Reset by

Reset by
WTD
POR

R/W

Bit Name Description Comment

7 Reserved N/A N/A N/A N/A N/A Bit reserved.

USB2_
6 0 Y Y r
TYPE[2]
000: none
USB2_ 001: SDP Auto-generated by USB2-type
5 0 Y Y r
TYPE[1] 010: Apple detection.
011: DCP
USB2_
4 0 Y Y r
TYPE[0]
USB1_
3 0 Y Y r 0000: none
TYPE[3]
0001: SAMSUNG 1.2V
USB1_ 0010: Apple 1A
2 0 Y Y r
TYPE[2] 0011: Apple 2.1A Auto-generated by the USB1-
USB1_ 0100: Apple 2.4A type detection.
1 0 Y Y r 0101: SDP
TYPE[1]
0110: CDP
USB1_ 0111: DCP
0 0 Y Y r
TYPE[0]

MP2698 Rev. 1.0 [Link] 33

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

REG 12H

REG_RST
Reset by

Reset by
WTD
POR

R/W
Bit Name Description Comment

7 VBATT [7] 0 Y Y r VBATT_REG/2

6 VBATT [6] 0 Y Y r VBATT_REG/4
5 VBATT [5] 0 Y Y r VBATT_REG/8
4 VBATT [4] 0 Y Y r VBATT_REG/16
3 VBATT [3] 0 Y Y r VBATT_REG/32
2 VBATT [2] 0 Y Y r VBATT_REG/64
1 VBATT [1] 0 Y Y r VBATT_REG/128
0 VBATT [0] 0 Y Y r VBATT_REG/256

REG 13H
REG_RST
Reset by
Reset by

WTD
POR

R/W

Bit Name Description Comment

7 Reserved N/A N/A N/A N/A N/A Bit reserved.

6 Reserved N/A N/A N/A N/A N/A Bit reserved.
5 Reserved N/A N/A N/A N/A N/A Bit reserved.
2
EN_LED_ 0: disable I C write FG_LEDs on/off
4 0 Y N r/w
CTRL 1: enable I2C write FG_LEDs on/off
0: off
3 LED[3] 0 Y N r/w
1: on
0: off
2 LED[2] 0 Y N r/w
1: on
0: off
1 LED[1] 0 Y N r/w
1: on
0: off
0 LED[0] 0 Y N r/w
1: on

MP2698 Rev. 1.0 [Link] 34

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

OTP MAP
# Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0

0x00 N/A Vin regulation voltage Iin limit

0x02 Charge current N/A

0x03 Pre-charge current Termination current

0x04 Battery regulation voltage N/A

0x05 N/A SYS output current limit

USB1 Charge
0x0B N/A N/A
enabled/disabled

OTP DEFAULT
OTP Items Default
Vin regulation voltage 4.68V
Iin limit 3000mA
Charge current 2500mA
Pre-charge current 400mA
Termination current 200mA
Battery regulation voltage 4.35V
SYS output current limit 3.6A
USB1 charge enabled/disabled Enable USB1 charge

MP2698 Rev. 1.0 [Link] 35

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

APPLICATION INFORMATION an MPS FAE for this spreadsheet if necessary.

NTC Function in Charge Mode Selecting the Inductor
An internal resistor divider sets the low Inductor selection is a trade-off between cost,
temperature threshold (VCOLD) and high size, and efficiency. A lower inductance value
temperature threshold (VHOT) at 71%·VVREFNTC corresponds with smaller size but results in
and 48.1%·VVREFNTC, respectively. For a given higher current ripple, higher magnetic hysteretic
NTC thermistor, select an appropriate RT1 and losses, and higher output capacitances.
RT2 to set the NTC window using Equation (3) However, a higher inductance value benefits
and Equation (4): from lower ripple current and smaller output
filter capacitors, but results in higher inductor
VCOLD R T 2 // R NTC _ COLD
  TCOLD  71 % (3) DC resistance (DCR) loss.
VVREFNTC R T1  R T 2 // R NTC _ COLD
Choose an inductor that will not saturate under
VHOT R T 2 // R NTC _ HOT the worst-case load condition.
  THOT  48 .1% (4)
VVREFNTC R T1  R T 2 // R NTC _ HOT
When the MP2698 works in charge mode (as a
Where RNTC_HOT is the value of the NTC resistor buck converter), estimate the required
at the upper bound of its operating temperature inductance with Equation (7):
range, and RNTC_COLD is the value of the NTC VIN  VBATT V
resistor at the lower bound of its operating L  BATT (7)
temperature range. IL _ MAX VIN  fSW

The two resistors, RT1 and RT2, determine the Where VIN is the typical input voltage, VBATT is
upper and lower temperature limits the CC charge threshold, fSW is the switching
independently. This flexibility allows the frequency, and ∆IL_MAX is the maximum peak-to-
MP2638 to operate with most NTC resistors for peak inductor current (usually 30 - 40% of the
different temperature range requirements. CC charge current).
Calculate RT1 and RT2 with Equation (5) and
Equation (6): For a typical 5V input voltage and 35% inductor
current ripple at the corner point between trickle
R NTC _ HOT  R NTC _ COLD  ( TCOLD  THOT ) charge and CC charge (VBATT = 3V, ICC = 2.5A),
R T1  (5)
TCOLD  THOT  (R NTC _ COLD  R NTC _ HOT ) an inductance of 2.2μH fits best.

RNTC _ HOT  RNTC _ COLD  (TCOLD  THOT ) (6) When the MP2698 works in boost mode (as a
RT 2  boost converter), the required inductance value
THOT  (1  TCOLD )  RNTC _ COLD  TCOLD  (1  THOT )  RNTC _ HOT
can be calculated with Equation (8), Equation
For example, the NCP18XH103 thermistor has (9), and Equation (10):
the following electrical characteristics:
VBATT  (VSYS  VBATT )
 At 0°C, RNTC_Cold = 27.22kΩ L (8)
VSYS  fSW  IL _ MAX
 At 50°C, RNTC_Hot = 4.16kΩ
 IL _ MAX  30%  IBATT (MAX ) (9)
Based on Equation (5) and Equation (6), RT1 =
3.29kΩ and RT2 = 11.46kΩ are suitable for an VSYS  ISYS(MAX)
NTC window between 0°C and 50°C. Choose IBATT(MAX)  (10)
approximate values (e.g.: RT1 = 3.32kΩ and RT2 VBATT  
= 11.5kΩ). Where VBATT is the minimum battery voltage, fSW
If no external NTC is available, connect RT1 and is the switching frequency, ∆IL_MAX is the peak-
RT2 to keep the voltage on the NTC pin within to-peak inductor ripple current (approximately
the valid NTC window (e.g.: RT2 = 10kΩ, RT1 = 30% of the maximum battery current IBATT(MAX)),
5.1kΩ). ISYS(MAX) is the system current, and η is the
efficiency.
For convenience, an NTC thermistor design
spreadsheet is available for reference. Contact

MP2698 Rev. 1.0 [Link] 36

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

For ICC_MAX = 5.0A while ISYS_MAX = 3.6A, VTC =

The worst-case inductor current ripple occurs
3V, VIN_MAX = 6V, the maximum ripple current is
when the battery voltage is 3V and the boost
about 2A. Select the PMID capacitors based on
output (VSYS) is 5V. Considering 90% efficiency
the ripple current temperature rise not
and 1.5µH inductance, a 30% inductor current
exceeding 10°C. For best results, use ceramic
ripple results.
capacitors with X7R dielectrics with low ESR
For best results, use an inductor with an and small temperature coefficients. For most
inductance of 2.2μH with a DC current rating no applications, use three 22µF capacitors.
lower than the peak current of the MOSFET. Selecting the Battery Capacitor (CBATT)
For higher efficiency, minimize the inductor’s The battery capacitor (CBATT) is in parallel with
DC resistance. the battery to absorb the high-frequency
Selecting the Input Capacitor (CIN) switching ripple current.
The input capacitor (CIN) reduces both the In charge mode, the capacitor (CBATT) is the
surge current drawn from the input and the output capacitor of the buck converter. The
switching noise from the device. The input output voltage ripple can be calculated with
capacitor impedance at the switching frequency Equation (13):
should be less than the input source impedance
VBATT 1  VBATT / VSYS
to prevent high-frequency switching current rBATT   (13)
from passing to the input. For best results, VBATT 8  CBATT  fSW 2  L
ceramic capacitors with X7R dielectrics are
recommended because of their low ESR and In boost mode, the capacitor (CBATT) is the input
small temperature coefficients. For most capacitor of the boost converter. The input
applications, a 22µF capacitor is sufficient. voltage ripple is the same as the output voltage
ripple calculated from Equation (13).
Selecting the PMID Capacitor (CPMID)
Both charge mode and boost mode have the
Select CPMID at PMID based on the demand of
same battery voltage ripple. The capacitor
the system current ripple.
(CBATT) can be calculated with Equation (14):
In charge mode, the capacitor (CPMID) acts as
1  VTC / VSYS _ MAX
the input capacitor of the buck converter. The CBATT  (14)
input current ripple can be calculated with 8  rBATT _ MAX  fSW 2  L
Equation (11):
To guarantee ±0.5% BATT voltage accuracy,
VTC  ( VIN _ MAX  VTC ) the maximum BATT voltage ripple must not
IRMS _ MAX  ICC _ MAX  (11) exceed 0.5% (e.g.: 0.2%). The worst-case
VIN _ MAX
scenario occurs at the minimum battery voltage
In boost mode, the capacitor (CPMID) is the of the CC charge with the maximum input
output capacitor of the boost converter. CSYS voltage.
keeps the system voltage ripple small and For VSYS_MAX = 6V, VCC_MIN = VTC = 3V, L =
ensures feedback loop stability. The system 2.2µH, fSW = 550kHz, ∆rBATT_MAX = 0.2%, and
current ripple can be calculated with Equation CBATT is 39µF.
(12):
Two 22µF ceramic capacitors with X7R
VTC  (VSYS _ MAX  VTC ) dielectrics capacitor in parallel are sufficient.
IRMS _ MAX  ISYS _ MAX  (12)
VSYS _ MAX

Since the input voltage passes to the system

directly, VIN_MAX = VSYS_MAX, and both charge
mode and boost mode have the same system
current ripple.

MP2698 Rev. 1.0 [Link] 37

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

PCB Layout Guide Lines 3. Place the input capacitor as close to VIN
Efficient PCB layout is critical for meeting and PGND as possible.
specified noise, efficiency, and stability 4. Place the local power capacitors, connected
requirements. Use a star-ground design to keep from the PMID to PGND, as close to the IC
the circuit block currents isolated (power- as possible.
signal/control-signal), which reduces noise-
coupling and ground-bounce issues. A single 5. Place the output inductor close to the IC.
ground plane for this design provides good 6. Connect the output capacitor between the
results. For best results, follow the guidelines inductor and PGND of the IC.
below.
7. Connect the power pads for VIN, PMID,
1. Minimize the high-side switching node (SW, SYS, SW, BATT, and PGND to as many
inductor) trace lengths in the high-current coppers planes on the board as possible for
paths. high-current applications.
2. Keep the switching node short and away This improves thermal performance
from all small control signals, especially the because the board conducts heat away
feedback network. from the IC.

MP2698 Rev. 1.0 [Link] 38

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

TYPICAL APPLICATION CIRCUIT

Figure 14: MP2698 Application Circuit

Table 4: Key BOM of Figure 14

Qty Ref Value Description Package Manufacturer
1 CIN 10μF Ceramic Capacitor;10V; X5R or X7R 1206 Any
3 CPMID 22μF*3 Ceramic Capacitor;10V; X5R or X7R 1206 Any
1 CSYS 1μF Ceramic Capacitor;10V; X5R or X7R 0603 Any
2 CBATT 22μF*2 Ceramic Capacitor;6.3V; X5R or X7R 0805 Any
1 CVCC 10uF Ceramic Capacitor;6.3V; X5R or X7R 0603 Any
1 RS1 10mΩ Film Resistor;1% 1210 Any
1 L1 2.2μH Inductor;2.2μH;Low DCR;ISAT>6A SMD Any

MP2698 Rev. 1.0 [Link] 39

7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
 MP2698 – ALL-IN-ONE SOLUTION IC W/ 3.6A BOOST AND 5.0A FAST CHARGING

PACKAGE INFORMATION
QFN-28 (4mmx4mm)

NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP2698 Rev. 1.0 [Link] 40
7/26/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.