GMSL2 Channel Specification User Guide
Rev 1
10/23
Abstract
The GMSL2 channel specification user guide defines the hardware system design requirements necessary for the proper
operation of GMSL2 devices. Use it in conjunction with the relevant GMSL2 serializer and deserializer data sheets to
develop compliant GMSL2 systems.
Analog Devices Page 1 of 22
Table of Contents
Purpose and Scope ....................................................................................................................................... 3
GMSL2 Channel Descriptions and Definitions ................................................................................................... 4
GMSL2 Overview ........................................................................................................................................... 4
GMSL2 Channel Definition ............................................................................................................................. 4
GMSL2 Channel Frequency Bands ................................................................................................................ 5
GMSL2 Channel S-Parameter Definitions ...................................................................................................... 6
Insertion Loss (S21/Sdd21, S12/Sdd12) ..................................................................................................... 6
Return Loss (S11/Sdd11, S22/Sdd22) ........................................................................................................ 7
GMSL2 System Channel Specification .............................................................................................................. 8
GMSL2 System Channel Compliance ............................................................................................................ 8
GMSL2 Pin-to-Pin Channel Specification ....................................................................................................... 8
Maximum Insertion Loss Specification (Pin-to-Pin Channel) ....................................................................... 8
Maximum Return Loss Specification (Pin-to-Pin Channel) .......................................................................... 9
GMSL2 Crosstalk Specification .................................................................................................................... 10
Crosstalk Specification for the PCB Module.............................................................................................. 10
Crosstalk from GMSL or Other Broadband Signals................................................................................... 11
Crosstalk from Narrowband Signals ......................................................................................................... 11
Crosstalk Specification for the Cable Bundle ............................................................................................ 13
GMSL2 Link Margin Specification ................................................................................................................ 16
GMSL2 Module Channel Specifications........................................................................................................... 16
GMSL2 Module Compliance ........................................................................................................................ 16
Maximum Insertion Loss Specification (PCB and Cable Channels) .............................................................. 17
Maximum Return Loss Specification (PCB and Cable Channels) ................................................................. 19
Revision History............................................................................................................................................... 22
Analog Devices Page 2 of 22
Purpose and Scope
The GMSL2 channel specification defines the hardware system design requirements necessary for the proper operation
of GMSL2 systems, as specified by the device data sheets. It contains both the GMSL2 System Channel Specification and
GMSL2 Module Channel Specifications. This document collectively refers to both specifications as GMSL2 channel
specification.
See this document for important system design considerations, including system development and component evaluation.
Relevant system elements include PCB material, PCB layout, passive PCB components, cable(s), and connectors.
Compliant GMSL2 systems meet or exceed the S-parameter curves, crosstalk specifications, and link margin requirements
detailed in this document.
A compliant GMSL2 system channel has an expected bit error rate (BER) of 1E-15 or better.
Analog Devices Page 3 of 22
GMSL2 Channel Descriptions and Definitions
GMSL2 Overview
GMSL2 devices use Analog Devices’ proprietary second-generation gigabit multimedia serial link (GMSL2) technology to
transport high-speed, serialized data over coax or shielded-twisted pair (STP) cables for automotive camera and display
applications. GMSL2 links operate at fixed data rates, including 3 Gbps or 6 Gbps on the forward channel, and 187Mbps
on the reverse channel, depending on device capabilities and configuration. Figure 2.A shows a block diagram of a typical
GMSL2 system.
Note: The forward channel is defined as serializer-to-deserializer transmission, and the reverse channel is defined as
deserializer-to-serializer transmission.
Figure 2.A. GMSL2 System Block Diagram
GMSL2 Channel Definition
Serializer Module Cable Module Deserializer Module
Serializer PCB Deserializer PCB
SER DES
In-line Connector Assembly
PCB PCB
Cable Channel
Channel Channel
Pin-to-Pin Channel
GMSL2 System Channel
Figure 2.B. GMSL2 Channel Definition
Note: Figure 2.B does not depict AC-coupling capacitors and optional power over coax (PoC) or line-fault components are
not depicted in.
Analog Devices Page 4 of 22
The “GMSL2 system channel” is defined as the pin-to-pin channel from the SIO pin(s) of the serializer to the SIO pin(s) of
the deserializer and consists of the following:
• Serializer PCB channel
• Cable channel
• Deserializer PCB channel
Note: For multilink configurations (i.e., dual link, splitter mode, and reverse splitter mode), each GMSL link is treated as
an independent pin-to-pin channel.
The “GMSL2 module channels” are defined as the individual sub-channels within the GMSL2 system channel. The PCB
channel is defined as the channel from the device SIO pin to the end of the PCB-mounted connector. It includes the trace
itself and any PCB components on the trace (e.g., line-fault resistors, PoC components, electrostatic discharge (ESD)
diodes, common-mode chokes, and other passive components). This channel is also referred to as the serializer or
deserializer PCB channel module and can be evaluated for GMSL2 module compliance.
The cable channel is defined inclusively as the channel comprising all components from the cable connector on the
serializer side to the cable connector on the deserializer side, including the cable(s) and any in-line connector(s). For
applications using cable bundles, the cable crosstalk specification must consider the other conductors in the cable harness.
This channel is also referred to as the cable module and can be evaluated for GMSL2 module compliance.
Note: Meeting module compliance requirements guarantees GMSL2 system channel compliance when implemented with
other compliant modules and cable(s).
GMSL2 Channel Frequency Bands
GMSL2 is a packet-based protocol operating at a fixed-link rate. The GMSL2 forward channel data rate is either 6 Gbps or
3 Gbps; the reverse channel data rate is 187 Mbps. The transmitted/received data rate is a fixed rate based on the data
rate setting and is independent of the payload. For example, if a camera or display application requires 5 Gbps, the forward
channel data rate on the link must be set to 6 Gbps. Idle data fills the unused link capacity.
GMSL2 uses a non-return to zero (NRZ) encoding scheme. A key frequency of NRZ encoding is half-link rate (f½Linkrate).
For the 6 Gbps forward channel bit rate, f½Linkrate = 3 GHz. Note that the maximum frequency is defined in the channel
specification factors in the rise/fall-time dependent signal content above f½Linkrate (Table 1). The attenuation, due to
insertion loss, of the signal at f½Linkrate is the most critical value to consider when exploring the maximum channel
length used in a system. For all NRZ encoding schemes, where bitrate is the serial data rate:
𝑏𝑏𝑏𝑏𝑏𝑏𝑏𝑏𝑏𝑏𝑏𝑏𝑏𝑏
𝑓𝑓½𝐿𝐿𝐿𝐿𝐿𝐿𝐿𝐿𝐿𝐿𝐿𝐿𝐿𝐿𝐿𝐿 =
2
Equation 1. f1/2Linkrate equation
Analog Devices Page 5 of 22
Table 1. Frequency Bandwidth Allocation for GMSL2
MINIMUM MAXIMUM FREQUENCY
GMSL (SPEED) FREQUENCY F½LINKRATE IN CHANNEL SPECIFICATION
Forward Channel (3 Gbps) 50 MHz 1.5 GHz 2.0 GHz
Forward Channel (6 Gbps) 100 MHz 3 GHz 3.5 GHz
Reverse Channel (187 Mbps) 2 MHz 93.5 MHz 400 MHz
The bidirectional transmitter/receiver of GMSL2 necessitates emphasis on return loss. The energy of the forward and
reverse channel overlaps in frequency. So, reflections in the band of the low-speed transmitter and receiver are especially
important considerations when designing the channel. For system optimization, insertion loss must be minimized, and
return loss must be optimized.
GMSL2 Channel S-Parameter Definitions
The GMSL2 channel specification defines minimum or maximum values of scattering parameters (S-parameters) across
the frequency band of interest. S-parameters are defined for insertion loss, return loss. See Figure 2.C and the following
corresponding sections. For the GMSL2 channel specification, the serializer is defined as Port 1, and the deserializer is
defined as Port 2.
Figure 2.C. GMSL2 Channel S-Parameter Definitions
Insertion Loss (S21/Sdd21, S12/Sdd12)
Insertion loss is the energy loss across the transmission channel.
• S21/Sdd21 – Forward channel insertion loss
• S12/Sdd12 – Reverse channel insertion loss
S21/Sdd21 defines the amount of energy loss for the high-speed channel (forward channel), and S12/Sdd12 defines the
amount of energy loss for the low-speed channel (reverse channel). For typical GMSL2 channels consisting of passive PCB
components and cables, S21/Sdd21 and S12/Sdd12 are equal.
For differential applications (i.e., STP), use differential S-parameters (Sdd21 and Sdd12).
Analog Devices Page 6 of 22
Return Loss (S11/Sdd11, S22/Sdd22)
Return loss is the reflected energy back to the transmitter.
• S11/Sdd11 – Forward channel return loss
• S22/Sdd22 – Reverse channel return loss
S11/Sdd11 is used to evaluate the high-speed transmitter energy reflected into the low-speed receiver; S22/Sdd22 is used
to evaluate the reflected energy of the low-speed transmitter back into the high-speed receiver.
For differential applications (i.e., STP), use differential S-parameters (Sdd11 and Sdd22).
Analog Devices Page 7 of 22
GMSL2 System Channel Specification
Figure 3.D. GMSL2 System Channel
GMSL2 System Channel Compliance
A compliant GMSL2 system must meet the overall pin-to-pin channel specification, including the S-parameter curves,
crosstalk specification, and the link margin requirements under worst-case conditions as defined by the system designer.
Worst-case conditions include longest cable (highest insertion loss), cable aging effects, channel degradation due to
temperature, PCB impedance variation, and minimum/maximum system PoC loads. Worst-case conditions can be
simulated. Contact the cable manufacturer and PCB designer for technical advice.
Note: The PCB and cable channels comprising a compliant GMSL2 system channel may not meet the standards required
for GMSL2 module compliance. Modules must be independently evaluated for module compliance. See the GMSL2
Module Channel Specifications section for additional information.
GMSL2 Pin-to-Pin Channel Specification
Maximum Insertion Loss Specification (Pin-to-Pin Channel)
This section defines the maximum insertion loss (i.e., energy loss across the transmission channel) for the pin-to-pin
channel specification.
• S-parameters: S21/Sdd21 and S12/Sdd12
• Single-ended and differential configurations
Table 2. Maximum System Channel Insertion Loss (Pin-to-Pin Channel)
GMSL2 MAXIMUM CHANNEL INSERTION LOSS PIN-TO-PIN
3 Gbps Forward/187 Mbps Reverse 6 Gbps Forward/187 Mbps Reverse
APPLIED BAND 2 MHz to 2 GHz 2 MHz to 3.5 GHz
INSERTION LOSS −19.5 dB at 1.5 GHz −21 dB at 3 GHz
Analog Devices Page 8 of 22
MAXIMUM INSERTION LOSS
PIN-TO-PIN
0
-5
INSERTION LOSS (dB)
-10
-15
-20
3G/187M
6G/187M
-25
0 500 1000 1500 2000 2500 3000 3500
FREQUENCY (MHz)
Figure 3.E. GMSL2 System Channel (Pin-to-Pin Maximum Insertion Loss)
Use the following equations to calculate and plot insertion loss profiles of each forward/reverse channel configuration.
3 Gbps Forward/187 Mbps Reverse
− �7.7 + 0.27�(𝑓𝑓 × 10−6 ) + 2.2 (𝑓𝑓 × 10−9 )� 𝑓𝑓𝑓𝑓𝑓𝑓 2 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 5 𝑀𝑀𝑀𝑀𝑀𝑀
𝐼𝐼𝐼𝐼(𝑓𝑓[𝐻𝐻𝐻𝐻]) = �
− �5.7 + 0.27�(𝑓𝑓 × 10−6 ) + 2.2 (𝑓𝑓 × 10−9 )� 𝑓𝑓𝑓𝑓𝑓𝑓 5 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 2 𝐺𝐺𝐺𝐺𝐺𝐺
Equation 2. Insertion Loss 3 Gbps/187 Mbps
6 Gbps Forward/187 Mbps Reverse
− �3.2 + 0.25�(𝑓𝑓 × 10−6 ) + 0.64 (𝑓𝑓 × 10−9 )� 𝑓𝑓𝑓𝑓𝑓𝑓 2 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 500 𝑀𝑀𝑀𝑀𝑀𝑀
𝐼𝐼𝐼𝐼(𝑓𝑓[𝐻𝐻𝐻𝐻]) = �
− �2.74 + 0.25�(𝑓𝑓 × 10−6 ) + 1.56 (𝑓𝑓 × 10−9 )� 𝑓𝑓𝑓𝑓𝑓𝑓 500 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 3.5 𝐺𝐺𝐺𝐺𝐺𝐺
Equation 3. Insertion Loss 6 Gbps/187 Mbps
Maximum Return Loss Specification (Pin-to-Pin Channel)
This section defines the maximum return loss (i.e., reflected energy back to the transmitter) for the pin-to-pin channel
specification.
• S-parameters: S11/Sdd11 and S22/Sdd22
• Single-ended and differential configurations
Analog Devices Page 9 of 22
MAXIMUM RETURN LOSS
PIN-TO-PIN
0
3G/187M AND 6G/187M
-5
RETURN LOSS (dB)
-10
-15
-20
-25
0 500 1000 1500 2000 2500 3000 3500
FREQUENCY (MHz)
Figure 3.F. GMSL2 System Channel (Pin-to-Pin Maximum Return Loss)
Use the following equations to calculate and plot the return loss profiles of each forward/reverse channel configuration.
3 Gbps Forward/187 Mbps Reverse and 6 Gbps Forward/187 Mbps Reverse
−6 − �0.9 (𝑓𝑓 × 10−6 )� 𝑓𝑓𝑓𝑓𝑓𝑓 2 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 10 𝑀𝑀𝑀𝑀𝑀𝑀
⎧
⎪
⎪− �14.2 + 0.28�(𝑓𝑓 × 10−6 ) + 0.8 (𝑓𝑓 × 10−9 )� 𝑓𝑓𝑓𝑓𝑓𝑓 10 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 200 𝑀𝑀𝑀𝑀𝑀𝑀
𝑅𝑅𝑅𝑅(𝑓𝑓[𝐻𝐻𝐻𝐻]) = −6
⎨−18.3 + 0.02 �(𝑓𝑓 × 10 ) − 200� 𝑓𝑓𝑓𝑓𝑓𝑓 200 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 400 𝑀𝑀𝑀𝑀𝑀𝑀
⎪ −3 −6
⎪5.7 × 10 (𝑓𝑓 ∗ 10 ) − 16.6 𝑓𝑓𝑓𝑓𝑓𝑓 400 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 1500 𝑀𝑀𝑀𝑀𝑀𝑀
⎩−8 𝑓𝑓𝑓𝑓𝑓𝑓 1500 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 3500 𝑀𝑀𝑀𝑀𝑀𝑀
Equation 4. Return Loss (3 Gbps/187 Mbps and 6 Gbps/187 Mbps)
GMSL2 Crosstalk Specification
The GMSL2 crosstalk specification places limits on the permissible parasitic coupling from GMSL2, other high-speed links
(aggressors), and/or noise sources onto a GMSL2 link. Separate specification items for the PCB module at the end of a link
and cable bundle allow system components to be individually developed and evaluated for crosstalk.
Crosstalk Specification for the PCB Module
Crosstalk between multiple ports on a PCB (e.g., an electronic control unit (ECU)) can be characterized in different ways
depending on the source of the crosstalk and whether the interfering signals are narrowband or broadband.
Analog Devices Page 10 of 22
Crosstalk from GMSL or Other Broadband Signals
The setup shown in Figure 3.E is used to measure crosstalk between the different ports (connectors) on a PCB. The data
traffic causing interference is running on Ports 1..N, and crosstalk is measured on Port M of the PCB. The worst-case
crosstalk condition occurs when using cables with minimum insertion loss. This maximizes the received signal power on
Port M. Crosstalk is measured as peak amplitude on Port M using an oscilloscope. The GMSL2 device on Port M should be
configured in squelch mode. Table 3 presents the broadband crosstalk limits.
Table 3. Broadband Crosstalk Limits
FORWARD DATA REVERSE DATA MEASUREMENT MAXIMUM
CONDITIONS
RATE [GB/S] RATE [MB/S] FREQUENCY RANGE [MHz] CROSSTALK
Interferers are any
3 Gbps or 6 Gbps 187.5 Mbps 1 MHz to 4000 MHz <4 mV(p-p) combination of high-
speed links
In Figure 3.E, links from devices 1..N are active. Crosstalk is measured on Port M with device M in the squelch mode.
PASSIVE
DEVICE 1
COMPONENTS COMPANION
(GMSL2 OR P1 CHANNEL
AND PCB DEVICE
OTHER)
TRACES
PASSIVE
DEVICE N
COMPONENTS COMPANION
(GMSL2 OR PN CHANNEL
AND PCB DEVICE
OTHER)
TRACES
PASSIVE
DEVICE M COMPONENTS
PM OSCILLOSCOPE
(GMSL2) AND PCB
TRACES
AC-COUPLED BROADBAND
GAIN BLOCK, 1 MHZ TO 4000
MHZ
Figure 3.G. Broadband Crosstalk Characterization Method
Crosstalk from Narrowband Signals
If the interfering signal is a continuous wave or narrowband signal (e.g., a clock or switching frequency from a voltage
regulator or a PoC circuit), the crosstalk into the GMSL port is measured in mV, as shown in Figure 3.F. If the measured
signal is a continuous wave, use an oscilloscope or a spectrum analyzer to measure the crosstalk voltage on the disturbed
port (convert from dBm to mV). If the interfering signal is a complex waveform (e.g., a modulated waveform), use an
oscilloscope. A low-noise amplifier and bandpass filter may be required to obtain a clean measurement.
The limits in Table 4 are frequency-dependent because the GMSL receiver input amplifier adaptively compensates for the
frequency-dependent loss of the cable by boosting high-frequency gain. The higher the frequency-dependent attenuation
of the cable, the more the high-frequency portion of the received signal is boosted by the serial link receiver. An unwanted
side effect of this high-frequency boost is increased sensitivity to high-frequency crosstalk.
Analog Devices Page 11 of 22
Table 4. Narrowband Crosstalk Limits
FORWARD DATA REVERSE DATA MEASUREMENT FREQUENCY PEAK-TO-PEAK VOLTAGE LIMIT [mV]
RATE RATE RANGE [MHz] (f = FREQUENCY [MHz])
0.1 MHz to 1 MHz 40 − 20 × 𝑙𝑙𝑙𝑙𝑙𝑙10 𝑓𝑓
1 MHz to 10 MHz 40
𝑓𝑓
10 MHz to 100 MHz 40 − 20 × 𝑙𝑙𝑙𝑙𝑙𝑙10 � �
10
3 Gbps or 6 Gbps 187.5 Mbps
100 MHz to 400 MHz 20
𝑓𝑓
400 MHz to 4000 MHz 20 − 18 × 𝑙𝑙𝑙𝑙𝑙𝑙10 � �
400
𝑓𝑓
4000 MHz to 10000 MHz 2 + 80 × 𝑙𝑙𝑙𝑙𝑙𝑙10 � �
4000
Note: These limits include ripple injected by the PoC circuit.
GMSL2 DEVICE CONNEC
OSCILLOSCOPE
IN SQUELCH MODE TOR
CROSSTALK BAND-PASS FILTER LOW-NOISE AMPLIFIER
SOURCE OF INTERFERENCE
Figure 3.H. Measurement Setup for Narrowband Crosstalk
Analog Devices Page 12 of 22
CROSSTALK LIMITS (mV)
vs. FREQUENCY
100
90
PEAK-TO-PEAK VOLTAGE (mV)
80
70
60
50
6G/187M AND 3G/187M
40
30
20
10
0
0.1 1 10 100 1000 10000
FREQUENCY (MHz)
Figure 3.I. Narrowband Crosstalk Limits
Crosstalk Specification for the Cable Bundle
Crosstalk occurs when multiple cables are routed together in a harness. Analog Devices specifies both near-end crosstalk
(NEXT) and far-end crosstalk (FEXT) in case GMSL2 links are routed in the same harness.
Note: The metric for FEXT is Power-Sum Adjusted Crosstalk Ratio – Far End (PS_ACR_F). See Figure 3.I for additional
information.
Table 5. Maximum System Channel Crosstalk Limits for Cable Bundles
DATA RATE FREQUENCY RANGE [MHz] SPECIFICATION LIMIT
NEXT < −50 dB
3 Gbps or 6 Gbps forward, 187.5 Mbps reverse 1 MHz to 4000 MHz
PS_ACR_F < −50 dB
Analog Devices Page 13 of 22
Near-End Cable Bundle Crosstalk
PORT 1
RT
INJECTION PORT 2
PORTS RT
SM1
SM2
PORT N
RT
SMN
MEASUREMENT PORT M
PORTS
RT
Figure 3.J. Near-End Crosstalk (NEXT)
The near-end crosstalk is usually dominant. NEXT is based on the injection and measurement ports shown in Figure 3.H
and is specified as the power sum of the coupling from Ports 1..N into Port M (Equation 10).
𝑁𝑁
𝑁𝑁𝑁𝑁𝑁𝑁𝑁𝑁 = 10 ∗ 𝑙𝑙𝑙𝑙𝑙𝑙 �� 𝑆𝑆𝑀𝑀𝑀𝑀 � [𝑑𝑑𝑑𝑑]
𝑖𝑖=1
Equation 5. Near-End Crosstalk Equation
The NEXT measurement is performed as a sequence of multiport S-parameter measurements using a vector network
analyzer (VNA). The transfer functions from the injection port to measurement port are added in the power domain.
Note: During measurement, all unused ports must be terminated in 50 Ω for coax or 100 Ω for STP.
As an example, assume two interferers with transfer functions SM1 = −60 dB and SM2 = −66 dB. The power sum of SM1
and SM2 is found by converting both parameters from dB to power and converting the sum of power back to dB. NEXT is
calculated as:
−60 𝑑𝑑𝑑𝑑 −66 𝑑𝑑𝑑𝑑
� � � �
𝑁𝑁𝑁𝑁𝑁𝑁𝑁𝑁 = 10 × 𝑙𝑙𝑙𝑙𝑙𝑙 �10 10 + 10 10 � = −59 𝑑𝑑𝑑𝑑
The resulting NEXT = −59 dB satisfies the requirement for NEXT in Table 5.
Analog Devices Page 14 of 22
Far-End Cable Bundle Crosstalk
PORT 1
RT
INJECTION PORT 2
PORTS RT
SM1
SM2
PORT N
RT
SMN
PORT M
PORT P SMP MEASUREMENT
PORT
RT
Figure 3.K. Far-End Crosstalk (FEXT)
Far-end crosstalk (FEXT) is a measure of the crosstalk received at the far end of the cable with the disturbance applied at
the near-end of the cable (Figure 3.I). The metric for FEXT is power-sum adjusted crosstalk ratio – far end (PS_ACR_F). The
received amplitude on the measurement Port M of each interferer is attenuated by the transfer function SMi. Similarly,
the wanted signal received at Port M is attenuated by the insertion loss SMP of the disturbed cable. Assuming that the
transmitted amplitude of all the interfering signals is the same, the far-end crosstalk measure, PS_ACR_F, represents the
ratio of the interferers to the received wanted signal, providing a measure of interference-to-signal ratio in the disturbed
cable. In the dB domain, this becomes a simple subtraction (Equation 11).
𝑁𝑁
PS_ACR_F = 10 ∗ 𝑙𝑙𝑙𝑙𝑙𝑙 �� 𝑆𝑆𝑀𝑀𝑀𝑀 � [dB] − 𝑆𝑆𝑀𝑀𝑀𝑀 [dB]
𝑖𝑖=1
Equation 6. Power-Sum Adjusted Crosstalk Ratio – Far-End Crosstalk Equation
The PS_ACR_F measurement is performed as a sequence of two-port measurements using a vector network analyzer
(VNA). The results are added in the power domain, as shown above.
Note: During measurement, all unused ports must be terminated in 50 Ω for coax or 100 Ω for STP.
As an example, assume two interferers with transfer functions SM1 = −70 dB and SM2 = −70 dB. SMP = −11 dB. The power
sum (calculated in the same manner as NEXT above) of SM1 and SM2 is −67 dB. The resulting far-end crosstalk is PS_ACR_F
= -67dB – (−11 dB) = −56 dB, which meets the requirement for FEXT in Table 5.
Analog Devices Page 15 of 22
GMSL2 Link Margin Specification
Link margin is specifically used to quantitatively test the signal integrity of the GMSL link. The link margin test starts at the
default transmit voltage amplitude for both the forward and reverse channels. The test decreases the transmit amplitude
in 10 mV steps and performs an error check before proceeding to the next test amplitude. The test ends at any point an
error is detected. The link margin is reported as the difference between the default transmitter amplitude and the
amplitude at which the error is detected. Table 6 contains the required minimum link margin for both the forward and
reverse channels.
Table 6. Minimum Required Link Margin
CABLE DATA RATE MINIMUM REQUIRED FORWARD MINIMUM REQUIRED REVERSE
(FORWARD/REVERSE) CHANNEL LINK MARGIN [mV] LINK MARGIN [mV]
COAX/STP 6 Gbps/187 Mbps 150 mV 90 mV
COAX/STP 3 Gbps/187 Mbps 150 mV 90 mV
Note: A link margin tool is available through the Analog Devices GMSL GUI. Alternatively, software support is available for
customers to develop their own implementation of these tools in their software.
GMSL2 Module Channel Specifications
Figure 4.L. GMSL2 Module Channels
GMSL2 Module Compliance
Meeting module compliance requirements guarantees GMSL2 system channel compliance when implemented with other
compliant modules and cable(s).
Analog Devices Page 16 of 22
For GMSL2 module compliance:
• Serializer/deserializer module channels must meet the PCB insertion loss and return loss requirements under
worst-case conditions, as defined by the system designer.
• Cable module channels must meet the cable insertion loss and return loss requirements under worst-case
conditions, as defined by the system designer.
Worst-case conditions include longest cable (highest insertion loss), cable aging effects, channel degradation due to
temperature, PCB impedance variation, or minimum/maximum system PoC loads. Worst-case conditions can be
simulated. Contact the cable manufacturer and PCB designer for technical advice.
Notes:
• A module meeting the GMSL2 module compliance specification is interoperable with other compliant modules.
The cable module specification is allocated such that a 15 m LD302 cable under worst-case operating conditions
meets the specification.
• The PCB and cable channels comprising a compliant GMSL2 system channel may not meet the standards required
for GMSL2 module compliance. Modules must be independently evaluated for GMSL2 module compliance.
Maximum Insertion Loss Specification (PCB and Cable Channels)
This section defines the maximum insertion loss (i.e., energy loss across the transmission channel) for the module
channel specifications.
• S-parameters: S21/Sdd21 and S12/Sdd12
• Single-ended and differential configurations
Table 7. Maximum Insertion Loss (PCB and Cable Channels)
GMSL2 MAXIMUM INSERTION LOSS PCB AND CABLE CHANNELS
3 Gbps Forward/187 Mbps Reverse 6 Gbps Forward/187 Mbps Reverse
APPLIED BAND 2 MHz to 2 GHz 2 MHz to 3.5 GHz
SERIALIZER PCB −2 dB at 1.5 GHz −2 dB at 3 GHz
MODULE
CABLE MODULE −15.5 dB at 1.5 GHz −17 dB at 3 GHz
DESERIALIZER PCB −2 dB at 1.5 GHz −2 dB at 3 GHz
MODULE
Analog Devices Page 17 of 22
MAXIMUM INSERTION LOSS CABLE CHANNEL
0
-5
INSERTION LOSS (dB)
-10
-15
-20 3G/187M 6G/187M
-25
0 500 1000 1500 2000 2500 3000 3500
FREQUENCY (MHz)
Figure 4.M. GMSL2 Cable Channel Insertion Loss
MAXIMUM INSERTION LOSS
PCB CHANNEL
0
-0.5
-1
INSERTION LOSS (dB)
-1.5
-2
-2.5 6G/187M
-3 3G/187M
-3.5
-4
0 500 1000 1500 2000 2500 3000 3500
FREQUENCY (MHz)
Figure 4.N. GMSL2 PCB Channel Insertion Loss
Analog Devices Page 18 of 22
Use the following equations to calculate and plot the insertion loss profiles for both the PCB and cable system segments
of each forward/reverse channel configuration.
3 Gbps Forward/187 Mbps Reverse
−3 𝑑𝑑𝑑𝑑 𝑓𝑓𝑓𝑓𝑓𝑓 2 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 5 𝑀𝑀𝑀𝑀𝑀𝑀
𝐼𝐼𝐼𝐼𝑃𝑃𝑃𝑃𝑃𝑃 (𝑓𝑓[𝐻𝐻𝐻𝐻]) = �
−2 𝑑𝑑𝑑𝑑 𝑓𝑓𝑓𝑓𝑓𝑓 5 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 2 𝐺𝐺𝐺𝐺𝐺𝐺
Equation 7. PCB Insertion Loss (3 Gbps/187 Mbps)
𝐼𝐼𝐼𝐼𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶 (𝑓𝑓[𝐻𝐻𝐻𝐻]) = − �1.7 + 0.27�(𝑓𝑓 × 10−6 ) + 2.2 (𝑓𝑓 × 10−9 )� 𝑓𝑓𝑓𝑓𝑓𝑓 2 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 2 𝐺𝐺𝐺𝐺𝐺𝐺
Equation 8. Cable Insertion Loss (3 Gbps/187 Mbps)
6 Gbps Forward/187 Mbps Reverse
−0.85 𝑓𝑓𝑓𝑓𝑓𝑓 2 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 500 𝑀𝑀𝑀𝑀𝑀𝑀
𝐼𝐼𝐼𝐼𝑃𝑃𝑃𝑃𝑃𝑃 (𝑓𝑓[𝐻𝐻𝐻𝐻]) = � −9
−0.62 − 0.46 (𝑓𝑓 × 10 ) 𝑓𝑓𝑓𝑓𝑓𝑓 500 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 3.5 𝐺𝐺𝐺𝐺𝐺𝐺
Equation 9. PCB Insertion Loss (6 Gbps/1.87 Mbps)
𝐼𝐼𝐼𝐼𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶𝐶 (𝑓𝑓[𝐻𝐻𝐻𝐻]) = − �1.5 + 0.25�(𝑓𝑓 × 10−6 ) + 0.64 (𝑓𝑓 × 10−9 )� 𝑓𝑓𝑓𝑓𝑓𝑓 2 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 3.5 𝐺𝐺𝐺𝐺𝐺𝐺
Equation 10. Cable Insertion Loss (6 Gbps/187 Mbps)
Maximum Return Loss Specification (PCB and Cable Channels)
This section defines the maximum return loss (i.e., reflected energy back to the transmitter) for the module channel
specifications.
• S-parameters: S11/Sdd11 and S22/Sdd22
• Single-ended and differential configurations
Analog Devices Page 19 of 22
MAXIMUM RETURN LOSS
PCB AND CABLE
toc01
0
3G/187M AND 6G/187M
-5
RETURN LOSS (dB)
-10
-15
-20
-25
0 500 1000 1500 2000 2500 3000 3500
FREQUENCY (MHz)
Figure 4.O. Maximum GMSL2 PCB and Cable Channel Return Loss
Note: Return loss is not additive. Thus, there is not an allowable dB value of return loss for each section of the GMSL2 link
(i.e., PCBs and cable). The full link (i.e., pin-to-pin) must meet the above specified return loss allocation.
Use the following equations to calculate and plot the return loss profiles for both the PCB and cable system segments of
each forward/reverse channel configuration.
3 Gbps Forward/187 Mbps Reverse and 6 Gbps Forward/187 Mbps Reverse
−6 − �0.9 (𝑓𝑓 × 10−6 )� 𝑓𝑓𝑓𝑓𝑓𝑓 2 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑜𝑜 10 𝑀𝑀𝑀𝑀𝑀𝑀
⎧
⎪
⎪− �14.2 + 0.28�(𝑓𝑓 × 10−6 ) + 0.8 (𝑓𝑓 × 10−9 )� 𝑓𝑓𝑓𝑓𝑓𝑓 10 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 200 𝑀𝑀𝑀𝑀𝑀𝑀
𝑅𝑅𝑅𝑅(𝑓𝑓[𝐻𝐻𝐻𝐻]) = −6
⎨−18.3 + 0.02 �(𝑓𝑓 × 10 ) − 200� 𝑓𝑓𝑓𝑓𝑓𝑓 200 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 400 𝑀𝑀𝑀𝑀𝑀𝑀
⎪ −3 −6
⎪5.7 × 10 (𝑓𝑓 × 10 ) − 16.6 𝑓𝑓𝑓𝑓𝑓𝑓 400 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 1500 𝑀𝑀𝑀𝑀𝑀𝑀
⎩−8 𝑓𝑓𝑓𝑓𝑓𝑓 1500 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 3500𝑀𝑀𝑀𝑀𝑀𝑀
Equation 11. PCB Return Loss (3 Gbps/187 Mbps and 6 Gbps/187 Mbps)
Analog Devices Page 20 of 22
−6 − �0.9 (𝑓𝑓 × 10−6 )� 𝑓𝑓𝑓𝑓𝑓𝑓 2 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 10 𝑀𝑀𝑀𝑀𝑀𝑀
⎧
⎪
⎪− �14.2 + 0.28�(𝑓𝑓 × 10−6 ) + 0.8 (𝑓𝑓 × 10−9 )� 𝑓𝑓𝑓𝑓𝑓𝑓 10 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 200 𝑀𝑀𝑀𝑀𝑀𝑀
𝑅𝑅𝑅𝑅(𝑓𝑓[𝐻𝐻𝐻𝐻]) = −6
⎨−18.3 + 0.02 �(𝑓𝑓 × 10 ) − 200� 𝑓𝑓𝑓𝑓𝑓𝑓 200 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 400 𝑀𝑀𝑀𝑀𝑀𝑀
⎪ −3 −6
⎪5.7 × 10 (𝑓𝑓 ∗ 10 ) − 16.6 𝑓𝑓𝑓𝑓𝑓𝑓 400 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 1500 𝑀𝑀𝑀𝑀𝑀𝑀
⎩−8 𝑓𝑓𝑓𝑓𝑓𝑓 1500 𝑀𝑀𝑀𝑀𝑀𝑀 𝑡𝑡𝑡𝑡 3500 𝑀𝑀𝑀𝑀𝑀𝑀
Equation 12. Cable Return Loss (3 Gbps/187 Mbps and 6 Gbps/187 Mbps)
Analog Devices Page 21 of 22
Revision History
REVISION REVISION PAGES
DESCRIPTION/CHANGE(S)
NUMBER DATE CHANGED
0 05/23 Initial release —
Extend crosstalk specification down to 100 kHz; removed Return loss tables;
1 10/23 9, 11, 13, 14, 19
Made changes in the NEXT/FEXT equations
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Analog Devices Page 22 of 22