DR.
SUDHIR CHANDRA SUR INSTITUTE OF
TECHNOLOGY & SPORTS COMPLEX
CA2 ASSIGNMENT
Subject Name: - Analog and Digital Electronics
Subject Code: -ESC 301
Subject Code: - PCC-CS (DS) 301
Name: - PRIYANSHU SENGUPTA
Roll Number: - 25530823027
Registration Number: - 232550110051
Department: - CSE (AI & ML)
Semester: - 1st
Year: - 2nd year
Report on Full Adder
Introduction:
A Full Adder is a digital circuit that performs binary
addition of three input bits: two operands and a carry from
the previous position. It outputs two results: the sum and
the carry. Full Adders are commonly used in arithmetic
circuits, particularly in the construction of binary adders,
which form the foundation of arithmetic logic units (ALUs)
in digital systems.
Theory
The Full Adder operates on the principle of binary addition.
It takes three inputs:
A: The first operand bit.
B: The second operand bit.
C_in: The carry bit from the previous addition (if
any).
The Full Adder produces two outputs:
Sum: The sum of the three input bits.
Carry: The carry-out bit that can be passed to the next
addition.
The logic equations for a Full Adder are:
Sum = A ⊕ B ⊕ C_in (XOR gate operation)
Carry = (A & B) | (B & C_in) | (A & C_in) (AND
and OR gate operations) 3. Design
A Full Adder can be designed using basic logic gates:
XOR Gate for computing the sum of A, B, and C_in.
AND Gates and an OR Gate to generate the carry-
out.
Here’s a simple representation of the design:
Inputs: A, B, C_in
Outputs: Sum, Carry
The design includes the following logic gates:
Two XOR gates to compute the sum.
Two AND gates and one OR gate to compute
thecarry.
Truth Table
The Full Adder’s truth table shows the results of the binary
addition for every possible input combination of A, B, and
C_in.
A B C_in Sum Carry
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Conclusion
The Full Adder is an essential building block in digital
circuits, particularly for performing binary arithmetic. It
allows the addition of three bits and outputs a sum and a
carry. Full Adders are widely used in digital electronics,
especially in the design of Arithmetic Logic Units (ALUs)
and binary adders for microprocessors.
References
1. M. Morris Mano, "Digital Logic and Computer
Design," Prentice-Hall.
2. A. Anand Kumar, "Switching Theory and Logic
Design," Pearson Education.
Report 2: Full Adder using a MUX
1. Introduction
A Full Adder can also be implemented using a Multiplexer
(MUX). A multiplexer is a digital switch that selects one of
its inputs and forwards it to the output based on the
selection lines. By utilizing a MUX and properly
configuring the selection inputs, a Full Adder can be
designed.
2. Theory of MUX
A Multiplexer (MUX) is a combinational circuit that
selects one of many input signals and forwards it to the
output based on a select input. For an n-input MUX, n input
lines and log₂(n) selection lines are required. Multiplexers
are widely used in digital systems to reduce the number of
logic gates by selecting pre-computed values based on the
control signals.
3. Designing a Full Adder using MUX
To design a Full Adder using a 4-to-1 MUX:
The inputs A, B, and C_in are used to control the
selection lines.
The sum and carry outputs are generated using
different configurations of the MUX's selection lines.
The Full Adder’s sum output is generated by mapping the
inputs A, B, and C_in to the respective output values,
according to the truth table. Similarly, the carry output is
obtained by routing the appropriate inputs to the MUX.
4. Truth Table
The truth table for the Full Adder using a MUX remains the
same as that for the standard Full Adder:
A B C_in Sum Carry
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
5. Conclusion
The Full Adder can be efficiently implemented using a
Multiplexer (MUX). The use of a MUX reduces the
number of required logic gates and offers flexibility in
routing the signals. This method demonstrates how
multiplexers can be used as universal combinational
devices in digital systems.
6. References
1. M. Morris Mano, "Digital Logic and Computer
Design," Prentice-Hall.
2. A. Anand Kumar, "Switching Theory and Logic
Design," Pearson Education.
Report 3: Design a Full Adder Using Decoder
1. Introduction
A Decoder can also be used to design a Full Adder. A
decoder is a combinational circuit that converts binary
input into a specific output. By using the appropriate input-
output mapping in a decoder, the sum and carry outputs of
a Full Adder can be generated.
2. Theory of Decoder
A Decoder is a logic circuit that converts binary
information from n input lines into 2^n unique outputs. The
decoder activates only one output corresponding to the
binary input. In the case of a Full Adder, a decoder can be
used to generate the required sum and carry outputs based
on the binary inputs.
3. Designing a Full Adder using Decoder
A Full Adder can be designed using a decoder by:
Utilizing the binary inputs A, B, and C_in as the input
to the decoder.
Using the output lines of the decoder to represent the
sum and carry values for specific input combinations.
The sum output and the carry output are generated by
appropriately mapping the outputs of the decoder to the
corresponding truth table values.
4. Truth Table
The truth table for the Full Adder using a Decoder is
identical to the standard Full Adder:
A B C_in Sum Carry
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
5. Conclusion
The Full Adder can be effectively designed using a
decoder, leveraging the decoder’s ability to generate unique
outputs for each input combination. This method highlights
the versatility of decoders in digital systems, where they
can be used to implement complex combinational logic.
6. References
1. M. Morris Mano, "Digital Logic and Computer
Design," Prentice-Hall.
2. A. Anand Kumar, "Switching Theory and Logic
Design," Pearson Education.