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Module-3
General Amplifiers
Darlington Amplifier:
It consists of two emitter followers in cascaded mode as shown in fig. 1. The overall gain is close
to unity. The main advantage of Darlington amplifier is very large increase in input impedence
and an equal decrease in output impedance .
Fig. 1
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DC Analysis:
The first transistor has one VBE drop and second transistor has second VBE drop. The voltage
divider produces VTH to the input base. The dc emitter current of the second stage is
This is the impedance seen by the first transistor. If r'e(1) is also neglected then the input
impedance of 1 becomes.
which is extremely high because of the products of two betas, so the approximate input
impedance of Darlington amplifier is
Zin = R1 || R2
Output impedance:
The Thevenin impedance at the input is given by
RTH = RS || R1 || R2
Similar to single stage common collector amplifier, the output impedance of the two stages
zout(1) and zout(2) are given by.
Therefore, t he output impedance of the amplifier is very small.
which is extremely high because of the products of two betas, so the approximate input
impedance of Darlington amplifier is
Zin = R1 || R2
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Output impedance:
The Thevenin impedance at the input is given by
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Therefore, t he output impedance of the amplifier is very small.
which is extremely high because of the products of two betas, so the approximate input
impedance of Darlington amplifier is
Zin = R1 || R2
Output impedance:
The Thevenin impedance at the input is given by
RTH = RS || R1 || R2
Similar to single stage common collector amplifier, the output impedance of the two stages
zout(1) and zout(2) are given by.
Therefore, t he output impedance of the amplifier is very small. Output impedance:
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The Thevenin impedance at the input is given by
RTH = RS || R1 || R2
Similar to single stage common collector amplifier, the output impedance of the two stages zout(1)
and zout(2) are given by.
Therefore, t he output impedance of the amplifier is very small.
Efficiency is given by
Value is around 40%
Example-1
Design a single stage npn emitter follower amplifier as shown in fig. 2 with β =60, VBE =0.7V,
Rsource =1 KΩ, and VCC= 12V. Determine the circuit element values for the stage to achieve
Ai = 10 with a 100 Ω load.
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We must select R1, R2 and RE, but we only have two equations. These two equations are specified
by the current gain and the placement of the Q-point.
As discussed earlier, the best choice for a CE amplifier is to make RC =R load . We could derive
a similar result for RE and Rload in the CC amplifier. We shall therefore begin by constraining
REto be equal to Rload . This yields a third equation,
RE = Rload= 100 W
Now finding the load line slopes,
Rac = RE || R load =50 W
Rdc = RE = 100 V
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Since the amplitude of the input is not specified, we choose the quiescent current to place the Q-
point in the center of the ac load line for maximum swing.
We now find the value of r'e
Since re is insignificant compared to RE || Rload , it can be ignored. This is usually the case for
emitter follower circuits.
Using the equation for current gain we find
Everything in this equation is known except RB. We solve for RB with the result
RB = 1500 W
VBB is found from the base loop.
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Continuing with the design as discussed earlier, we find
R1 = 13.8 K Ω
R2 = 1.68 K Ω
The voltage gain of the CC amplifier is approximately unity.
The input resistance is given by
Rin = RB || [ β ( R E || Rload ) ] = 1 kΩ
The output resistance is given by
Vout(p-p) ? 1.8 | ICQ| (RE || R load ) = 7.2 V
The power dissipated in the load, Pload , and the maximum power required of the transistor,
Ptransistor, are
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Example-2 (Capacitor-Coupled CB Design)
Design a CB amplifier using an npn transistor as shown in fig. 3 with β = 100, VCC= 24 V,
Rload = 2KΩ, RE = 400Ω VBE = 0.7V. Design this amplifier for a voltage gain of 20.
Fig. 3
Solution:
Since there are fewer equations than there are unknowns, we need an additional constraint, so
we set
RC = Rload = 2 K Ω
Then we have,
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Rac = 1.40 K Ω and Rdc =2.40 KΩ
For maximum swing, we set ICQ to
We now find that
The current gain is given by
and input impedance is given by
We use the bias equation to find the parameters of the input bias circuitry.
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The bias resistors are then given by
The maximum peak-to-peak undistorted output voltage is
Vout(peak-peak) = 1.8 | ICQ | (Rload || RC) = 11.3 V
Power rating is an important consideration in selecting bias resistors since they must be capable
of withstanding the maximum anticipated (worst case) power without overheating. Power
considerations also affect transistor selection. Designers normally select components having
the lowest power handling capability suitable for the design. Frequently, de-rating (i.e.,
providing a "safety margin" from derived values) is used to improve the reliability of a device.
This is similar to using safety factors in the design of mechanical systems where the system
is designed to withstand values that exceed the maximum.
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Consider a common emitter amplifier circuit shown in fig. 1.
Fig. 1
Derivation of Power Equations
Average power is calculated as follows:
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For dc: (E-1)
In the ac equation, we assume periodic waveforms where T is the period. If the signal is not
periodic, we must let T approach infinity in equation E-1. Looking at the CE amplifier of fig.
1, the power supplied by the power source is dissipated either in R 1 and R2 or in the transistor
(and its associated collector and emitter circuitry). The power in R 1 and R2 (the bias circuitry)
is given by
(E-3)
where IR1 and IR2 are the (downward) currents in the two resistors. Kirchhoff's current law (KCL)
yields a relationship between these two currents and the base quiescent current.
IR1 = IR2 ? IB (E-4)
KVL yields the base loop equation (assuming VEE = 0),
IR2 R2 + IR1 R1 = VCC (E-5)
These two equations can be solved for the currents to yield,
(E-6)
In most practical circuits, the power due to IB is negligible relative to the power dissipated in the
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transistor and in R1 and R2. We will therefore assume that the power supplied by the source
is approximately equal to the power dissipated in the transistor and in R1 and R2.
This quantity is given by
(E-7)
Where the source voltage VCC is a constant value. The source current has a dc quiescent
component designated by i CEQ and the ac component is designated by i c(t). The last equality
of Equation (E-7) assumes that the average value of ic(t) is zero. This is a reasonable
assumption. For example, it applies if the input ac signal is a sinusoidal waveform.
The average power dissipated by the transistor itself (not including any external circuitry) is
(E-8)
For zero signal input, this becomes
P(transitor) = VCEQ ICQ
Where VCEQ and ICQ are the quiescent (dc) values of the voltage and current, respectively.
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For an input signal with maximum possible swing (i.e., Q-point in middle and operating to
cutoff and saturation),
Fig. 2
Putting these time functions in Equation (E-7) yields the power equation,
(E-10)
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From the above derivation, we see that the transistor dissipates its maximum power (worst
case) when no ac signal input is applied. This is shown in fig. 2, where we note that the
frequency of the instantaneous power sinusoid is 2ω.
Depending on the amplitude of the input signal, the transistor will dissipate an average power
between VCEQ ICQ and one half of this value. Therefore, the transistor is selected for zero input
signal so it will handle the maximum (worst case) power dissipation of VCEQ ICQ.
We will need a measure of efficiency to determine how much of the power delivered by the
source appears as signal power at the output. We define conversion efficiency as
Cascade Amplifier:
To increases the voltage gain of the amplifier, multiple amplifier are connects in cascade. The
output of one amplifier is the input to another stage. In this way the overall voltage gain can
be increased, when number of amplifier stages are used in succession it is called a multistage
amplifier or cascade amplifier. The load on the first amplifier is the input resistance of the
second amplifier. The various stages need not have the same voltage and current gain. In
practice, the earlier stages are often voltage amplifiers and the last one or two stages are
current amplifiers. The voltage amplifier stages assure that the current stages have the proper
input swing. The amount of gain in a stage is determined by the load on the amplifier stage,
which is governed by the input resistance to the next stage. Therefore, in designing or
analyzing multistage amplifier, we start at the output and proceed toward the input.
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Fig. 3
In fig. 3, the overall voltage gain is the product of the voltage gain of each stage. That is, the
overall voltage gain is ABC.
To represent the gain of the cascade amplifier, the voltage gains are represents in dB. The two
power levels of input and output of an amplifier are compared on a logarithmic scale rather
than linear scale. The number of bels by which the output power P 2 exceeds the input power
P1 is defined as
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Types of Coupling:
In a multistage amplifier the output of one stage makes the input of the next stage. Normally a
network is used between two stages so that a minimum loss of voltage occurs when the signal
passes through this network to the next stage. Also the dc voltage at the output of one stage
should not be permitted to go to the input of the next. Otherwise, the biasing of the next stage
are disturbed.
The three couplings generally used are.
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1. RC coupling
2. Impedance coupling
3. Transformer coupling.
[Link] coupling:
Fig. 4 shows RC coupling the most commonly used method of coupling from one stage to the
next. An ac source with a source resistance R S drives the input of an amplifier. The grounded
emitter stage amplifies the signal, which is then coupled to next CE stage the signal is further
amplified to get larger output.
In this case the signal developed across the collector resistor of each stage is coupled into the
base of the next stage. The cascaded stages amplify the signal and the overall gain equals the
product of the individual gains.
Fig. 4
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The coupling capacitors pass ac but block dc Because of this the stages are isolated as for as dc
is concerned. This is necessary to avoid shifting of Q-points. The drawback of this approach
is the lower frequency limit imposed by the coupling capacitor.
The bypass capacitors are needed because they bypass the emitters to ground. Without them, the
voltage gain of each stage would be lost. These bypass capacitors also place a lower limit on
the frequency response. As the frequency keeps decreasing, a point is reached at which
capacitors no longer look like a.c. shorts. At this frequency the voltage gain starts to decrease
because of the local feedback and the overall gain of the amplifier drops significantly. These
amplifiers are suitable for frequencies above 10 Hz.
Example - 1
Determine the current and voltage gains for the two-stage capacitor-coupled amplifier shown
in fig. 1.
Fig. 1
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Solution:
We develop the hybrid equivalent circuit for the multistage amplifier. This equivalent is shown
in fig. 2. Primed variables denote output stage quantities and unprimed variables denote input
stage quantities.
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Fig. 2
Calculations for the output stages are as follows
For the input stage,
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The input resistance is determined as:
The current gain, Ai, can be found by applying the equations derived earlier, where the first stage
requires using the correct value for Rload derived form the value of Rin to the next stage.
Alternatively, we analyze fig. 2 by extracting four current dividers as shown in fig. 3.
Fig. 3
The current division of the input stage is
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The output of the first stage is coupled to the input of he second stage in fig. 3(b). The input
resistance of the second stage is
The current in R' in is iload and is given by
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Again, i load is current-divided at the input to the second stage. Thus,
The output current is found from fig. 3(c):
The current gain is then
Ai =927
Now using the gain impedance formula, we find the voltage gain:
Impedance Coupling:
At higher frequency impedance coupling is used. The collector resistance is replaced by an
inductor as shown in fig. 4. As the frequency increases, XL approaches infinity and each
inductor appears open. In other words, inductors pass dc but block ac. When used in this way,
the inductors are called RFchokes.
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The advantage is that no signal power is wasted in collector resistors. These RF chokes are
relatively expensive and their impedance drops off at lower frequencies. It is suitable at radio
frequency above 20 KHz.
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Transformer Coupling:
In this case a transformer is used to transfer the ac output voltage of the first stage to the input
of the second stage. Fig. 5, the resistors RC is replaced by the primary winding of the
transformer. The secondary winding is used to give input to next stage. There is no coupling
capacitor. The dc isolation between the two stages provided by the transformer itself. There
is no power loss in primary winding because of low resistance.
Fig. 5
At low frequency the size and cost of the transformer increases. Transformer coupling is still
used in RF amplifiers. In AM radio receivers, RF signal have frequencies 550 to 1600 KHz.
In TV receivers, the frequencies are 54 to 216 MHz. At these frequency the size and cost of
the transformer reduces. CS capacitor is used to make other point of transformer grounded,
so that ac signal is applied between base and ground.
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Tuned Transformer Coupling:
In this case a capacitor is shunted across primary winding to get resonance as shown in fig. 6. At
this frequency the gain is maximum and at other frequencies the gain reduces very much.
This allows us to filter out all frequencies except the resonant frequency and those near it.
This is the principle behind tuning in a radio station or TV channel.
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Fig. 6
Example - 2
Design a transformer-coupled amplifier as shown in fig. 7 for a current gain of Ai = 80. Find
the power supplied to the load and the power required from the supply.
Fig. 7
Solution:
We first use the design equation to find the location of the Q-point for maximum output swing.
Since the problem statement requires a current gain of 80, the amplifier must have a current gain
of 10 because the transformer provides an additional gain of 8. We use the equations from
Chapter 5 to find the base resistance RB,
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We note that re is sufficiently small to be neglected. Then, solving for RB yields
Now solving for the bias resistors,
The design is now complete. The power delivered by the source is given by
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The power dissipated in the load is
We have restricted operation to the linear region by eliminating 5% of the maximum swing near
cutoff and saturation. The efficiency is the ratio of the load to source power
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