ADVANCED

LINEAR ALD1102A/ALD1102B
DEVICES, INC. ALD1102

DUAL P-CHANNEL MATCHED MOSFET PAIR

GENERAL DESCRIPTION APPLICATIONS

The ALD1102 is a monolithic dual P-channel matched transistor pair • Precision current mirrors
intended for a broad range of analog applications. These enhancement- • Precision current sources
mode transistors are manufactured with Advanced Linear Devices' en- • Analog switches
hanced ACMOS silicon gate CMOS process. • Choppers
• Differential amplifier input stage
The ALD1102 offers high input impedance and negative current tempera- • Voltage comparator
ture coefficient. The transistor pair is matched for minimum offset voltage • Data converters
and differential thermal response, and it is designed for switching and • Sample and Hold
amplifying applications in -2V to -10V systems where low input bias • Analog inverter
current, low input capacitance and fast switching speed are desired.
Since these are MOSFET devices, they feature very large (almost infinite)
current gain in a low frequency, or near DC, operating environment. When
used with an ALD1101, a dual CMOS analog switch can be constructed.
In addition, the ALD1102 is intended as a building block for differential
amplifier input stages, transmission gates, and multiplexer applications. PIN CONFIGURATION

The ALD1102 is suitable for use in precision applications which require

very high current gain, beta, such as current mirrors and current sources. SOURCE 1 1 8 SUBSTRATE
The high input impedance and the high DC current gain of the Field Effect
Transistors result in extremely low current loss through the control gate. GATE 1 2 7 SOURCE 2
The DC current gain is limited by the gate input leakage current, which is
specified at 50pA at room temperature. For example, DC beta of the DRAIN 1 3 6 GATE 2
device at a drain current of 5mA at 25°C is = 5mA/50pA = 100,000,000.
IC 4 5 DRAIN 2

TOP VIEW
FEATURES SAL, PAL PACKAGES

* IC pin is internally connected. Do not connect externally.

• Low threshold voltage of 0.7V
• Low input capacitance
• Low Vos grades -- 2mV, 5mV, 10mV
• High input impedance -- 1012Ω typical
• Low input and output leakage currents
• Negative current (IDS) temperature coefficient
• Enhancement-mode (normally off)
• DC current gain 109 BLOCK DIAGRAM
• RoHS compliant

GATE 1 (2)
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
Operating Temperature Range*
DRAIN 1 (3) SOURCE 1 (1)
0°C to +70°C 0°C to +70°C
SUBSTRATE (8)
8-Pin 8-Pin
DRAIN 2 (5) SOURCE 2 (7)
SOIC Plastic Dip
Package Package

ALD1102ASAL ALD1102APAL GATE 2 (6)

ALD1102BSAL ALD1102BPAL
ALD1102SAL ALD1102PAL
* Contact factory for high temperature versions.

©2021 Advanced Linear Devices, Inc., Vers. 2.2 [Link] 1 of 7

 ABSOLUTE MAXIMUM RATINGS
Drain-source voltage, VDS -10V
Gate-source voltage, VGS -10V
Power dissipation 500mW
Operating temperature range SAL, PAL packages 0°C to +70°C
Storage temperature range -65°C to +150°C
Lead temperature, 10 seconds +260°C
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.

OPERATING ELECTRICAL CHARACTERISTICS

TA = 25°C unless otherwise specified
ALD1102A ALD1102B ALD1102 Test
Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Conditions
Gate Threshold
Voltage VT -0.4 -0.7 -1.2 -0.4 -0.7 -1.2 -0.4 -0.7 -1.2 V IDS = -10µA VGS = VDS

Offset Voltage VOS 2 5 10 mV IDS = -100µA VGS = VDS

VGS1 - VGS2

Gate Threshold TCVT -1.3 -1.3 -1.3 mV/°C

Temperature Drift

On Drain Current IDS(ON) -8 -16 -8 -16 -8 -16 mA VGS = VDS = -5V

Transconductance Gfs 2 4 2 4 2 4 mmho VDS = -5V IDS = -10mA

Mismatch ∆Gfs 0.5 0.5 0.5 %

Output GOS 500 500 500 µmho VDS = -5V IDS = -10mA
Conductance

Drain Source RDS(ON) 180 270 180 270 180 270 Ω VDS = -0.1V VGS = -5V
ON Resistance

Drain Source
ON Resistance ∆RDS(ON) 0.5 0.5 0.5 % VDS = -0.1V VGS = -5V
Mismatch

Drain Source
Breakdown BVDSS -10 -10 -10 V IDS = -10µA VGS = 0V
Voltage

Off Drain Current IDS(OFF) 0.1 4 0.1 4 0.1 4 nA VDS = -10V VGS = 0V
4 4 4 µA TA = 125°C

Gate Leakage IGSS 1 100 1 100 1 100 pA VDS = 0V VGS = -10V

Current 10 10 10 nA TA = 125°C

Input CISS 6 10 6 10 6 10 pF
Capacitance

ALD1102A/ALD1102B/ALD1102 Advanced Linear Devices 2 of 7

 TYPICAL PERFORMANCE CHARACTERISTICS

OUTPUT CHARACTERISTICS LOW VOLTAGE OUTPUT

CHARACTERISTICS
-80 4

DRAIN SOURCE ON CURRENT

VGS = -10V
DRAIN SOURCE ON CURRENT

VBS = 0V VBS = 0V
TA = +25°C TA = 25°C -8V
-60 VGS = -10V 2 -6V

IDS(ON) (mA)
IDS(ON) (mA)

-4V

-8V -2V
-40 0

-6V
-20 -2
-4V
-2V
0 -4
0 -2 -4 -6 -8 -10 -320 -160 0 +160 +320
DRAIN SOURCE ON VOLTAGE - VDS(ON) (V) DRAIN SOURCE ON VOLTAGE - VDS(ON) (mV)

FORWARD TRANSCONDUCTANCE vs. TRANSFER CHARACTERISTIC

DRAIN-SOURCE VOLTAGE WITH SUBSTRATE BIAS
10000 -20
FORWARD TRANSCONDUCTANCE

IDS = -5mA
DRAIN SOURCE ON CURRENT

TA = +25°C
5000 VBS = 0V
-15 2V
2000 4V
IDS(ON) (µA)

6V
(µmho)

8V
1000 -10 10V
IDS = -1mA
TA = +125°C
500
-5
200 VBS = 0V VGS = VDS
f = 1KHz TA = +25°C

100 0
0 -2 -4 -6 -8 -10 0 -0.8 -1.6 -2.4 -3.2 -4.0

DRAIN SOURCE ON VOLTAGE - VDS(ON) (V) GATE SOURCE ON VOLTAGE - VGS(ON) (V)

DRAIN SOURCE ON RESISTANCE vs. DRAIN SOURCE OFF CURRENT vs.

GATE-SOURCE VOLTAGE AMBIENT TEMPERATURE
10000 10x10-6
DRAIN SOURCE ON RESISTANCE

DRAIN SOURCE OFF CURRENT

VDS = 0.4V
VDS = -10V
VBS = 0V
VGS = VBS = 0V
TA = +125°C
1000
RDS(OFF) (A)
RDS(ON) (Ω)

10x10-9

100

TA = +25°C

10 10x10-12
0 -2 -4 -6 -8 -10 -50 -25 0 +25 +50 +75 +100 +125
GATE SOURCE ON VOLTAGE - VGS(ON) (V) AMBIENT TEMPERATURE - TA (°C)

ALD1102A/ALD1102B/ALD1102 Advanced Linear Devices 3 of 7

 TYPICAL APPLICATIONS

CURRENT SOURCE MIRROR CURRENT SOURCE WITH GATE CONTROL

V+ = +5V ALD1102, ALD1102, V+ = +5V

1/2 ALD1107, 1/2 ALD1107,
or ALD1117 or ALD1117
V+ = +5V
Q3 Q4 Q3 Q4

ISET RSET

ISET RSET ISOURCE

ISOURCE
Digital Logic Control
of Current Source
ISOURCE = ISET
Q1 Q2 V+ - Vt ON Q1
= 1/2 ALD1101,
RSET 1/4 ALD1106,
~ 4 or 1/2 ALD1116
ALD1101, = R
SET OFF
1/2 ALD1106,
or ALD1116

Q1, Q2: N-Channel MOSFET Q1 : N-Channel MOSFET

Q3, Q4: P-Channel MOSFET Q3, Q4: P-Channel MOSFET

DIFFERENTIAL AMPLIFIER CURRENT SOURCE MULTIPLICATION

V+ ALD1102,
1/2 ALD1107, V+ = +5V
or ALD1117
ISOURCE = ISET x N

PMOS PAIR ISET RSET

ISOURCE
Q3 Q4

VOUT
QSET Q1 Q2 Q3 QN
Q1 Q2
VIN+ VIN-
NMOS PAIR

ALD1101,
1/2 ALD1106, Current
or ALD1116 Source

Q1, Q2: N-Channel MOSFET QSET, Q1..QN: ALD1101, ALD1106, or ALD1116

Q3, Q4: P-Channel MOSFET N-Channel MOSFET

ALD1102A/ALD1102B/ALD1102 Advanced Linear Devices 4 of 7

 TYPICAL APPLICATIONS (cont.)

BASIC CURRENT SOURCES

N-CHANNEL CURRENT SOURCE P-CHANNEL CURRENT SOURCE

V+ = +5V V+ = +5V
ALD1102,
1/2 ALD1107,
ISET RSET
or ALD1117
ISOURCE

8 7
5 3 6
Q2 8 6 Q1 Q3 Q4
2 2
3 5
7
1
ISOURCE
ISOURCE = ISET ALD1101,
V+ - Vt 1/2 ALD1106, ISET RSET
=
RSET or ALD1116
~ V+ - 1.0
= R
SET
~ 4
= R
SET

Q1, Q2: N-Channel MOSFET Q3, Q4: P-Channel MOSFET

CASCODE CURRENT SOURCES

V+ = +5V 2 x ALD1102
V+ = +5V
or ALD1107

ISET RSET
ISOURCE Q1 Q2

Q4 Q3
Q3 Q4

Q2 Q1
ISET RSET ISOURCE

2 x ALD1101
V+ - 2Vt ~ 3
or ALD1106 ISOURCE = ISET =
RSET = RSET

Q1, Q2, Q3, Q4: N-Channel MOSFET Q1, Q2, Q3, Q4: P-Channel MOSFET
(ALD1101 or ALD1103) (ALD1102 or ALD1103)

ALD1102A/ALD1102B/ALD1102 Advanced Linear Devices 5 of 7

 SOIC-8 PACKAGE DRAWING

8 Pin Plastic SOIC Package

E Millimeters Inches
Dim Min Max Min Max
A 1.35 1.75 0.053 0.069

A1 0.10 0.25 0.004 0.010

S (45°)
b 0.35 0.45 0.014 0.018

C 0.18 0.25 0.007 0.010

D-8 4.69 5.00 0.185 0.196

D E 3.50 4.05 0.140 0.160

e 1.27 BSC 0.050 BSC

H 5.70 6.30 0.224 0.248

L 0.60 0.937 0.024 0.037

A
ø 0° 8° 0° 8°
e A1 S 0.25 0.50 0.010 0.020
b

S (45°)

H C

L
ø

ALD1102A/ALD1102B/ALD1102 Advanced Linear Devices 6 of 7

 PDIP-8 PACKAGE DRAWING

8 Pin Plastic DIP Package

Millimeters Inches
Dim Min Max Min Max
E E1
A 3.81 5.08 0.105 0.200
A1 0.38 1.27 0.015 0.050
A2 1.27 2.03 0.050 0.080
b 0.89 1.65 0.035 0.065
b1 0.38 0.51 0.015 0.020
c 0.20 0.30 0.008 0.012
D-8 9.40 11.68 0.370 0.460
D
S E 5.59 7.11 0.220 0.280
E1 7.62 8.26 0.300 0.325
A2 e 2.29 2.79 0.090 0.110
A
L e1 7.37 7.87 0.290 0.310
A1
b e L 2.79 3.81 0.110 0.150
S-8 1.02 2.03 0.040 0.080
b1 ø
0° 15° 0° 15°

c
e1 ø

ALD1102A/ALD1102B/ALD1102 Advanced Linear Devices 7 of 7