Processor Controlled Test Development : A Case

Study with an Intel i7 Processor Board

Nur Baki Er, Ali Aydoğan,Hayrettin Kesim

Test Systems and Process Design Dept.
Defense Systems Technologies Div., ASELSAN Inc.
Ankara, TURKEY
nber@[Link], aaydogan@[Link], hkesim@[Link]

Abstract—Military computers have been widely used for Keywords—Processor Control Test, Intel i7, Functional
Defense System Technologies projects during the last decade in Tests, Interface Test
ASELSAN, the leading defense industry company of Turkey. A
military computer design is reused for new projects as long as it
meets the requirements, but as processor technology evolves and I. INTRODUCTION
different project requirements arise, the need for a new design
becomes inevitable. Functional test is defined as a verification process which
enables us to ensure that all of the functional blocks like
Main components of a military computer are backplane processor, memory chips, video and communication interfaces
board, processor board, power board and IO/communication and data lines work as expected and are met the requirements
boards. Processor boards are used in many different computer of the design. The complexity of the functional test is directly
configurations thanks to their design for reusability. Processor
boards in ASELSAN are the most complicated and challenging
proportional to number of IC (integrated circuits), interfaces.
designs in terms of PCB design, interfaces, component density, The processor boards, especially the one with Intel i7
producibility and testability. processor, designed and produced in ASELSAN are good
example of a complicated electronic boards. Thus, designing
The study in this paper is related to one of these processor and applying a comprehensive functional test is a challenging
board tests, ASELSAN Intel i7 Processor Board. This board was
process for this type of electronic boards.
designed because COTS Intel i7 Processor Boards could not be
used due to demanding project requirements and military PCT (Processor Controlled Test) is a new and alternative
standards. Each interface and function of the board is tested in test method for the boards including processor. The method
detail to ensure functionality before being used in higher level uses internal test structure of the processors to access all the
integration. Some of these interfaces are DDR3 Memory,
RS232/RS422 Serial channels, PCI Express, Gigabit Ethernet,
interfaces connected to processor like serial channels,
SATA, USB and HDMI/VGA video outputs. Ethernet, ram etc. The user controls the processor via the
debug port interface of the processor.
For the production tests, a test setup with a custom design
backplane board was used and most of the functional tests were Throughout this paper Processor Controlled Test method
conducted manually. Due to increasing demand for this board on will be introduced in Chapter 2. The implementation of the
account of new military computer designs, a faster and method and the test infrastructure will be discussed in Chapter
automated test method was needed. For this purpose, alternative 3 and Chapter 4 will consist of results and comparisons with
test methods for processor boards were considered and PCT previous test methods.
(Processor Controlled Test-ASSET) was chosen.
PCT includes POD2 and RIC1000 as hardware tools and II. PROCESSOR CONTROLLED TEST(PCT)
Scan Works Test Toolkit with Intel i7 Processor package. With
these tools, PCT reaches the processor via debug port and scans Processor Controlled Test is new and alternative approach
entire board for the peripherals connected to processor and PCH which is developed by ASSET Company for the processor
Bridge. By this way, PCT is capable of recognizing the board. It enables the user to realize a full functional test for the
architecture of the board. Test designer can view and evaluate [Link] consist of hardware and software packages. There
this architecture, where each peripheral is tagged by an ID. As are two special hardware named Remote Instrumentation
the next step, test scripts can be written to create a functional test Control device (RIC1000) and POD2. There is also a software
for each peripheral. While generating a test with PCT, it is
named ScanWorks on which the scripts can be developed by
crucial to consider the customized features of the board such as
BIOS requirements, RAM configuration and PCIe addresses. the user to test the interfaces. This package has a physical
interface called Debug Port via which control signals can be
Throughout this paper, Processor Controlled Test for driven to test interfaces of processor
ASELSAN Intel i7 Processor board will be examined as a case
study and it will be compared with manual test methods.
Difficulties faced during the development of PCT will be
discussed and solutions will be explained.

978-1-4799-8190-8/15/$31.00 ©2015 IEEE

 1. Hardware Interface
There are two hardware used to implement PCT called In addition to these by using software interface, the debug
RIC 1000 and POD2. The hardware can be seen in Figure 1. port interface configuration must be done. In Intel design XDP
connectors can have single, double or quadruple architecture.
For this reason the appropriate XDP pin configuration,
termination resistors and number of used port can be selected
before applying the test. For selecting the appropriate
configurations, “Intel’s Debug Port Design Guides” [1]
document is used.
2. Software Interface
During this study, ScanWorks Test Toolkit software
designed by ASSET is used. In the software, there are 3
operating mode existing namely Interactive, Developer and
Operator.
By using the Interactive mode menu, all the test related to
processor and its interfaces can be applied manually by the
user. Writing to and reading from all the registers, monitoring
all the devices connected to processor via PCIe interface etc.
Figure 1- PCT Hardware and Connections can be realize with this mode. These tests can be applied
without requirement of writing any script. Interactive mode
RIC-1000 is a compact, efficient and multi-directional menu can be seen in Figure 3.
Ethernet switch. RIC-1000 supports 10/100/1000 Mbps
CAT5e/6 Ethernet interface. It has a programmable voltage
level and test clock. It is connected to the test computer via
Ethernet interface and via local area network it communicates Figure 3 - Interactive Mode
with POD 2 and the processor on UUT.
POD2 is a device to setup the electrical interface with the For example, “Memory Access” function (Figure 4) can be
processor. One of the important step while working with Intel used to read or write operation for any registers in the RAM.
Processor is to be careful about the voltage values. By Hence, the functionality of the memory blocks can be verified
modifying the options in the ScanWorks software, POD2 via writing and reading to all registers.
enables the user to apply right voltage to the processor. The
voltage regulation options menu can be seen in Figure 2.

Figure 4 - Memory Access Function

Figure 2 - POD2 Voltage Level Adjustment

“Developer” mode is the one which used in this study. The
purpose of this mode is to generate custom test functions for
the UUT. Most important function in this mode is Auto Test
Generation which will be discussed in the next chapter.

Figure 5 - Developer Mode Menu

The last mode, “Operator”, is the one which is used by the

test operator to run the developed test functions.

III. APPLICATION OF PCT TO THE INTEL I7 PROCESSOR BOARD

DESIGNED IN ASELSAN Figure 7 - ATG Function Menu

1. Test Setup
The test setup used in this study is shown in Figure 6.
Setup is consist of a processor board ( Intel i7 processor, 4GB
ram), PCT hardware, cables, USB sticks, power source, SSD
hard disk and a test computer on which ScanWorks software
runs.

Figure 6 - Test Setup

2. Auto-Test Generation(ATG)
In order to develop test functions with ScanWorks
software, Auto-Test Generation (ATG) function can be used.
ATG function menu can be seen in Figure 7. When the user
runs this function, it starts to scan the devices connected via Figure 8 - The Architecture of the board
PCI bus. It is important to know the scan parameters which are
Highest PCI Bus, Highest Device and Highest Function. Also 3. Customization of the tests for UUT
PCI Configuration parameters, Index Port and Data Port, must
be known. This function generates the architecture map of the The test functions generated by the ATG function enables
board by showing all the devices connected to processor via user to test the connection between processor and interface
PCIe interface. The architecture can be seen in Figure 8. devices. The functionality of the interface devices isn’t tested
by these functions. In order to test the functionality of the
interfaces these codes must be modified by the user. The
language used in ScanWorks software is called TSL/1.
 a. USB Tests
The generated function is modified in order to write to and
read from the USB sticks connected to the test board. By this
method the functionality of the USB devices is verified.
b. Ethernet Tests
Ethernet test functions are modified to test Ethernet
interfaces for the 10 and 100 Mbps speeds via loopback
connectors. For the 1000 Mbps Ethernet test, the connectivity
of the ASELSAN LAN is verified.
c. Serial Channel Communication Tests
Serial channel communication tests are applied via
loopback connectors. In the UUT three different type of serial
channels are available namely RS232, RS422 and RS485. The
transition between these modes are handled by BIOS. The
loopback connector method is chosen in order to reduce the
cable usage in the line production tests.
Figure 10 - Allows dumping of a specified block of memory
d. PCIe Interface Tests (Also useful for checking ROM Contents)
The UUT have two different type of PCIe interface output
which are x16 width and x4 width. In order to test these
interfaces a graphic card with PCIe interface and a serial
channel card with PCIe interface are used.
e. Memory Block Tests (RAM)
One of the most important advancement gained by PCT is
to be able to test memory blocks of the processor board. Until
this study there were lots of trouble because of the RAM
chips. However there isn’t any test to diagnose the error
caused by RAM chips. The problems faced can be resulted
from production line error or manufacturing error. With the
memory test generated by PCT, it is possible to read and write
all the registers in the RAM chips. Hence when an error
occurred, it is possible to localize the error and create low cost
solution. The functions used in RAM test can be seen in
Figure 9, 10, 11.

Figure 11 - Fills memory with a specified Fill value and

checks the memory range for a correct fill

Some of the error messages generated by the software is

shown in Figure 12 and Figure 13. “+” means the functionality
of the pin or chips is verified. However “0” and “1” points the
shorts or opens in the pins.

Figure 9 - Allows reading and writing to/from individual Figure 12 - Error Message pointing the defects in the data
memory locations pins of the RAM chip with 0 address
 With PCT, Ethernet and USB interface tests are optimized
to gain from time and cost. Also these test are automatized. In
addition, 8 serial channels can be tested automatically via
loopback connectors with PCT for 3 different protocols
namely RS232, RS422 and RS485. Before PCT, the test
technician was using different cable set for these different
protocols. That results in slow test steps and cost of producing
Figure 13 – Error Message pointing that the expected data and maintaining those cable sets. With automatization of the
is not read from the register address 400. test steps and test results page, the user error is minimized.

One of the most important advancement coming with PCT

IV. CONCLUSION is to be able to test RAM blocks and localize the defects. In
the previous test setup, there is no test available to localize the
defects in the memory blocks. That results in time and money
The aim in this study is to develop a new and alternative loss for the company.
functional test method for the custom processor boards
designed and produced in ASELSAN. In order to achieve this,
Processor Controlled Test is studied. It is seen that PCT is an
alternative functional test method for the processor boards. At References
the moment, among all the interfaces connected to processor,
[1] Intel Debug Port Design Guide
USB, serial channels, Ethernet, PCIe and RAM interfaces can
[2] [Link]
be tested. For other interfaces, the study continue to develop a
functional test method by PCT or other methods.