TUSB2046 4-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE

SLLS330A FEBRUARY 1999 REVISED AUGUST 1999

D D D D D D D D D D D D D D D D D D

Universal Serial Bus (USB) Version 1.1 Compliant 32-Pin TQFP Package With a 0.8 mm Pin Pitch 3.3-V Low Power ASIC Logic Integrated USB Transceivers State Machine Implementation Requires No DP0 Firmware Programming DM0 One Upstream Port and Four Downstream VCC Ports RESET All Downstream Ports Support Full-Speed EECLK and Low-Speed Operations EEDATA/GANGED Two Power Source Modes GND Self-Powered Mode BUSPWR Bus-Powered Mode Power Switching and Over-current Reporting is Provided Ganged or Per Port Supports Suspend and Resume Operations Supports Programmable Vendor ID and Product ID With External Serial EEPROM 3-State EEPROM Interface Allows EEPROM Sharing Push-Pull Outputs for PWRON Eliminate the Need for External Pullup Resistors Noise Filtering on OVRCUR Provides Immunity to Voltage Spikes Package Pinout Allows 2-Layer PCB Low EMI Emission Achieved by a 6-MHz Crystal Input Migrated From Proven TUSB2040 Hub Lower Cost Than the TUSB2040 Hub

VF PACKAGE (TOP VIEW)

32 31 30 29 28 27 26 25 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 24 23 22 21 20 19 18 17

SUSPND TSTMODE XTAL1 XTAL2 GND TSTPLL EXTMEM VCC DP4 DM4 OVRCUR4 PWRON4 DP3 DM3 OVRCUR3 PWRON3 PWRON1 OVRCUR1 DM1 DP1 PWRON2 OVRCUR2 DM2 DP2
Copyright 1999, Texas Instruments Incorporated

description
The TUSB2046 is a 3.3 V CMOS hub device that provides one upstream port and four downstream ports in compliance with the 1.1 Universal Serial Bus (USB) specification. Because this device is implemented with a digital state machine instead of a microcontroller, no firmware programming is required. Fully compliant USB transceivers are integrated into the ASIC for all upstream and downstream ports. The downstream ports support both full-speed and low-speed devices by automatically setting the slew rate according to the speed of the device attached to the ports. The configuration of the BUSPWR pin selects either the bus-powered or the self-powered mode.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

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TUSB2046 4-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE
SLLS330A FEBRUARY 1999 REVISED AUGUST 1999

description (continued)
Configuring the GANGED input determines the power switching and over-current detection modes for the downstream ports. External power management devices such as the TPS2044 are required to control the 5-V source to the downstream ports according to the corresponding values of the PWRON pin. Upon detecting any over-current conditions, the power management device sets the corresponding OVRCUR pin of the TUSB2046 to a logic low. If GANGED is high, all PWRON outputs switch together and if any OVRCUR is activated, all ports transition to power off state. If GANGED is low, the PWRON outputs and OVRCUR inputs operate on a per port basis. Low EMI emission is achieved because the TUSB2046 is able to utilize a 6 MHz crystal input. Connect the crystal as shown in Figure 7. An internal PLL then generates the 48 MHz clock used to sample data from the upstream port and to synchronize the 12 MHz used for the USB clock. If low power suspend and resume are desired, a passive crystal or resonator must be used. However, a 6-MHz oscillator may be used by connecting the output to the XTAL1 terminal and leaving the XTAL2 terminal open. The oscillator TTL output should not exceed 3.6 V. The EXTMEM pin enables or disables the optional EEPROM interface. When the EXTMEM pin is high, the product ID (PID) displayed during enumeration is General-Purpose USB Hub. For this default, pin 5 is disabled and pin 6 functions as the GANGED input pin. If custom PID and Vendor ID (VID) descriptors are desired, the EXTMEM pin must be low (EXTMEM = 0). For this configuration, pin 5 and pin 6 function as the EEPROM interface with pin 5 and pin 6 functioning as the EECLK and EEDATA, respectively. See Table 1 for a description of the EEPROM memory map. Other useful features of the TUSB2046 include a package with a 0.8 mm pin pitch for easy PCB routing and assembly, push-pull outputs for the PWRON pins eliminate the need for pullup resistors required by traditional open collector I/Os, and OVRCUR pins have noise filtering for increased immunity to voltage spikes.

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TUSB2046 4-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE
SLLS330A FEBRUARY 1999 REVISED AUGUST 1999

functional block diagram

DP0 1 DM0 2 USB Transceiver 32 27 30 29 Suspend / Resume Logic and Frame Timer OSC/PLL SIE 4 RESET 26 EXTMEM

SUSPND TSTPLL XTAL1 XTAL2

Hub Repeater

SIE Interface Logic

6 Serial EEPROM Interface 5

EEDATA/GANGED EECLK

Port 1 Logic Port 2 Logic Port 3 Logic Port 4 Logic Hub / Device Command Decoder 8 BUSPWR

USB Transceiver 24 DP4 23 DM4

USB Transceiver 20 DP3 19 DM3

USB Transceiver 16 15

USB Transceiver 12 DP1 11

Hub Power Logic

10, 14, 18, 22 9, 13, 17, 21

OVRCUR1 OVRCUR4 PWRON1 PWRON4

DP2 DM2

DM1

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TUSB2046 4-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE
SLLS330A FEBRUARY 1999 REVISED AUGUST 1999

Terminal Functions
TERMINAL NAME BUSPWR NO. 8 I/O I DESCRIPTION Power source indicator. BUSPWR is an active high input that indicates whether the downstream ports source their power from the USB cable or a local power supply. For the bus-power mode, this pin should be pulled to 3.3 V, and for the self-powered mode, this pin should be pulled low. Input must not change dynamically during operation. Root port USB differential data minus. DM0 paired with DP0 constitutes the upstream USB port. USB differential data minus. DM1 DM4 paired with DP1 DP4 support up to four downstream USB ports. Root port USB differential data plus. DP0 paired with DM0 constitutes the upstream USB port. USB differential data plus. DP1 DP4 paired with DM1 DM4 support up to four downstream USB ports. EEPROM serial clock. When EXTMEM is high, the EEPROM interace is disabled. The EECLK pin is disabled and should be left floating (unconnected). When EXTMEM is low, EECLK acts as a 3-state serial clock output to the EEPROM with a 100 A internal pulldown. EEPROM serial data/power management mode indicator. When EXTMEM is high, EEDATA/GANGED selects between gang or per-port power over-current detection for the downstream ports. When EXTMEM is low, EEDATA/GANGED acts as a serial data I/O for the EEPROM and is internally pulled down with a 100 A pulldown. This standard TTL input must not change dynamically during operation. EEPROM read enable. When EXTMEM is high, the serial EEPROM interface of the device is disabled. When EXTMEM is low, terminals 5 and 6 are configured as the clock and data pins of the serial EEPROM interface, respectively. Ground. GND terminals must be tied to ground for proper operation. I Over-current input. OVRCUR1 OVRCUR4 are active low. For per-port over current detection, one over-current input is available for each of the four downstream ports. In the ganged mode, any OVRCUR input may be used and all OVRCUR pins should be tied together. OVRCUR pins are active low inputs with noise filtering logic. Power-on/-off control signals. PWRON1 PWRON4 are active low, push-pull outputs. Push-pull outputs eliminate the pullup resistors which open-drain outputs require. However, the external power switches that connect to these pins must be able to operate with 3.3-V inputs because these outputs cannot drive 5-V signals. Reset. RESET is an active low TTL input with hysteresis and must be asserted at power up. When RESET is asserted, all logic is initialized. Suspend status. SUSPND is an active high output available for external logic power down operations. During the suspend mode, SUSPND is high. SUSPND is low for normal operation. Test pin. TSTMODE is used as a test pin during production testing. This pin must be tied to ground for normal operation. Test pin. TSTPLL is used as a test pin during production testing. This pin must be tied to ground for normal operation 3.3-V supply voltage I O Crystal 1. XTAL1 is a 6-MHz crystal input with 50% duty cycle. An internal PLL generates the 48-MHz and 12-MHz clocks used internally by the ASIC logic. Crystal 2. XTAL2 is a 6-MHz crystal output. This terminal should be left open when using an oscillator.

DM0 DM1 DM4 DP0 DP1 DP4 EECLK

2 11, 15, 19, 23 1 12, 16, 20, 24 5

I/O I/O I/O I/O O

EEDATA/ GANGED

I/O

EXTMEM

26

GND OVRCUR1 OVRCUR4

7, 28 10, 14, 18, 22

PWRON1 PWRON4

9, 13, 17, 21

RESET SUSPND TSTMODE TSTPLL VCC XTAL1 XTAL2

4 32 31 27 3, 25 30 29

I O I I/O

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TUSB2046 4-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE
SLLS330A FEBRUARY 1999 REVISED AUGUST 1999

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 3.6 V Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Input clamp current, IIK, (VI < 0 V or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Output clamp current, IOK, (VO < 0 V or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage levels are with respect to GND.

recommended operating conditions

MIN Supply voltage, VCC Input voltage, TTL/LVCMOS, VI Output voltage, TTL/LVCMOS, VO High-level input voltage, signal-ended receiver, VIH(REC) Low-level input voltage, signal-ended receiver, VIL(REC) High-level input voltage, TTL/LVCMOS, VIH(TTL) Low-level input voltage, TTL/LVCMOS, VIL(TTL) Operating free-air temperature, TA External series, differential driver resistor, R(DRV) Operating (dc differential driver) high speed mode, f(OPRH) Operating (dc differential driver) low speed mode, f(OPRL) Common mode, input range, differential receiver, V(ICR) Input transition times, tt, TTL/LVCMOS Junction temperature range, TJ 0.8 0 0 2 0 0 22 (5%) 3 0 0 2 NOM 3.3 MAX 3.6 VCC VCC VCC 0.8 VCC 0.8 70 22 (5%) 12 1.5 2.5 25 115 UNIT V V V V V V V C Mb/s Mb/s V ns C

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TUSB2046 4-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE
SLLS330A FEBRUARY 1999 REVISED AUGUST 1999

electrical characteristics over recommended ranges of operating free-air temperature and supply voltage (unless otherwise noted)
PARAMETER TTL/LVCMOS VOH High-level output voltage USB data lines TTL /LVCMOS VOL Low-level output voltage USB data lines TTL /LVCMOS Positive input threshold voltage Negative-input Negative input threshold voltage Input hysteresis (VT+ VT) High impedance output current High-impedance Low-level input current High-level input current Driver output impedance Differential input voltage Input supply current Single-ended TTL /LVCMOS Single-ended TTL /LVCMOS Single-ended TTL/LVCMOS USB data lines TTL/LVCMOS TTL/LVCMOS USB data lines USB data lines 0.8 V VICR 2.5 V V = VCC or GND 0 V VO VCC VI = GND VI = VCC Static VOH or VOL 0.8 V VICR 2.5 V Normal operation Suspend mode 7.1 0.2 40 1 0.8 V VICR 2.5 V 0.8 V VICR 2.5 V 0.8 1 0.3 300 0.7 500 10 10 1 1 19.9 TEST CONDITIONS IOH = 4 mA R(DRV) = 15 k, to GND IOH = 12 mA (without R(DRV)) IOL = 4 mA R(DRV) = 1.5 k to 3.6 V IOL = 12 mA (without R(DRV)) MIN VCC 0.5 2.8 VCC 0.5 0.5 0.3 0.5 1.8 1.8 V V V V V mV A A A A V mA A V MAX UNIT V

VIT IT+ VIT IT Vh hys IOZ IIL IIH zo(DRV) VID ICC

Applies for input buffers with hysteresis Applies for open drain buffers

differential driver switching characteristics over recommended ranges of operating free-air temperature and supply voltage, CL = 50 pF (unless otherwise noted)
full speed mode
PARAMETER tr tf t(RFM VO(CRS) Transition rise time for DP or DM Transition fall time for DP or DM Rise/fall time matching Signal crossover output voltage TEST CONDITIONS See Figure 1 and Figure 2 See Figure 1 and Figure 2 (tr/tf) 100 MIN 4 4 90% 1.3 MAX 20 20 110% 2.0 V UNIT ns ns

Charicterized only. Limits are approved by design and are not production tested.

low speed mode

PARAMETER tr tf t(RFM) VO(CRS) Transition rise time for DP or DM Transition fall time for DP or DM Rise/fall time matching Signal crossover output voltage TEST CONDITIONS CL = 200 pF to 600 pF, CL = 200 pF to 600 pF, (tr/tf) 100 CL = 200 pF to 600 pF See Figure 1 and Figure 2 See Figure 1 and Figure 2 MIN 75 75 80% 1.3 MAX 300 300 120% 2.0 V UNIT ns ns

Charicterized only. Limits are approved by design and are not production tested.

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TUSB2046 4-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE
SLLS330A FEBRUARY 1999 REVISED AUGUST 1999

Characterization measurement point DP 22

V(TERM) = VCC

Full 15 k DM 22 15 k CL CL Low

1.5 k

Figure 1. Differential Driver Switching Load

tf DM DP 90% 10% 90% 10% tr 90% 10% tf 90% 10% tr VOH VOL

NOTE: The tr/tf ratio is measured as tr(DP)/tf(DM) and tr(DM)/tf(DP) at each crossover point.

Figure 2. Differential Driver Timing Waveforms

1.5 V ID Differential Receiver Input Sensitivity V 1.3

0.5

0.2 0 0 1 2 3 3.6 0.8 2.5 VICR Common Mode Input Range V 4

Figure 3. Differential Receiver Input Sensitivity vs Common Mode Input Range

VCC VIH VIT Logic low 0V

Logic high VIT+

Vhys

VIL

Figure 4. Single-Ended Receiver Input Signal Parameter Definitions

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TUSB2046 4-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE
SLLS330A FEBRUARY 1999 REVISED AUGUST 1999

APPLICATION INFORMATION
A major advantage of USB is the ability to connect 127 functions configured in up to six logical layers (tiers) to a single personal computer (see Figure 5).
PC With Root Hub

Monitor With 4-Port Hub (Self-Powered)

Keyboard With 4-Port Hub (Bus-Powered)

Modem

Telephone

Printer With 4-Port Hub (Self-Powered)

Left Speaker

Mouse

Right Speaker

Scanner

Digital Scanner

Figure 5. USB Tiered Configuration Example Another advantage of USB is that all peripherals are connected using a standardized four-wire cable that provides both communication and power distribution. The power configurations are bus-powered and self-powered modes. The maximum current that may be drawn from the USB 5-V line during power up is 100 mA. For the bus-powered mode, a hub can draw a maximum of 500 mA from the 5-V line of the USB cable. A bus-powered hub must always be connected downstream to a self-powered hub unless it is the only hub connected to the PC and there are no high-powered functions connected downstream. In the self-powered mode, the hub is connected to an external power supply and can supply up to 500 mA to each downstream port. High-powered functions may draw a maximum of 500 mA from each downstream port and may only be connected downstream to self-powered hubs. Per the USB specification, in the bus-powered mode, each downstream port can provide a maximum of 100 mA of current, and in the self-powered mode, each downstream port can provide a maximum of 500 mA of current. Both bus-powered and self-powered hubs require over-current protection for all downstream ports. The two types of protection are individual port management (individual port basis) or ganged port management (multiple port basis). Individual port management requires power management devices for each individual downstream port, but adds robustness to the USB system because, in the event of an over-current condition, the USB host only powers down the port that has the condition. The ganged configuration uses fewer power management devices and thus has lower system costs, but in the event of an over-current condition on any of the downstream ports, all the ganged ports are disabled by the USB host. Using a combination of the BUSPWR and EEDATA/GANGED inputs, the TUSB2046 supports four modes of power management: bus-powered hub with either individual port power management or ganged port power management, and the self-powered hub with either individual port power management or ganged port power management. Texas Instruments supplies the complete hub solution because we offer this TUSB2046, the TUSB2077 (7port) and the TUSB2140B (4-port with I2C) hubs along with the power management chips needed to implement a fully USB Specification 1.1 compliant system.

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TUSB2046 4-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE
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APPLICATION INFORMATION USB design notes

The following sections provide block diagram examples of how to implement the TUSB2046 [Link], even though no resistors are shown, pullup, pulldown and series resistors must still be used to properly implement this device. Figure 1 shows a few resistors that must be used for the USB lines, and for a general reference design, one is available on the TI USB web site at [Link] Figure 6 is a block diagram example of how to connect the external EEPROM if a custom product ID and vendor ID are desired. Figure 7 is an example of how to generate the 6-MHz clock signal. Figure 8 shows the EEPROM read operation timing diagram. Figures 9, 10, and 11 illustrate how to connect the TUSB2046 device for different power source and port power management combinations.
TUSB2046 USB Hub 6-MHz Clock Signal 3.3 V System Power-On Reset 4 RESET GND 26 EXTMEM 12, 16, 20, 24 1 DP0 2 EEPROM 6 8 5 ORG VCC VSS S 1 D Q C 3 1 k 4 2 6 EEDATA 5 EECLK OVRCUR1 OVRCUR4 PWRON1 PWRON4 DM0 DM1 DM4 10, 14, 18, 22 9, 13, 17, 21 Power Switching DP1 DP4 11, 15, 19, 23 4 4 4 4 USB Data lines and Power to Downstream Ports 7, 28 30 XTAL1 29 XTAL2 VCC 3, 25 Regulator 5 V GND Bus or Local Power

GND Vbus

Figure 6. Typical Application of the TUSB2046 USB Hub

CL XTAL1 Rd C1 C2 XTAL2

NOTE A: Figure 7 assumes a 6 MHz fundamental crystal that is parallel loaded. The component values of C1, C2 and Rd were determined using a crystal from Fox Electronics part number HC49U6.00MHz30\50\0 70\20 which means 30 ppm at 25C and 50 ppm from 0C to 70C. The characteristics for the crystal are load capacitance (CL) of 20 pF, maximum shunt capacitance (Co) of 7 pF and the maximum ESR of 50 . In order to insure enough negative resistance, use C1 = C2 = 27 pF. The resistor Rd is used to trim the gain, and Rd = 1.5 k is recommended.

Figure 7. Crystal Tuning Circuit

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TUSB2046 4-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE
SLLS330A FEBRUARY 1999 REVISED AUGUST 1999

APPLICATION INFORMATION
programming the EEPROM An SGS Thompson M93C46 EEPROM or equivalent is used for storing the programmable VID and PID. When the EEPROM interface is enabled (EXTMEM = 0), the EECLK and EEDATA are internally pulled down (100 A) inside the TUSB2046. The internal pulldowns are disabled when the EEPROM interface is disabled (EXTMEM = 1). The EEPROM is programmed with the three 16-bit locations as shown in Table 1. Connecting pin 6 of the EEPROM high (ORG = 1) organizes the EEPROM memory into 6416 bit words. Table 1. EEPROM Memory Map
ADDRESS 00000 00001 00010 D15 0 D14 GANGED D13 00000 D12D8 00000 D7D0 00000000 VID Low-byte PID Low-byte

VID High-byte PID High-byte XXXXXXXX

The D and Q signals of the EEPROM must be tied together using a 1 k resistor with the common I/O operations forming a single-wire bus. After system power-on reset, the TUSB2046 performs a one-time access read operation from the EEPROM if the EXTMEM pin is pulled low and the chip select(s) of the EEPROM is connected to the system power-on reset. Initially, the EEDATA pin will be driven by the TUSB2046 to send a start bit (1) which is followed by the read instruction (10) and the starting-word address (00000). Once the read instruction is received, the instruction and address are decoded by the EEPROM, which then sends the data to the output shift register. At this point, the hub stops driving the EEDATA pin and the EEPROM starts driving. A dummy (0) bit is then output and the first three 16-bit words in the EEPROM are output with the most significant bit (MSB) first. The output data changes are triggered by the rising edge of the clock provided by the TUSB2046 on the EECLK pin. The SGS-Thompson M936C46 EEPROM is recommended because it advances to the next memory location by automatically incrementing the address internally. Any EEPROM used must have the automatic internal address advance function. After reading the three words of data from the EEPROM, the TUSB2046 puts the EEPROM interface into a high-impedance condition (pulled down internally) to allow other logic to share the EEPROM. The EEPROM read operation is summarized in Figure 8. For more details on EEPROM operation, refer to SGS-Thompson Microelectronics M93C46 Serial Microwire Bus EEPROM data sheet.

10

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3-Stated With Internal Pulldown

Start D15

Read OP Code(10)

6 Bit Address (000000)

48 Data Bits D14 D0

Dont Care XX

A5 Other Address Bits

A1

A0

Dummy Bit

MSB of The First Word

Other LSB of Data Bits Third Word EEPROM Driving Data Line

MSB of Fourth Word

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TUSB2046 4-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE

SLLS330A FEBRUARY 1999 REVISED AUGUST 1999

Figure 8. EEPROM Read Operation Timing Diagram

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TUSB2046 4-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE
SLLS330A FEBRUARY 1999 REVISED AUGUST 1999

APPLICATION INFORMATION bus-powered hub, ganged port power management

When used in bus-powered mode, the TUSB2046 supports up to four downstream ports by controlling a TPS2041 device which is capable of supplying 100 mA of current to each downstream port. Bus-powered hubs must implement power switching to ensure current demand is held below 100 mA when the hub is hot-plugged into the system. Utliizing the TPS2041 for ganged power management provides over-current protection for the downstream ports. The SN75240 transient suppressors reduce inrush current and voltage spikes on the data lines. The OVRCUR signals should be tied together for a ganged operation.
TUSB2046 3.3 V Upstream Port D+ D SN75240 A C B D 1.5 k DP0 DM0 DP1 DM1 15 k 15 k DP2 3.3 V LDO 5V 4.7 F 0.1 F GND 5V 3.3 V GND 4.7 F VCC DP3 DM3 XTAL1 6-MHz Clock Signal XTAL2 DP4 DM4 15 k 15 k 3.3 V EXTMEM PWRON1 PWRON2 System Power-On Reset RESET PWRON3 PWRON4 GND OVRCUR1 OVRCUR2 OVRCUR3 OVRCUR4 5V OC OUT OUT OUT Ferrite Beads 100 F D+ D GND TPS2041 EN IN IN 1 F Ferrite Beads GND 5V D+ D 15 k 15 k A C B D SN75240 100 F Ferrite Beads GND 5V DM2 A C B D SN75240 Ferrite Beads BUSPWR EEDATA/GANGED Downstream Ports D+ D GND 5V 15 k 15 k D+ D 100 F 3.3 V

100 F TPS2041 and SN75240 are Texas Instruments devices. 120 F per hub is the minimum required per the USB specification, version 1.1. However, TI recommends a 100 F low ESR tantulum capacitor per port for immunity to voltage droop. LDO is a 5 V to 3.3 V voltage regulator

Figure 9. TUSB2046 Bus-Powered Hub, Ganged Port Power Management Application

12

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TUSB2046 4-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE
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APPLICATION INFORMATION self-powered hub, ganged port power management

The TUSB2046 can also be implemented for ganged port power management in a self-powered configuration. The implementation is very similar to the bus-powered example with the exception that a self-powered port supplies 500 mA of current to each downstream port. The over-current protection can be provided by a TPS2044 quad device or a TPS2024 single power switch.
3.3 V Upstream Port D+ D SN75240 A C B D 3.3 V LDO 4.7 F 0.1 F GND 5V 3.3 V GND 4.7 F VCC DP2 DM2 15 k 15 k DP3 DM3 XTAL1 6-MHz Clock Signal XTAL2 DP4 DM4 15 k 15 k TPS2044 PWRON1 3.3 V System Power-On Reset EXTMEM PWRON2 PWRON3 RESET GND OVRCUR1 OVRCUR2 OVRCUR3 OVRCUR4 OC1 OC2 OC3 OC4 OUT1 OUT2 OUT3 OUT4 100 F Ferrite Beads GND 5V D+ D 100 F PWRON4 EN1 EN2 EN3 EN4 5V IN1 IN2 0.1 F Ferrite Beads GND D+ D 15 k 15 k A C B D SN75240 Ferrite Beads GND 5V 100 F D+ D 1.5 k DP0 DM0 TUSB2046 EEDATA/GANGED BUSPWR DP1 DM1 A C B D SN75240 5V 100 F 15 k 15 k Ferrite Beads GND 3.3 V Downstream Ports D+ D

5V

5 V Board Power

TPS2044, TPS2042, and SN75240 are Texas Instruments devices. Supply The TPS2024 can be substituted for the TPS2044. 120 F per hub is the minimum required per the USB specification, version 1.1. However, TI recommends a 100 F low ESR tantulum capacitor per port for immunity to voltage droop. LDO is a 5 V to 3.3 V voltage regulator

Figure 10. TUSB2046 Self-Powered Hub, Ganged Port Power Management Application

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TUSB2046 4-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE
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APPLICATION INFORMATION self-powered hub, individual port power management

In a self-powered configuration, the TUSB2046 can be implemented for individual port-power management when used with the TPS2044 because it is capable of supplying 500 mA of current to each downstream port and can provide current limiting on a per port basis. When the hub detects a fault on a downstream port, power is removed from only the port with the fault and the remaining ports continue to operate normally. Self-powered hubs are required to implement over-current protection and report overcurrent conditions. The SN75240 transient suppressors reduce inrush current and voltage spikes on the data lines.
TUSB2046 3.3 V Upstream Port D+ D SN75240 A C B D 3.3 V LDO 4.7 F 0.1 F GND 5V 3.3 V GND 4.7 F VCC DP3 DM3 15 k 15 k DP4 DM4 XTAL1 6-MHz Clock Signal XTAL2 PWRON1 PWRON2 3.3 V EXTMEM PWRON3 PWRON4 15 k 15 k TPS2044 EN1 EN2 EN3 EN4 OUT1 OUT2 System Power-On Reset RESET OUT3 OUT4 GND OVRCUR1 OVRCUR2 OVRCUR3 OVRCUR4 OC1 OC2 OC3 OC4 IN1 IN2 0.1 F 5V 100 F 5-V Board Power 100 F D+ D GND GND 5V D+ D 100 F A C B D SN75240 1.5 k DP0 DM0 DP1 DM1 BUSPWR EEDATA/GANGED DP2 DM2 15 k 15 k D+ D GND 5V A C B D SN75240 15 k GND 15 k 5V 100 F Downstream Ports D+ D

5V

TPS2042 and SN75240 are Texas Instruments devices. Two TPS2042 devices can be substituted for Supply the TPS2044. 120 F per hub is the minimum required per the USB specification, version 1.1. However, TI recommends a 100 F low ESR tantulum capacitor per port for immunity to voltage droop. LDO is a 5 V to 3.3 V voltage regulator

Figure 11. TUSB2046 Self-Powered Hub, Individual Port-Power Management Application

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TUSB2046 4-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE
SLLS330A FEBRUARY 1999 REVISED AUGUST 1999

MECHANICAL DATA
VF (S-PQFP-G32)
0,45 0,30 24 17

PLASTIC QUAD FLATPACK

0,80

0,22 M

25

16

32

9 0,13 NOM 1 5,60 TYP 7,20 SQ 6,80 9,20 SQ 8,80 0,25 1,45 1,35 0,05 MIN 0 7 Gage Plane 8

Seating Plane 1,60 MAX 0,10

0,75 0,45

4040172 / C 10/96 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Falls within JEDEC MS-026

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