This article has been accepted for publication in a future issue of this journal, but has not been

fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2020.3005940, IEEE
Transactions on Power Electronics

IEEE POWER ELECTRONICS REGULAR PAPER

A Review of SiC IGBT: Models, Fabrications,

Characteristics and Applications
Lubin Han, Student Member, IEEE, Lin Liang, Senior Member, IEEE, Yong Kang, Senior Member, IEEE, Yufeng
Qiu, Member, IEEE

Abstract- Along with the increasing maturity for the material are helpful for a good trade-off between Vf and switching loss.
and process of the wide bandgap semiconductor Silicon Carbide Although the bulk mobility of SiC IGBT is lower than that of
(SiC), the IGBT representing the top level of power devices could Si IGBT, the Vf of SiC IGBT is lower than that of Si IGBT
be fabricated by SiC successfully. This paper presents a thorough under the same blocking capability. It is worth noting that the
review of development of SiC IGBT in the past 30 years. The
problems in terms of SiC/SiO2 interface properties,
progresses of models, structure design and performance in SiC
IGBT are summarized. The challenges resulting from fabrication electromagnetic interference (EMI) and short circuit withstand
process and switching characteristics are discussed and analyzed capability impede the utilization of SiC IGBTs.
in detail. The experimental results and existing problems in SiC Although the SiC IGBTs have not been commercialized so
IGBT based applications are summarized in the end. far, great progress has been made in the past 30 years, as
Index Terms- silicon carbide, IGBT, device models, structure shown in Fig. 1. From 1996 when the first SiC IGBT was
designs, characteristics, applications, review. fabricated [5], to 2010, the SiC p-channel IGBT has been
studied extensively, because of the available n+ substrate with
I. INTRODUCTION low resistivity and defect density. The performance of p-IGBT
has been improved continually, especially after the
The insulated gate bipolar transistor (IGBT) combining introduction of charge storage layer (CSL) [6]. The fabricated
high input impedance of MOSFET and high current density of n-channel IGBT during this period exhibits very poor
bipolar devices shows great advantages in the medium- performance due to immature technology and p-type substrate
frequency high-power fields [1]. Si IGBT with high voltage with high resistivity and defect density [7]. Until the free-
and current are mainly targeted for use in traction systems, standing technology proposed by Cooper in 2010 [8], the
industrial applications, high voltage direct current research focus of SiC IGBT turned to SiC n-channel IGBT
transmission (HVDC) and emerging pulsed power application. because the free-standing technology provides a method to
In these fields, ultra-high voltage is designed to reduce the grow p+ collector on n+ substrate. After that, SiC n-IGBT
number of devices in series and simplify the converter shows more and more excellent static and dynamic
topologies [2]. The maximum voltage of Si IGBT has been characteristics. The blocking voltage of SiC IGBT has also
reported to reach 8.4 kV [3], which is close to the limit of Si exceeded 27 kV [9], becoming the promising device in high
devices. Frequency and operating temperature greatly limit the voltage fields. The SiC IGBT could reduce the differential
further development of Si IGBT in these fields as well. As the specific on-resistances (Ron,sp,diff) by more than one order of
wide bandgap material, SiC has higher breakdown field magnitude, compared with the SiC MOSFET of the same
strength, higher intrinsic temperature, higher thermal rated voltage. Therefore, it is encouraging for power
conductivity, and higher carrier saturation drift velocity [4]. conversion systems with transmission power greater than 100
Therefore, SiC IGBT device shows stronger competitiveness kW, although the switching loss (Esw) of SiC IGBT is higher
in high voltage, high temperature, and high power fields, as than that of SiC MOSFET. Recently, the 12-15 kV SiC IGBT
shown in TABLE I. The excellent static and dynamic modules have been developed [10]-[12], based on which the
performances of SiC IGBTs make up for the shortcomings of prototypes of the first solid-state transformer and the first
SiC MOSFETs and SiC GTOs. Among SiC polytypes and Marx generator have been built as well [13]-[14].
channel types, the SiC IGBT with 4H-polytype and n-channel The paper is organized as follows. Section II summarizes
is preferred due to the low forward voltage (Vf), fast switching the SiC IGBT models developed in different circuit simulator.
and wide safe operating area. The high bulk mobility and low In section III, the critical factors limiting the
current gain of wide-base pnp-transistor in 4H-SiC n-IGBT commercialization of SiC IGBT are analyzed. In addition, new
design concepts or technologies implemented in SiC IGBT
structure are also summarized to enhance the performance of
This work was supported by National Key R&D Program of China
(2018YFB0905700, 2018YFB0905705). (Corresponding author: Lin Liang). them. In Section IV, the Ron,sp,diff of high voltage power
L. Han, L. Liang and Y. Kang are with School of Electrical and Electronic devices are compared. The unique switching characteristics
Engineering, Huazhong University of Science and Technology, Wuhan, are analyzed in detail according to the waveforms variations.
430074, China. (email: lianglin@[Link], han_lubin@[Link], In addition, the gate drivers customized according to
ykang@[Link]).
Y. Qiu is with Global Energy Interconnection Research Institute, Beijing, characteristics of SiC IGBT are surveyed as well. Finally,
China. (email: qiuyufeng@[Link]). several typical applications of SiC IGBT are illustrated in

0885-8993 (c) 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See [Link] for more information.
Authorized licensed use limited to: University of Exeter. Downloaded on July 02,2020 at 07:51:02 UTC from IEEE Xplore. Restrictions apply.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2020.3005940, IEEE
Transactions on Power Electronics

IEEE POWER ELECTRONICS REGULAR PAPER

TABLE I
COMPARISONS OF PERFORMANCE BETWEEN HIGH VOLTAGE DEVICES

(1)
Bulk mobility (2)
Vf @35A/cm2 (3)
dv/dt Gate oxide Channel mobility (4) RBSOA
Device type Stored Charge SCWT
(cm 2/V·s) (V) (kV/μs) reliability (cm2/V·s) /FBSOA
Si N-IGBT 1350 (P) 2*4.5 (2*8.4kV) 5 High High 350-400 Long Narrow
4H-SiC N-IGBT 940 (N) 5 (15kV) 300 Medium Low Wide
4H-SiC P-IGBT 120 (Al) 5.5 (15kV) / Low Medium Medium
6H-SiC N-IGBT 410 (N) / / Medium Medium 0.5-100 Wide
Short
6H-SiC P-IGBT 100 (Al) 7.5 (550V) / Low High Medium
4H-SiC NMOSFET 940 (N) 7.2 (15kV) 70 Near Zero Low /
4H-SiC N-GTO 940 (N) <4 (15kV) 15 High / / Widest
(1)
P = Phosphorus, N = Nitrogen, Al = Aluminum.
(2)
The voltage in “()” is rated blocking voltage of devices.
(3)
The values of dv/dt is the maximum value in the reported researches.
(4)
The SCWT is short-circuit withstand time.

First 4H-SiC Charge storage layer First 12kV/10A

Trench gate pIGBT introduced to JFET region SiC IGBT module
 15kV/40A IGBT module
First 6H-SiC First 4H-SiC Free-standing  First 7kV/8kW SST
Trench gate IGBT Planar gate nIGBT technology proposed  First 32kV Marx Generator
 27kV SiC nIGBT

1996 1997 1998 1999 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015

Fig. 1 The important milestones of SiC IGBT.

section V. It is followed by the conclusion of the whole paper. simulation models also transfer from the original p-channel to
n-channel. The physical model of non-punch-through (NPT)
II. SIC IGBT MODEL RESEARCH SiC IGBT is proposed for the first time in [1]. The static and
dynamic behaviors of p-channel SiC IGBT and static
SiC IGBT devices are at the stage of development, and behaviors of n-channel SiC IGBT are verified in Saber and
cannot be commercialized on a large scale. The application of Pspice. Because the developed model has no buffer layer and
this high-voltage and high-temperature devices is faced with is essentially a Hefner model, the model cannot simulate SiC
challenges of immature packaging (cooling, insulation, etc.), IGBT devices with buffer layer, which are widely used
driver (EMI) and protection (overvoltage (OV), overcurrent nowadays. However, the relatively simple NPT structure
(OC), overheating (OT)). Therefore, for the device enables the model to simulate the static and turn-off behaviors
manufacturers and circuit designers, the appropriate SiC IGBT accurately. The p-channel SiC IGBT model is also developed
model is helpful to understand its working principle, optimize in [17] and is verified by numerical simulation results. The
the structure and predict the performances. model does not use Hefner’s base carrier distribution model
In this paper, all the SiC IGBT models developed in the based on the ambipolar diffusion equation, but uses a
circuit simulators are mathematical model [15]. Hefner IGBT piecewise function to simulate the base carrier distribution, as
model is the most classical mathematical model based on shown in Fig. 2 (a). This abrupt carrier distribution results in
semiconductor physics. The model mainly includes equivalent the simulation of the model in SPICE3F5 400 times faster than
circuits of MOSFET and ambipolar diffusion theory to explain the numerical simulation [18]. However, it also causes three-
bipolar transistor. It also includes the non-quasi-static effect slope voltage transition with moderate accuracy in the 2013
and non-linear capacitance effect to analyze the transient version. The model is further improved and verified under
process accurately [16]. The SiC IGBT models in Table II various temperature in 2019 version, when the interface traps
follow Hefner Si IGBT model, but the SiC IGBT models still model and temperature dependence model of intrinsic carrier
need further improvement to simulate its unique density and carrier lifetime are incorporated [19].
characteristics. The change of material from Si to SiC makes Reference [20] simplifies the Hefner IGBT model greatly,
the models more difficult to converge. Therefore, it needs to which uses the drain current of the MOSFET (ID) and the
be simplified properly. In addition, the two-slope voltage current gain of BJT (β) in (1) to obtain the collector current of
transition during switching process needs to be taken into IGBT (IC). The main contribution of [20] is the electro-thermal
account in the models. model of SiC IGBT, which was developed by the simplified
Table II summarizes all SiC IGBT models since 2012. As electrical model and 3D-finite element based thermal model.
n-channel SiC IGBT gradually replaces p-channel, the However, the electro-thermal model ignores the heavy

0885-8993 (c) 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See [Link] for more information.
Authorized licensed use limited to: University of Exeter. Downloaded on July 02,2020 at 07:51:02 UTC from IEEE Xplore. Restrictions apply.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2020.3005940, IEEE
Transactions on Power Electronics

IEEE POWER ELECTRONICS REGULAR PAPER

TABLE II
CHARACTERISTICS OF SIC IGBT MODELS

Papers [1] [17], [18], [19] [20] [21] [22] [23]

Year 2012 2013-2019 2013 2014 2015 2018
15kV NPT p- 13kV FS p and n- 12kV & 20kV FS >12kV FS n and p-
Device Type 1.2kV n-channel 15kV FS n-channel
channel channel n-channel channel
Saber, HSpice,
Simulator Saber & Pspice SPICE3F5 Simulink Saber Simulink
Spectre
Fully prediction
400 times Integrated electro- Fully prediction of Unified physical
First unified of different
Achievement faster than 2D thermal coupling static, turn-on and model of FS type
physical model temperature,
numerical simulation model turn-off behaviors Si, SiC, n, P IGBT
voltage and current
Lack of Approximation
Limited to NPT Neglect of transient Low accuracy at Partial expression
Limitation experimental results taken to simplify
structure behaviors low current fitted by functions
under punch-through the model
Static accuracy +++ ++ +++ + ++ +++
Turn-on accuracy / ++ / / ++ /
Turn-off accuracy +++ +++ / ++ + +++

injection effect and voltage drop. Therefore, it can only

simulate the static characteristics.
I C  (   1) I D (1)
Reference [21] extends Hefner Si IGBT model with buffer
layer to field-stop (FS) SiC IGBT. With the help of parameters
extraction software tool, 20 physical and structural parameters
are extracted from the static and dynamic waveforms.
Furthermore, the model simulates the static curves of 12 kV
and 20 kV SiC IGBT at different temperatures and the turn-off
process at different temperatures, voltages and currents. It is (a) (b)
noteworthy that obvious deviations can be seen between the Fig. 2 Base region carrier distributions are modeled by (a) piecewise
static curves of simulation and measurement, which may be function [17] and (b) exponential function [22].
due to deviations of static parameters fitting. In addition, when
the SiC IGBT enters the punch-through state, the accuracy of useful tool for circuit designers. However, the verified models
the model decreases, especially in the case of low current. with high-accuracy static, turn-on and turn-off characteristics
Therefore, the unique punch-through effect should be included are still not available. The complex parameters extraction
in SiC IGBT models when extending the Si models to the SiC process becomes one of the limitations of the implementation
models. of the model in the circuit simulators, especially under
Similar to [17], [22] also simplifies the carrier distribution, different temperatures. In addition, the compatibility with
as shown in Fig. 2 (b). The model in [22] uses the exponential commercial simulators is necessary to be further improved.
expression to describe carrier density distribution and Therefore, modelling SiC IGBT needs to compromise the
linearization to describe temperature-dependent parameters. simulation accuracy and simulation speed. Efficient SiC IGBT
Therefore, some parameters (current, diffusion capacitance, models, such as simplified physics-based models or high-
threshold voltage, and the variation of transconductance with accuracy behavioral models, are the main trends in predicting
temperature) related to carrier density are approximate value, the electro-thermal behaviors of circuits.
which results in the model accuracy depending on the fitting
results. However, this model verifies static, turn-on and turn- III. CHALLENGES OF SIC IGBT FABRICATION
off behaviors under different temperature and gate resistance
Although SiC IGBT has great theoretical advantages over
for the first time.
other high voltage devices, the poor quality of wafer and
A unified IGBT model for Si/SiC, p/n-channel is
immature fabrication technologies prevent SiC IGBT from
developed in [23], which is based on [1] and Hefner model.
commercialization. The main challenges for SiC IGBT are the
The validity of the model is verified by Si n-channel IGBT
fabrication of SiC n-IGBT, insufficient lifetime, poor
and SiC n-channel and p-channel IGBT. Compared with [21],
SiC/SiO2 interface properties and lack of high voltage, high
the static and turn-off process are more accurate, even if some
temperature packaging. Therefore, these problems are
simplifications are made. In DC-DC-AC circuit simulation,
analyzed in detail and some efforts for improving SiC IGBT
the run of several hundred milliseconds in Saber takes 0.0156s,
performance, including optimized growth process and new
which indicates that the unified model is more suitable for
designs of bulk structure, are also explained.
system-level simulation.
These physics-based mathematical models, verifying the
A. Fabrication of n-channel SiC IGBT
characteristics of SiC IGBT to some degree, become the
As mentioned above, n-channel SiC IGBT has greater

0885-8993 (c) 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See [Link] for more information.
Authorized licensed use limited to: University of Exeter. Downloaded on July 02,2020 at 07:51:02 UTC from IEEE Xplore. Restrictions apply.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2020.3005940, IEEE
Transactions on Power Electronics

IEEE POWER ELECTRONICS REGULAR PAPER

advantages as a high voltage switch and becomes the main C face

research focus. Unfortunately, n-channel SiC IGBT needs high
N+ substrate Removed
doping p-type collector as hole-injection layer. However, in by
commercial p-type substrate, quality is poor, and resistivity is N+ Buffer polishing
high (~2.5 Ω·cm) [24]. The advantages of n-channel SiC
IGBT are reduced. Therefore, free-standing technology was
proposed by Wang and Cooper for the first time, as shown in Epi-growth N-drift
Fig. 3 [8]. The n- and p+ epilayers growing on n-type substrate Direction
Device
serves as the drift region and supporting substrate/collector of fabricated
n-channel SiC IGBT. After that, there are several researches of N+ buffer on this
portion
n-channel SiC IGBT based on free-standing, and the test
P+
results of these devices vary. Similar to Cooper's results, n-
channel SiC IGBT fabricated by Chowdhury shows poor Si face
conductance modulation [25]. It may be attributed to the low
injection efficient due to the very thin and low doping Fig. 3 Inverted-growth process of free-standing technology.
concentration of p-type collector. Compared with the p-type
collector formed by epitaxy, that formed by ion implantation It is well known that the main lifetime-killers of carriers
has a native disadvantage in injection efficiency. Although are Z1/2 and EH6/7 related to carbon vacancy. By C+ ion
Yonezawa et al. obtained n-channel SiC IGBT with low implantation/annealing, thermal oxidation/annealing or
Ron,sp,diff, their results showed that with the increase of device optimization of growth conditions, the concentrations of these
size, the Ron,sp,diff showed a degradation trend [26]. This two kinds of defects could be reduced to a very low level, as
phenomenon may be caused by the variation of carrier lifetime low as 1011 cm-3 [33]. The corresponding lifetime can reach
distribution. more than 10 μs, which is enough for high voltage devices
The p-type epilayer, used as supporting substrate, needs to (several kV). However, for the SiC IGBT with the voltage of
be thick enough and high enough in doping concentration to more than 10kV, it is not enough because of the extremely
ensure mechanical strength and low series parasitic resistance. thick drift region. In the epilayers with low Z1/2 concentration
However, in thick p-type epilayer, the doping concentration is (< 1013 cm-3), other defects and surface recombination begin to
limited by the formation of thin ohmic contacts, growth rate, dominate carrier lifetime. These defects include in-grown SF
surface roughness and in-grown defects [24], [27]. In addition, (IGSF), dislocations, grain boundaries, carrot defect, half-loop
it is very difficult to remove the n-type substrate due to the array, morphological defect, etc. [34]-[37]. The IGSF with low
hardness and chemical inertness of SiC. Complete separation formation energy is a quantum well structure and efficient
of substrate, the carrier lifetime reduction and wafer bow, recombination center, which dominates the carrier lifetime.
caused by removing substrate process, should be improved Different types of IGSF could reduce lifetime from 40% to
further as well [28]-[29]. 95% [37]!
Despite many efforts to reduce these defects, they still
B. Defects and Lifetime Enhancement exist and greatly affect the carrier lifetime. In addition, the
The quality of SiC wafer directly determines the inhomogeneity of lifetime distribution, the trade-offs between
performance, reliability, stability and yield of SiC IGBT different defect density, the trade-offs between target defects
device, and indirectly affects the cost of fabrication. Defects in and new defects caused by post-growth, and the contradiction
SiC wafers mainly include intrinsic material defects, such as between epitaxial growth on C-face and Si-face, further hinder
electronic traps Z1/2 and EH6/7, and structural defects caused the commercialization of SiC IGBT [33], [36]. Supply of large
by epitaxial growth, such as micropipe, dislocations (threading size and high quality material and low defect density epitaxial
dislocations (TD) or basal plane dislocations (BPD)), 3C growth processes are the key points to realize the
inclusions, stacking fault (SF), etc. The micropipe density is commercialization of SiC IGBT.
usually used to grade SiC wafers. At present, the micropipe
density of SiC wafer has been reduced to less than 3 cm-2, and C. SiC/SiO2 Interface Properties
the lowest is 0.1 cm-2, realizing “zero micropipe” [30]-[31]. In SiC IGBT shows superior performance, compared with Si
addition, other defects are also reduced to a reasonable range IGBT. However, conventional material SiO2 is still used as
by the optimized growth process and post-growth treatment, gate dielectric, which leads to new issues in the SiC/SiO2
which leads to the commercialization of low voltage 4H-SiC interface. Although the native silicon dioxide of SiC is readily
MOSFET devices [32]. However, for SiC IGBT, the above formed in oxidizing ambient at high temperature like the Si
defects as the recombination center greatly reduce the carrier IGBT, additional carbon (C) clusters will be generated in the
lifetime in thick drift region. It is known that high voltage SiC oxidation process, besides the near-interface traps. The trap
bipolar devices require a long lifetime to reduce the Vf drop. In density of SiC/SiO2 interface is one or two orders of
addition, the carrier lifetime dominates the trade-off between magnitude of that of Si/SiO2 interface due to the extra carbon
Vf and switching speed. Therefore, much longer lifetime is clusters [38]. Such a high interface trap density (1013 cm-2)
necessary to achieve the lifetime control of bipolar devices. leads to a large reduction in the channel mobility of SiC MOS
structure, while channel mobility of Si MOS structure is only

0885-8993 (c) 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See [Link] for more information.
Authorized licensed use limited to: University of Exeter. Downloaded on July 02,2020 at 07:51:02 UTC from IEEE Xplore. Restrictions apply.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2020.3005940, IEEE
Transactions on Power Electronics

IEEE POWER ELECTRONICS REGULAR PAPER

reduced by a factor 2 from its bulk mobility [39]. In addition,

the high density of interface traps (Dit) causes the threshold
1.6mm (53%)
voltage shift, the static and dynamic current amplitude [48] 1.5mm (56%)
degradation, increase of the turn-off current tail and the 1.5mm (51%) [14]
[46]
increase of leakage current in the blocking state [40]. 1.9mm (63%)
Introducing nitrogen is the most effective method to reduce [47]
0.75mm (75%)
the Dit in post-oxidation annealing (POA). After POA, the [26] 0.75mm (48%)
channel mobility is around 50 cm2/v·s. However, POA [49]
introduces defects in the oxides and causes reliability 1.25mm (60%) 0.5mm (57%)
problems. To achieve a high quality interface like Si/SiO2, it is [45] [44]
necessary to remove the remaining C atoms and near-interface
traps completely. 1.3mm (54%)
Another important problem is the high electric field of [47]
oxide layer. According to Gauss law, in 4H SiC IGBT, the
electric field in SiO2 is 2.5 times that in SiC. Compared with
Si IGBT, higher critical electric field in SiC IGBT makes Fig. 4 The terminations used in various drift thickness SiC IGBT devices.
electric field in SiO2 higher. In many researches, the dielectric The length of termination and termination area as a percentage of chip
with high dielectric constant (high-k) is used to replace the area are labelled.
SiO2 to reduce the electric field ratio between gate dielectric
and SiC [41]-[42]. However, the new dielectrics still have
poor interface with high density of interface defect and larger
leakage current due to the lower band offset in the new
dielectric/SiC interface. Although the stack structure with
SiO2 and high-k could reduce the leakage current and improve
the channel mobility to some degree, the compatibility with
the existing mass manufacturing and the long-term robustness
under high voltage operation are difficult to handle.

D. Termination Technologies
Reliable and robust edge terminations should be carefully
designed to sustain the high voltage of SiC IGBT devices.
Terminations allow device to support more than 90% of the
bulk breakdown voltage [43]. To date, junction termination
extension (JTE) and field limiting rings (FLRs) are two main
Fig. 5 Relationship between the maximum switching frequency and
termination technologies applied to SiC IGBT. Furthermore, thermal resistance of 15kV SiC IGBT module under different maximum
terminations used in available SiC IGBT devices are rated Tj.
summarized in Fig. 4 [26], [44]-[49]. In order to alleviate the
crowded edge electric field effect, the termination length of At present, the SiC IGBT is still packaged in the wire-
SiC IGBT is much longer than that of the Si counterparts. bonding module [2], [10], [13], [52], in which the failure of
Termination area accounts for more than 50% of the chip area, bonding wires and solder failure are the common lifetime
resulting in enlarged chip area and, therefore, a non-optimal limiting factors. In addition, voltage breakdown and partial
cost/area ratio. discharge caused by ultra-high voltage bring a greater
Accurate control of the implantation doses and significant challenge to the insulating material. The intersection point of
area consumption are necessary for JTE technology to achieve conductor, dielectric and encapsulation is the weak point
a uniform electric field. Therefore, JTE technology is mainly exposed to high electric field, which may exceed the
used in lower voltage devices, while FLR technology targets breakdown electric field strength of the materials. Therefore,
for high voltage devices. However, FLR technology used in the selection of high breakdown electric field materials,
high voltage devices consumes a large area as well. To solve smooth electrodes and enough electrodes clearance need to be
this problem, FLRs technologies with linearly or regionally focused on. Even so, there are still a series of problems, such
optimizing the distances and JTE rings technology combining as the extra displacement current caused by the high dielectric
JTE and FLR are proposed [43], [50]-[51]. The former constant of the insulating layer, the complexity of processing
technology reduces the termination length by 30% and and the increased module size.
increases the breakdown voltage by 23%. The latter reduces To realize the insulation capability between the chip and
the termination area by 20% - 30% to achieve the same the heatsink in SiC IGBT module, several millimeters of
breakdown voltage. insulating layer is required when the Al2O3 or AlN ceramic is
used. It is no doubt that a large thermal resistance and thermal
E. Packaging Technologies capacity are introduced, which leads to a larger junction
temperature (Tj) of SiC IGBT module, thus threatening the

0885-8993 (c) 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See [Link] for more information.
Authorized licensed use limited to: University of Exeter. Downloaded on July 02,2020 at 07:51:02 UTC from IEEE Xplore. Restrictions apply.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2020.3005940, IEEE
Transactions on Power Electronics

IEEE POWER ELECTRONICS REGULAR PAPER

TABLE III Anode Emitter

P+ N+
ADVANTAGES OF UPPER TECHNOLOGIES P-mos Nbase N-mos
P+ N+
P-mos Gate2 Gate P-body Gate
Gate1 Pwell
Upper technologies Advantages CSL
Nwell
 Lower Vf
Trench cluster IGBT
 Lower Esw N- drift
(TC-IGBT) [54] P- drift
 Lower saturation current
 Lower interface electric field
P+ buffer N+ buffer
Diode clamped shield IGBT  Faster switching
P+
(DCS-IGBT) [55]  Lower current overshoot N+

 Lower saturation current Cathode Collector

JFET width optimization [8], [25], (a) (b)
 Lower Vf
[26], [44] Fig. 6 Upper technologies. (a) Trench cluster IGBT (TC-IGBT). (b)
Diode clamped shield IGBT (DCS-IGBT).
TABLE IV
ADVANTAGES OF MIDDLE TECHNOLOGIES Emitter
Emitter
Gate
Emitter
Gate

P+ N+ P+ diverter P+ diverter
Middle technologies Advantages N+ N+
P-body Gate
P-body P-body
 Faster switching P+ buried layer
Buffer layer thickness [58]  Lower current bump N-drift-1
 Lower current overshoot N-drift
P-pillar N-pillar
 Better tradeoff between Vf and
N-drift-2
P+ buried layer [59] saturation current
 Better tradeoff between Eon and di/dt N+ buffer N+ buffer N+ buffer
Carrier storage layer (CSL)
 Lower Vf P+ P+ P+
[25]
Superjunction [60], [61]  Better tradeoff between Vf and BV Collector Collector Collector
Depletion-controlled (DC) (a) (b) (c)
 Suppression of dv/dt and EMI
structure [62] Fig. 7 Middle technologies. (a) Superjunction. (b) P+ buried layer. (c)
Depletion-controlled (DC) structure.
TABLE V
ADVANTAGES OF LOWER TECHNOLOGIES Emitter Emitter Emitter1 Gate1 Emitter1
P+ N+ P+ N+
N+
Lower technologies Advantages P-body Gate P-shield P-body Gate P-shield N+

Backside npn-collector (npn- CSL CSL P-base P-base

 Better tradeoff between Vf and Eoff
IGBT) [56]
N-drift
Collector side schottky contact
 Better tradeoff between Vf and Eoff N- drift
(SC-IGBT) [57] N- drift

 Bi-directional conduction
Bi-directional IGBT N+ buffer
 Adjustable Vf and Esw by gate N+ buffer P-base P-base
(BD-IGBT) [63] P+
signals P+ P
N+ N+
N+ P+

Schottky
Collector Collector Emitter2 Gate2 Emitter2
solder and bonding wires lifetime. In the SiC IGBT module, Contact
(a) (b) (c)
the thermal resistance of ceramics accounts for nearly one Fig. 8 Lower technologies. (a) Backside npn-collector (npn-IGBT). (b)
third of the total thermal resistance [53]. Fig. 5 shows the Collector side schottky contact (SC-IGBT). (c) Bi-directional IGBT (BD-
relationship between the maximum switching frequency and IGBT).
thermal resistance of 15kV SiC IGBT module under different
maximum rated Tj. 175 °C is the highest Tj that the wire-
bonding module could withstand. Due to the large thermal 2
8kV Si IGBT @35A/cm
resistance of SiC IGBT module, only several kilohertz could
guarantee the Tj below the maximum value. Therefore, it is
important to improve the temperature withstand capability and
@20A/cm2
reduce the thermal resistance of the module. New packaging 2
@31A/cm
technologies such as free bonding-wire connection, nano- Filled－ conventional
silver sintering and double-sided cooling may be the key Open－ new IGBT
technologies to solve the above problems related to SiC IGBT
module.

F. New Structural Designs @100A/cm2

@30A/cm2
Although SiC IGBT has several superior properties over
Si IGBT in terms of blocking voltage, thermal conductivity
and switching speed, the conventional IGBT structure limits
the properties of SiC material. Therefore, some new solutions
of structure and parameter optimization are proposed to Fig. 9 TBEoff, Vf under tunable parameters for SiC IGBT devices. The trade-off
curve of DCS-IGBT is zoomed in in inset.
improve the electrical performances and reliability of SiC

0885-8993 (c) 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See [Link] for more information.
Authorized licensed use limited to: University of Exeter. Downloaded on July 02,2020 at 07:51:02 UTC from IEEE Xplore. Restrictions apply.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2020.3005940, IEEE
Transactions on Power Electronics

IEEE POWER ELECTRONICS REGULAR PAPER

IGBT. New structures and parameters optimizations are

2014, Cree
summarized and divided into upper technologies, middle
2014, AIST
technologies and lower technologies, as shown in Fig. 6-8. 2002, ABB

The advantages of new structures are also summarized in 2014, Cree

2014, Cree
Table III-V [8], [25]-[26], [44], [54]-[63]. Most of these 2014, Cree
proposed technologies aim to achieve lower Vf and fast
2014, Cree 2013, Cree
switching. How to reduce Vf of SiC IGBT is an important 2014, AIST (250 C) 2013, Cree
issue in the design of SiC IGBT devices, especially in low 2012, Cree

frequency and high power applications. Therefore, some 2016, AIST

2014, AIST
structures and parameters are optimized to enhance the
 p-channel SiC IGBT
conductivity modulation, thus to achieve a lower Vf. As a  n-channel SiC IGBT
2012, Cree  SiC MOSFET
result, carriers stored in drift increase and are difficult to be  Si IGBT
swept out during turn-off process, which increases the tail
current and Eoff. Therefore, the trade-offs between Eoff and Vf
(TBEoff, Vf) are used to evaluate the static and dynamic
performances of new structures and parameters optimizations. Fig. 10 The Ron,sp,diff of Si and SiC devices reported in references.
TBEoff, Vf of high voltage Si IGBT, conventional SiC IGBT
and new structure SiC IGBT under several tunable parameters temperature.
are compared and presented in Fig. 9. The n-channel, p-
channel SiC IGBT and Si IGBT are represented by blue, red A. Static Characteristics
and green, respectively. The filled and open symbols are The forward characteristics are important parts of the
conventional and new structure in SiC IGBT. Collector side static characteristics, which could be described by Ron,sp,diff.
schottky contact (SC-IGBT), trench cluster IGBT (TC-IGBT) Therefore, Ron,sp,diff of SiC IGBT devices with different
and diode clamped shield IGBT (DCS-IGBT) based on trench blocking voltage is summarized in Fig. 10. The Ron,sp,diff of SiC
gate IGBT are compared with conventional SiC IGBT. Firstly, IGBT is lower than Si IGBT and SiC MOSFET in general,
TBEoff, Vf of SiC IGBT are better than the 8 kV Si IGBT of the due to the fact of shorter drift region thickness or conductivity
highest voltage level in the available Si IGBT, which shows modulation. Although different device parameters cause the
the superiority of SiC IGBT in the high voltage fields [3]. dispersion of Ron,sp,diff, the lowest available Ron,sp,diff of SiC
Although the TBEoff,Vf curves of three conventional trench gate IGBT is much lower than SiC MOSFET limit [64]. In addition,
SiC IGBT are different because of different structural p-channel devices show poorer forward characteristics than n-
parameters, all the new structures show better TBEoff,Vf than channel devices. Therefore, n-channel SiC IGBT is a
conventional SiC IGBT. The TBEoff, Vf curves marked in red promising device in high power fields [65].
representing p-channel SiC IGBT are much worse than those The blocking capability characteristics related to
of n-channel SiC IGBT, but closer to Si IGBT. It further termination technologies are described in section III (D).
demonstrates the advantages of n-channel SiC IGBT in
TBEoff,Vf. B. Dynamic Characteristics
Fundamentally, the enhanced conductivity modulation and SiC IGBT is mainly used to drive inductive loads. Double
fast carrier removal are necessary to optimize the TBEoff, Vf. In pulse test (DPT) is typically used to evaluate the switching
TC-IGBT structure, as shown in Fig. 6 (a), the multi-layers characteristics of power devices. DPT circuit and switching
MOS and NPNP thyristor composite structure above drift waveforms of SiC IGBT are shown in Fig. 11. C1 and C2 are
region enhances the conductivity modulation during on-state parasitic capacitance. According to the current waveform, the
and help remove the excess carriers during turn-off [54]. As turn-off process is divided into five phases, and turn-on
for DCS-IGBT and SC-IGBT (or npn-IGBT), fast switching is process is divided into three phases.
achieved due to the fast carriers removal by screening the 1) Turn-off process
capacitive coupling CGC and formation of reverse electric field Phase I: current drop at the beginning of turn-off. Ideally,
at the backside, respectively [55]-[57]. In addition, moderate the load current consists of collector current and diode current.
tradeoff is achieved by adjusting the buffer thickness [10], as Before the IGBT voltage rises to the dc bus voltage, the diode
shown in Fig. 9. Therefore, the development of new structure is cut off, and the load current is equal to the collector current.
is a promising way to further improve the static and dynamic However, there are parasitic capacitors in diodes, load
performances of SiC IGBT devices. inductors and SiC IGBT. The displacement current (iC1 and iC2)
generated at very high dv/dt flows through parasitic capacitors,
IV SIC IGBT CHARACTERISTICS AND GATE DRIVERS which reduces the collector current [48], [66]. The
displacement current is usually neglected in Si IGBT due to
The behaviors of SiC IGBT are quite different from those low dv/dt.
of Si IGBT because of its wide bandgap material and Phase II: current bump process. The displacement current
extremely high operating voltage. The SiC IGBT behaviors generated by high dv/dt on the diffusion capacitance provides
mainly include static and dynamic characteristics, which the base drive current to internal pnp transistor. Therefore, the
varies with the device structure, circuit parameters and magnitude of current bump is determined by dv/dt and

0885-8993 (c) 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See [Link] for more information.
Authorized licensed use limited to: University of Exeter. Downloaded on July 02,2020 at 07:51:02 UTC from IEEE Xplore. Restrictions apply.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2020.3005940, IEEE
Transactions on Power Electronics

IEEE POWER ELECTRONICS REGULAR PAPER

+
Lload D C2
iL
iD iC2 +
iT iC1 VDC
Vdriver +
C1

(a)
v, i v, i
I II III IV V VI VII VIII

Current
Fig. 12 Comparison of maximum controllable current for the 15 kV 4H-
SiC MOSFETs and the 15 kV 4H-SiC n-IGBTs in a hard switching
Voltage
application [68].

Time Time
controlled by VGE, once the channel is formed.
t1 t2 t3 t4 t5 t 6 t7 t8 t9 Phase VII: reverse recovery of diode. After collector
Turn off Turn on
(b)
current reaches to load current, the extreme high dv/dt results
Fig. 11 (a) DPT equivalent circuit. (b) The typical switching waveforms in the high current overshoot.
of SiC IGBT during hard switching. Phase VIII: After punch-through. The low depletion
capacitance becomes the high diffusion capacitance, which
common-emitter current gain. With the increase of voltage, leads to slower dv/dt [10]. It is easy to produce oscillation
although capacitance and dv/dt decrease, the current gain of after current overshoot because of parasitic inductance and
PNP transistor increases due to the reduced un-depleted region, parasitic capacitance of diode and load. In particular, a larger
as shown in (2). These three factors determine the magnitude common-emitter parasitic inductance may aggravate the
of current bump. oscillation process [52].
1 In resistive-inductive load, the turn-on process is basically
= (2)
cosh(Wun -depleted / La )  1 the same as that of inductive load. However, in resistive load,
zero current switching and great damping lead to the reduction
Phases I and II are also known as sweep-out phases. In of the current overshoot [53].
this process, the electric field generated by reverse biased PN
junction of the depletion region clears the excess carriers, C. Competitions between SiC IGBT and SiC MOSFET
which exponentially distribute in the drift region. The charge The lower Vf and fast switching are always compromised
to be swept out is determined by (3), where C is the diffusion by each other. Lower Vf and fast switching are preferred in
capacitance [67]. low and high switching frequency fields, respectively. Since
Q (3) both on-state loss and switching loss increase with increasing
C
V current, the current capability is closely related to switching
Phase III: after punch-through. The charges are mainly frequency, as shown in Fig. 12 [68]. The maximum current
cleared by the combination of buffer layers [57]. Here, C in (3) decreases with increasing switching frequency due to
becomes depletion capacitance with a small value [10], [46]. switching loss dominating the power dissipation under high
Therefore, the charges that need to be removed are few, which switching frequency. SiC IGBT exhibits higher current
causes a rapid rise in voltage. And the current bump decreases capability over SiC MOSFET, when switching frequency is
due to the drastic decrease of C and the dramatic increase of lower than 5 kHz. Even in high switching frequency, current
dv/dt. In addition, the displacement current increases, so the capability of SiC MOSFET is slightly greater than SiC IGBT,
collector current begins to decrease. which shows SiC IGBT is a promising device used in high
Phase IV: diode turn-on. Once the VCE reaches to the bus voltage, high current and high frequency applications.
voltage, the diode turns on and the current transfers from SiC
IGBT to the diode. Voltage overshoot is typically negligible D. Gate drivers for SiC IGBT
due to lower current. Gate drivers for SiC IGBT is still not commercialized,
Phase V: tail current. The recombination of minority considering high insulation capability, low coupling
carriers removes charge, while the stored charge is still very capacitance, low cost, reasonable size, high efficiency, high
small. reliability, etc. At present, the topology and control strategies
2) Turn-on process. of Si IGBT or MOSFET are still used for the gate driver
Phase VI: current increase after gate voltage (VGE) prototype of SiC IGBT/MOSFET [69]-[73], which includes
reaching threshold voltage (VTH). The current increase is isolated power supply, signal isolation, power amplification

0885-8993 (c) 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See [Link] for more information.
Authorized licensed use limited to: University of Exeter. Downloaded on July 02,2020 at 07:51:02 UTC from IEEE Xplore. Restrictions apply.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2020.3005940, IEEE
Transactions on Power Electronics

IEEE POWER ELECTRONICS REGULAR PAPER

TABLE VI
GATE DRIVERS FOR SIC IGBT.

DC Insulation Coupling Capacitance

References Functions Target Devices
Capability (kV) @50MHz (pF)
 Passive driving；
[69] 100kV 3.4 15kV SiC IGBT
 Shoot-through protection
[70] 30kV 1.45  Passive driving 10kV SiC IGBT/MOSFET
[71] / 3.5  Passive driving 15kV SiC IGBT/MOSFET
 Active driving;
 Protections: OT, OC, ST; 15kV SiC IGBT
[72] 20kV <1.5
 State-monitor; 10kV SiC MOSFET
 Communication
 Passive driving;
[73] 55kV 2 10kV SiC MOSFET
 Short circuit protection;

respectively in design for SiC IGBT gate drivers. In the power

Rgon transmission stage, the design of isolation transformer is an
important part. Bulk size, winding mode, core material,
Vge insulation capability, coupling capacitance, magnetizing
inductance and cost of the transformer counter each other.
When the gate driver is exposed to the high voltage side, the
high dv/dt will produce displacement current across the
coupling capacitance, which will disturb the control signal.
Vce － 2-stage AGD The coupling capacitance depends on the winding area on the
－ 3-stage AGD
－ Conventional
core [70]. Therefore, the coupling capacitance is several pico-
farads when winding enameled wires on the core, while the
t1 t2 t3 t4 t2 ' t3 ' t4 ' coupling capacitance could be reduced to less than 1 pF by
one turn or PCB integrated transformer [70]. However, it also
Fig. 13 The representation of conventional driver and AGD during turn- increases the leakage inductance of the transformer. Another
on. underestimated design consideration is the efficiency and
thermal distribution caused by conduction loss, switching loss
and core loss. Reasonable designs of input voltage, turns ratio
and switching frequency of H-bridge are effective ways to
improve efficiency. Gate drivers developed in recent years are
summarized in TABLE VI.
As shown in Fig. 11, the distinct two-slope variation of
SiC IGBT during switching generates high dv/dt above punch-
through voltage (VPT) and high switching loss below VPT,
simultaneously. Therefore, the active gate drivers (AGD) with
fast changing gate resistance are necessary to drive the SiC
IGBT reliably and efficiently. A typical operating principle of
(a) AGD during turn-on is shown in Fig. 13. During t1 - t2, the
Rgon is small to reduce the turn-on delay. During t2 - t3, the Rgon
turns to be very large to limit dv/dt. During t3 - t4, the Rgon
becomes a small value to shorten the voltage falling time. The
changing of Rgon could be realized by RC delay circuit or fast
BJT [67], [72]. Different from the conventional driving
control, as shown in Fig. 14, using 2-stage AGD, suppressing
dv/dt suppression and minimum Eon are achieved,
simultaneously.

V SIC IGBT APPLICATIONS

(b) SiC IGBT provides new solutions and improved
Fig. 14 Voltage waveforms of 15kV SiC IGBT with conventional gate performance for power conversion system. However, the
driver (a) and 2-stages AGD(b). [67]
comprehensive integrating control of voltage sharing, current
circuits. It is popular that transformer and optical fiber are sharing, soft switching, driving and modulation needs to be
used for power transmission and signal transmission, reconsidered, because the high voltage, high dv/dt, and high

0885-8993 (c) 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See [Link] for more information.
Authorized licensed use limited to: University of Exeter. Downloaded on July 02,2020 at 07:51:02 UTC from IEEE Xplore. Restrictions apply.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2020.3005940, IEEE
Transactions on Power Electronics

IEEE POWER ELECTRONICS REGULAR PAPER

Leakage Current
Voltage Static Parallel
Device Capacitance
Sharing Dynamic Resistor
Delay Time

EON
Power RC
Thermal Damage EOFF
Loss Snubber
Snubber Resistor

CM Interference Turn-off dV/dt Active Gate

dV/dt
Cross-Talk Turn-on dV/dt Gontrol

Issues Challenges Solutions

Fig. 16 The control strategy of SiC IGBT devices in series from [77].

(a)

Fig. 17 The voltage sharing of 15kV SiC IGBT with RC snubber (15Ω,
2.2nF) [78].
(b)
Fig. 15 Switching waveforms of ZVS. (a) Turn-off. (b) Turn-on. [66] external snubber capacitor will be fed back to source during
turn-off. Therefore, the real device loss can be calculated by
TABLE VII
COMPARISON OF DC-AC OPERATION OF 15KV SIC IGBT WITH SOFT thermal resistance of heatsink. The calculation and
SWITCHING AND HARD SWITCHING experimental results of soft switching and hard switching are
compared in Table VII [76]. Compared with hard switching,
Soft switching Hard switching
soft switching not only reduces device loss significantly, but
Total power loss (W) 68.89 – 80 355
Junction temperature (°C) 46.87 – 49.16 130.5 – 135.65 also greatly reduces dv/dt stress, thus reducing common mode
AC pole dv/dt (kV/μs) 6.02 30.77 current.
Common mode current (A) 1.8 9.23
B. Series Connected SiC IGBT
Modular multilevel converter is used to enable a single
temperature of SiC IGBT bring great challenges to the whole device to handle a higher grid voltage. However, devices with
converter and peripheral auxiliary circuits. higher blocking voltage are needed in the applications of high
voltage two-level converter, or three-level converter with
A. Soft Switching
higher voltage or HVDC. Therefore, the devices in series are
Ultra-high voltage and fast switching generates high dv/dt
necessary. When devices are connected in series, device
and switching losses on SiC IGBT. The simple zero voltage
inconsistency and drive inconsistency will cause voltage
switching (ZVS) with external snubber capacitors can realize
imbalance of devices [77], [78]. Paralleling large resistance,
full ZVS turn-on and near ZVS turn-off [66], [74], [75]. In
RC snubber and active drive control are effective methods to
fact, the SiC IGBT without external snubber capacitor
solve the problem of voltage sharing and high dv/dt of SiC
achieves partially ZVS turn-off, as shown in Fig. 15. The
IGBT devices. Nevertheless, RC snubber needs tradeoff
displacement current flowing through parasitic capacitance
between Esw and snubber loss. Active gate control is complex.
(C1 and C2) reduces the collector current at the beginning of
In order to utilize these methods effectively, these strategies
turn-off. However, the current bump in phase II prevents the
are implemented in corresponding states of SiC IGBT, as
ZVS process. Therefore, the parallel snubber capacitor makes
shown in Fig. 16.
the turn-off closer to ZVS, as shown in Fig. 15 (a). During the
Firstly, for the voltage balancing control in the blocking
turn-on of ZVS, due to conductance modulation lag in the drift
state, resistors with resistance lower than blocking resistance
region, the turn-on voltage overshoot related to di/dt stress and
of SiC IGBT are paralleled with device to realize static
temperature may trigger spurious short-circuit protection, as
voltage balancing. Secondly, RC snubber is used to limit the
shown in Fig. 15 (b).
turn-off dv/dt and ensure turn-off voltage balancing. Turn-off
It is noteworthy that the energy of parasitic capacitor and
voltage sharing of two series connected SiC IGBT with RC

0885-8993 (c) 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See [Link] for more information.
Authorized licensed use limited to: University of Exeter. Downloaded on July 02,2020 at 07:51:02 UTC from IEEE Xplore. Restrictions apply.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2020.3005940, IEEE
Transactions on Power Electronics

IEEE POWER ELECTRONICS REGULAR PAPER

Filter FEC DAB-H DAB-L LV Inverter Filter

MV LV

Fig. 19 Schematic of TIPS with 15kV SiC IGBT and 1.2kV SiC
MOSFET [79].

22.7%

18.5%

15.7%
13.5%
12%

9.1%

Fig. 18 Comparison of switching loss of single-chip module and three-

2.6%
chip module under different Tj [49]. 3.1% 2.7%

snubber is shown in Fig. 17. Turn-on voltage balancing is not

necessary because the voltage difference is less than rated
Fig. 20 Loss distribution of 15kV SiC IGBT and 1.2kV SiC MOSFET
voltage. Therefore, the reduction of turn-on dv/dt can be applied in 100kVA TIPS.
achieved by AGD.
and high efficiency [79], [80]. Transformer-Less Intelligent
C. Parallel Connected SiC IGBT Power Substation (TIPS) is a non-cascade topology based on
To date, the maximum rated current of a single SiC IGBT all-SiC devices, as shown in Fig. 19. As a 13.8kV to 480V
device is 32A due to the limited chip area [45]. However, in grid interface, TIPS can realize power conversion greater than
HVDC, SST and smart grids, parallel SiC IGBT chips in a 100 kVA. The system includes LCL filter, front end converter
module are necessary to handle a higher current (more than (FEC) based on SiC IGBT, dual active bridge (DAB) stage for
100A [79]). The current imbalance and oscillation between insulating and low voltage (LV) two-level inverter based on
paralleled chips significantly reduce the current capability of SiC MOSFET.
module due to the dispersion of the characteristics of Although the three-level topology reduces the number of
fabricated SiC IGBT devices. The positive temperature devices in series, the design of three-level Neutral Point
coefficient (PCT) of Vf is preferred for paralleled chips. clamped (3L NPC) converter is the main challenge of the
However, the PCT of Vf in reported SiC IGBT is not obvious TIPS system. Firstly, the 3L NPC converter exposed to high
due to the competition between mobility decreasing and voltage, requiring additional insulation. Conventional issues,
lifetime increasing, as temperature increases. In addition, such as harmonic current, negative sequence current, pre-
reasonable internal gate resistor could compensate the charge of DC bus and imbalance of bus mid-point are still
inconsistency of SiC IGBT devices and increase the damping serious. Moreover, unlike the low voltage 3L NPC converter,
during transients, thus improve the paralleling operation. the fundamental current flowing through converter is small
In addition, the extra loss challenges the paralleled chips. [81]. Therefore, the influence of harmonic current is greater,
Switching losses of single-chip and three-chip SiC IGBT and harmonic current is more difficult to be extracted. On the
modules are compared in Fig. 18. The loss of three-chip other hand, compared with the two-level converter, the
module is much greater than three times of single-chip module number of devices is doubled, worsening the thermal
[49]. This is because when the chips are paralleled, the distribution, due to the difference between devices in terms of
parasitic capacitors of SiC IGBT are also paralleled. Therefore, characteristic, power loss and cooling conditions [82]. In
the increase of input capacitance slows down the gate voltage, contrast, compact structure is necessary for low parasitic
which results in rising and falling time of collector current inductance [83], which is harmful to heat dissipation. In the
increasing. Similar to input capacitance, increase of miller 3L NPC converter based on SiC IGBT, high frequency
capacitance and output capacitance result in a slower VCE transformer should be carefully designed to achieve better
changing. Finally, the switching loss increases exponentially trade-off between size and parasitic capacitance for
with the number of parallel chips. Therefore, additional ZVS minimizing the current ringing [84].
or RC snubber is expected to limit excessive switching losses. It is noteworthy that the efficiency of TIPS with powerful
In addition, higher rated current produces a higher voltage function and space saving is 98% at 1MVA, which is lower
overshoot, which is negligible in single-chip test. than that of conventional distribution transformer with 99%
efficiency [79]. Even if the soft switching technology is used
D. Medium Voltage Grid Interface in the DAB, its switching loss accounts for 21% of the total
Solid-state transformer gradually replaces the loss, as shown in Fig. 20 [12]. In addition, the on-state loss of
conventional distribution transformer as the interface of SiC MOSFET used in DAB and low voltage side inverters
medium-voltage grid because of its advantages of lightweight accounts for 38%. Therefore, it is necessary to further increase

0885-8993 (c) 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See [Link] for more information.
Authorized licensed use limited to: University of Exeter. Downloaded on July 02,2020 at 07:51:02 UTC from IEEE Xplore. Restrictions apply.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2020.3005940, IEEE
Transactions on Power Electronics

IEEE POWER ELECTRONICS REGULAR PAPER

the efficiency of TIPS system by reasonably reducing the REFERENCES

driving resistance of SiC IGBT or increasing the number of
[1] M. Saadeh, H. A. Mantooth, J. C. Balda, E. Santi, J. L. Hudgins, S.-H.
paralleled SiC MOSFET. In addition, for 1MVA TIPS, higher
Ryu, and A. Agarwal, “A unified silicon/silicon carbide IGBT model,”
current SiC IGBT module or paralleling operation is necessary in Proc. IEEE Appl. Power Electron. Conf. Expo., Feb. 2012, pp. 1728–
for current up to 100A conducting. 1733.
[2] A. Kadavelugu, K. Mainali, D. Patel, S. Madhusoodhanan, A. Tripathi,
E. Pulse Power Application K. Hatua, “Medium Voltage Power Converter Design and
Demonstration Using 15 kV SiC N-IGBTs,” in Proc. IEEE Appl. Power
In the pulsed power application, it is expected to replace Electron. Conf. Expo., Mar. 2015, pp. 1396-1403.
the high voltage gas switch with the emergence of SiC IGBT. [3] M. Rahimo, A. Kopta, S. Eicher, N. Kaminski, F. Bauer, U. Schlapbach
In [13], 24 kV SiC IGBT has been applied to 4-stage Marx and S. Linder, “Extending the boundary limits of high voltage IGBTs
and diodes to above 8 kV,” in Proc. IEEE Inte. Symp. on Power Semi.
generator, which achieves the highest output voltage
Devices & ICs, Jun. 2002, pp. 41-44.
capability of 32 kV and current capability of 20A. It delivers [4] G. Wang, A. Q. Huang, F. Wang, X. Song, X. Ni, S.-H. Ryu, et al,
0.66 MW to the load in 10 μs. It is noteworthy that at the end “Static and dynamic performance characterization and comparison of 15
of the pulse, the last stage SiC IGBT withstands a large kV SiC MOSFET and 15 kV SiC n-IGBTs." in Proc. IEEE Int. Symp. on
Power Semicond. Devices & ICs, May. 2015, pp. 229-232.
overvoltage due to the different output impedance of the
[5] N. Ramungul, T.P. Chow, M. Ghezzo, J. Kretchmer and W. Hennessy, “A
switching loop, so the necessary voltage derating needs to be fully planarized, 6H-SiC UMOS insulated-gate bipolar transistor,” in
considered. Compared with other solid-state switches, such as Proc. Annual Device Research Conf. Digest, Jun. 1996, pp. 56-57.
SiC MOSFET, it has higher pulse current capability. In [85], [6] Q. Zhang, C. Jonas, R. Callanan, J. Sumakeris, M. Das, A. Agarwal, et al,
the peak current capability of 15 kV SiC IGBT is 6.6 times “New improvement results on 7.5 kV 4H-SiC p-IGBTs with Rdiff, on of 26
mΩ·cm2 at 25°C,” in Proc. IEEE Inte. Symp. on Power Semi. Devices &
that of 15kV SiC MOSFET. However, due to the inherent ICs, May. 2007, pp. 281-284.
bipolar characteristics of SiC IGBT, its switching time limits [7] M. Avram, G. Brezeanu1, A. Avram, O. Neagoe, M. Brezeanu, C.
its short pulse width capability, compared with SiC MOSFET. Iliescu, et al, “Contributions to development of high power SiC-IGBT,”
However, the SiC IGBT with drift thickness greater than in Proc. Inte. Semi. Conf., Oct. 2005, pp. 365-368.
[8] X. Wang and J. A. Cooper, “High-Voltage n-Channel IGBTs on Free-
200μm operating at high voltages with low duty cycles is Standing 4H-SiC Epilayers,” IEEE Trans. on Electron Devices, vol. 57,
encouraging for pulse power application [86]. no.2, pp. 511-515, Feb. 2010.
In general, the most important points have been discussed [9] E. V. Brunt1, L. Cheng, M. J. O’Loughlin, J. Richmond, V. Pala, J.
in this section. For a better utilization of SiC IGBT in circuit Palmour, et al, “27 kV, 20 A 4H-SiC n-IGBTs,” Materials Science
Forum, vol. 821-823, pp. 847-850, Jun. 2015.
design, other considerations are also critical. 1) The [10] S. Madhusoodhanan, K. Hatua, S. Bhattacharya, “Comparison study of
characteristics of SiC IGBT are dispersive due to the immature 12kV n-type SiC IGBT with 10kV SiC MOSFET and 6.5kV Si IGBT
fabrication technology. Therefore, pre-selection of SiC IGBT based on 3L-NPC VSC applications,” in Proc. IEEE Energy Convers.
with similar characteristics is important to achieve better Congr. Expo., Sep. 2012, pp. 310-317.
[11] A. Kadavelugu, S. Bhattacharya, S.-H. Ryu, E. V. Brunt, D. Grider, A.
voltage sharing, current sharing and thermal distribution; 2) Agarwal, S. Leslie, “Characterization of 15 kV SiC n-IGBT and its
The distributed parasitic capacitance of the system should application considerations for high power converters,” in Proc. IEEE
keep low due to the high dv/dt. Reasonable active or passive Energy Convers. Congr. Expo., Sep. 2013, pp. 2528-2535.
methods for controlling dv/dt are also effective ways. 3) The [12] A. Tripathi, K. Mainali, S. Madhusoodhanan, D. Patel, A. Kadavelugu
and S. Hazra, “MVDC microgrids enabled by 15kV SiC IGBT based
cooling conditions should be improved by forced air cooling flexible three phase dual active bridge isolated DC-DC converter,” in
or water cooling to reach a low Tj, due to the trade-off between Proc. IEEE Energy Convers. Congr. Expo., Sep. 2015, pp. 5708-5715.
insulation and power dissipation. 4) The type of SiC IGBT [13] S. Madhusoodhanan, A. Tripathi, D. Patel, K. Mainali, A. Kadavelugu,
could be selected for specific applications, such as n-channel S. Hazra, et al, “Solid State Transformer and MV grid tie applications
enabled by 15 kV SiC IGBTs and 10 kV SiC MOSFETs based
SiC IGBT for boost converter or low side of half bridge, multilevel converters,” IEEE Trans. on Indus. Appl., vol. 51, no. 4, pp.
conversely p-channel SiC IGBT for buck converter or high 3343-3360, July-Aug. 2015.
side of half bridge. [14] M. Hinojosa, H. O'Brien, E. Van Brunt, A. Ogunniyi, C. Scozzie,
“Solid-state Marx generator with 24 KV 4H-SIC IGBTs,” in Proc. IEEE
Pulsed Power Conf., May-Jun. 2015.
VI CONCLUSION [15] K. Sheng, B. W. Williams, and S. J. Finney, “A review of IGBT
models,” IEEE Trans. on Power Electron., vol. 15, no. 6, Nov.2000.
As the highest voltage switch, SiC IGBT has attracted [16] A. R. Hefner and D. L. Blackburn, “An analytical model for the steady-
wide attention in high voltage transmission, smart grid and state and transient characteristics of the power insulated-gate bipolar
transistor,” Solid State Electronics, vol. 31, no.10, pp. 1513-1532, Oct.
pulse power fields. The SiC IGBTs are still not
1988.
commercialized due to the intrinsic defects and immature [17] M. Miyake, M. Ueno, U. Feldmann, H. J. Mattausch, “Modeling of SiC
fabrication process. The reported SiC IGBT devices show IGBT Turn-Off Behavior Valid for Over 5-kV Circuit Simulation,”
excellent static and dynamic performance, along with IEEE Trans. Electron. Devices, vol. 60, no. 2, pp. 622-629, Feb, 2013.
considerable dv/dt during hard switching, which challenges [18] M. Ueno, M. Miyake and M. M. Mattausch, “Specific Features of SiC-
IGBT with 13kV Switching,” in Proc. International Symposium on
the power conversion system. Although many solutions are Power Semiconductor Devices and ICs, Jun. 2012, pp. 261-264.
proposed for SiC IGBT, it shows great differences from [19] K. Matsuura, Y. Tanimoto, A. Saito, Y. Miyaoku, T. Mizoguchi, M. M.
silicon IGBT and silicon carbide MOSFET. The preliminary -Mattausch, et al, “Analysis and compact modeling of temperature-
attempts in high voltage fields indicate that the promising SiC dependent switching in SiC IGBT circuits,” Solid State Electron., vol.
153, no. 00381101, pp. 59-66, Mar. 2019.
IGBT would have the prospect to replace Si devices in the [20] A. Nejadpak, A. Nejadpak, and O. A. Mohammed, “A physics-based,
future. dynamic electro-thermal model of silicon carbide power IGBT devices,”

0885-8993 (c) 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See [Link] for more information.
Authorized licensed use limited to: University of Exeter. Downloaded on July 02,2020 at 07:51:02 UTC from IEEE Xplore. Restrictions apply.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2020.3005940, IEEE
Transactions on Power Electronics

IEEE POWER ELECTRONICS REGULAR PAPER

in Proc. IEEE Appl. Power Electron. Conf. Expo., Mar. 2013, pp. 201– simulation,” Materials Science Forum, vol. 897, pp. 571-574, 2017.
206. [42] S. Kotamraju and P. Vudumula, “Improved device characteristics
[21] T. H. Duong, A. R. Hefner, J. M. Ortiz-Rodríguez, S.-H. Ryu, E. Van obtained using a novel high-K dielectric stack for 4H-SiC n-IGBT:
Brunt, L. Cheng, et al, “Physics-based electro-thermal Saber model and HfO2-SiO2-AlN,” Materials Science Forum, vol. 963, pp. 647-650, Jan.
parameter extraction for high-voltage SiC buffer-layer IGBTs," in Proc. 2019.
Energy Convers. Congr. Expo., Sep. 2014, pp. 460-467. [43] A. Mihaila, V. K. Sundaramoorthy, R. Minamisawa, L. Knoll, H. Bartolf,
[22] M.-C. Lee, G. Wang, and A. Q. Huang, “4H-SiC 15kV n-IGBT physics- E. Bianda, et al, “A novel edge termination for high voltage SiC
based sub-circuit model implemented in Simulink/Matlab,” in Proc. devices,” in Proc. IEEE Int. Symp. on Power Semicond. Devices & ICs,
IEEE Appl. Power Electron. Conf. Expo., Mar. 2015, pp. 1051–1057. Jun. 2016, pp. 223-226.
[23] [Link], R. M. Kotecha, A. Rashid, M. M. Hossain, T. Vrotsos, A. M. [44] T. Deguchi, T. Mizushima, H. Fujisawa, K. Takenaka, Y. Yonezawa, K.
Francis, et al, “A datasheet driven unified si/sic compact igbt model for Fukuda, and H. Okumura, “Static and dynamic performance evaluation
n-channel and p-channel devices,” IEEE Trans. on Power Electron., vol. of > 13 kV SiC p-channel IGBTs at high temperatures,” in Proc. IEEE
34, no. 9, pp. 8329-8341, Dec. 2018. Int. Symp. on Power Semicond. Devices & ICs, Jun. 2014, pp. 261-264.
[24] S. Ji, K. Kojima, Y. Yishida, H. Tsuchida, S. Yoshida and H. Okumura, [45] S.-H. Ryu, C. Capell, L. Cheng, C. Jonas, A. Gupta, M. Donofrio, et al,
“Low resistivity, thick heavily Al-doped 4H-SiC epilayers grown by “High performance, ultra high voltage 4H-SiC IGBTs,” in Proc. Energy
hot-wall chemical vapor deposition,” Materials Science Forum, vol. Convers. Congr. Expo., Sep. 2012, pp. 3603-3608.
740-742, pp 181-185, Jan. 2013 [46] S. Ryu1, C. Capell, C. Jonas, Y. Lemma, M. O’Loughlin, J. Clayton, et
[25] S. Chowdhury, C. Hitchcock, Z. Stum, R. Dahal, I. B. Bhat, and T. P. al, “Ultra high voltage IGBTs in 4H-SiC,” in Proc. IEEE Wide Bandgap
Chow, “4H-SiC n-channel Insulated Gate Bipolar Transistors on (0001) Power Devices & Appl., Oct. 2013, pp. 36-39.
and (000-1) oriented free-standing n-substrates,” IEEE Electron Device [47] M. Hinojosa, A. Ogunniyi, H. O'Brien, S. B. Bayne and C. Scozzie,
Letters, vol. 37, no.3, pp. 317-320. Mar. 2016. “Evaluation of high-voltage, high-power 4H-SiC insulated-gate bipolar
[26] Y. Yonezawa, T. Mizushima, K. Takenaka, H. Fujisawa, T. Kato, S. transistors,” in Proc. IEEE Int. Power Modulator & High Voltage Conf.,
Harada, et al, “Low Vf and highly reliable 16 kV ultrahigh voltage SiC Jun. 2015, pp. 101-104.
flip-type n-channel implantation and epitaxial IGBT,” in Proc. IEEE [48] E. V. Brunt, L. Cheng, M. O’Loughlin, C. Capell, C. Jonas, K. Lam, et
Inte. Electron Devices Meeting, Dec. 2013, pp. 6.6.1-6.6.4. al, “22 kV, 1 cm2, 4H-SiC n-IGBTs with improved conductivity
[27] S. Ji, K. Kojima, Y. Ishida, H. Yamaguchi, S. Saito, T. Kato, et al, modulation,” in Proc. IEEE Int. Symp. on Power Semicond. Devices &
“Characterization of the defect evolution in thick heavily Al-doped 4H- ICs, Jun. 2014, pp. 358-361.
SiC epilayers,” Materials Science Forum, vol. 778-780, pp. 151-155, [49] T. Mizushima, K. Takenaka, H. Fujisawa, T. Kato, S. Harada, Y. Tanaka,
Feb. 2014. et al, “Dynamic characteristics of large current capacity module using
[28] R. Dahal, S. Chowdhury, C. Hitchcock, T. P. Chow and I. B. Bhat, 16-kV ultrahigh voltage SiC flip-type n-channel IE-IGBT,” in Proc.
“Fabrication of thick free-standing lightly-doped n-type 4H-SiC wafers,” IEEE Int. Symp. on Power Semicond. Devices & ICs, Jun. 2014, pp. 277-
Materials Science Forum, vol. 897, pp. 379-382, May. 2017. 280.
[29] T. Miyazawa, S. Ji, K. Kojima, Y. Ishida, K. Nakayama, A. Tanaka, et al, [50] T. Yang, S. Bai, and R. Huang, “Simulation and optimization of field
“Epitaxial growth of thick multi-layer 4H-SiC for the fabrication of very limiting rings for ultrahigh voltage 4H-SiC IGBT,” in Proc. IEEE China
high-Voltage C-face n-channel IGBT,” Materials Science Forum, vol. Int. Forum on Solid State Lighting: Int. Forum on Wide Bandgap
778-780, pp. 135-138, Feb. 2014. Semicond. China, Nov. 2016, pp. 19-22.
[30] P. Wu, M. Yoganathan, I. Zwieback, Y. Chen and M. Dudley, [51] B. Tan, X. Tian, J. Lu, Y. Bai, X. Deng, C. Li and X. Liu, “Design and
“Characterization of dislocations and micropipes in 4H n+ SiC optimization of four-region multistep field limiting rings for 10kV 4H-
substrates,” Materials Science Forum, vol. 600-603, pp. 333-336, Sep. SiC IGBTs,” in Proc. IEEE Int. Conf. on Solid-State and Integr. Circuit
2008. Tech., Oct. 2018.
[31] C.J. Liu, T.H. Peng, B. Wang, Y. Guo, Y. F. Lou, N. Zhao, et al, [52] K. Koseki, Y. Yonezawa, T. Mizushima, S. Matsunaga, Y. Iizuka and H.
“Progress in single crystal growth of wide bandgap semiconductor SiC,” Yamaguchi, “Dynamic behavior of a medium-voltage N-channel SiC-
Materials Science Forum, vol. 954, pp. 35-45, May. 2019. IGBT with ultra-fast switching performance of 300 kV/μs,” in Proc.
[32] SiC MOSFET. [Link] IEEE Int. Conf. on Electrical Machines & Systems, Nov. 2016.
[33] T. Miyazawa and H. Tsuchida, “Point defect reduction and carrier [53] A. Kadavelugu, S. Bhattacharya, S.-H. Ryu, E. V. Brunt, D. Grider, S.
lifetime improvement of Si- and C-face 4H-SiC epilayers,” Journal of Leslie, “Experimental switching frequency limits of 15 kV SiC N-IGBT
Applied Physics, vol. 113, no. 8, pp. 1-6. module,” in Proc. IEEE Power Electronics Conf., May. 2014, pp. 3726-
[34] P.B. Klein, “Long carrier lifetimes in n-type 4H-SiC epilayers,” 3733.
Materials Science Forum, vol. 717-720, pp. 279-284, May. 2012. [54] K. G. Menon and E. M. S. Narayanan, “Numerical Evaluation of 10-kV
[35] B. Kallinger, P. Berwian, J. Friedrich, M. Rommel, M. Azizi, C. Hecht Clustered Insulated Gate Bipolar Transistor in 4H-SiC,” IEEE Trans. on
and P. Friedrichs, “Influence of epilayer thickness and structural defects Electron Devices, vol. 60, no. 1, pp. 366-373, Jan. 2013.
on the minority carrier lifetime in 4H-SiC,” Materials Science Forum, [55] J. Wei, M. Zhang, H. Jiang, S. To, S. Kim, J.-Y. Kim and K. J. Chen,
vol. 740-742, pp. 633-636, Jan. 2013. “SiC trench IGBT with diode-clamped p-shield for oxide protection and
[36] Y. Cui, J. Li, K. Zhou, X. Zhang and G. Sun, “Influence of extended enhanced conductivity modulation,” in Proc. IEEE Int. Symp. on Power
defects and oval shaped facet on the minority carrier lifetime distribution Semicond. Devices and ICs, May. 2018, pp. 411-414.
in as-grown 4H-SiC epilayers,” Diamond and Related Materials, vol. 92, [56] Y. Liu, Y. Wang, Y. Hao, C. Yu, and F. Cao, “4H-SiC trench IGBT with
pp. 25-31. Feb. 2019. back-side n-p-n collector for low turn-off loss,” IEEE Trans. on Electron
[37] S. I. Maximenko, J. A. Freitas, Y. N. Picard, P. B. Klein, R. L. Myers- Devices, vol. 64, no. 2, pp. 488-493, Feb. 2017.
Ward, et al, “CL/EBIC-SEM techniques for evaluation of impact of [57] Y. Liu, Y. Wang , Y. Hao, J. Fang, C. Shan, and F. Cao, “A low turn-off
crystallographic defects on carrier lifetime in 4H-SiC epitaxial layers,” loss 4H-SiC trench IGBT with schottky contact in the collector side,”
Materials Science Forum, vol. 645-648, pp. 211-214, Jan. 2010. IEEE Trans. on Electron Devices, vol. 64, no. 11, pp. 1-6, Nov. 2017.
[38] T. Zheleva, A. Lelis, G. Duscher, F. Liu, I. Levin, and M. Das, [58] M. C. Lee, X. Huang, A. Huang and E. V. Brunt, “An analytical
“Transition layers at the SiO2/SiC interface,” Applied Physics Letters, investigation of the effect of varied buffer layer designs on the turn-off
vol. 93, no. 2, pp. 1-3, July. 2008. speed for 4H-SiC IGBTs,” in Proc. IEEE Workshop on Wide Bandgap
[39] S. T. Pantelides, “The role of extended defects in device degradation,” Power Devices and Appl., Oct. 2013, pp. 44-47.
Phys. Status Solidi., vol. 210, no. 1, pp. 175-180, Oct. 2012. [59] W. Sung, A. Q. Huang, B. J. Baliga, “A novel 4H-SiC IGBT structure
[40] D. Navarro, I. Pesic, Y. Morikawa, Y. Furui, and M. Miura-Mattausch, with improved trade-off between short circuit capability and on-state
“Investigation of 4H-SiC insulated-gate bipolar transistor turn-off voltage drop,” in Proc. IEEE Int. Symp. on Power Semicond. Devices
performance for achieving low power loss,” Japanese Journal of ICs, Jun. 2010, pp. 217-220.
Applied Physics, vol. 55, no. 4s, pp. 1-6. Mar. 2016. [60] H. Kang and F. Udrea, “High pillar doping concentration for SiC
[41] V. Naidu, S. Kotamraju, “Improved switching characteristics obtained superjunction IGBTs,” in Proc. Int. Semicond. Conf., Oct. 2018, pp.
by using high-k dielectric layers in 4H-SiC IGBT: physics-based 151-154.

0885-8993 (c) 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See [Link] for more information.
Authorized licensed use limited to: University of Exeter. Downloaded on July 02,2020 at 07:51:02 UTC from IEEE Xplore. Restrictions apply.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2020.3005940, IEEE
Transactions on Power Electronics

IEEE POWER ELECTRONICS REGULAR PAPER

[61] Z. Shen, F. Zhang, L. Tian, G. Yan, Z. Wen, W. Zhao, et al, “Optimized [80] S. Madhusoodhanan, A. Tripathi, K. Mainali, A. Kadavelugu, D. Patel
P-emitter doping for switching-off loss of superjunction 4H-SiC and S. Bhattacharya, “Three-phase 4.16 kV medium voltage grid tied
IGBTs,” in Proc. China Int. Forum on Solid State Lighting: Int. Forum AC-DC converter based on 15 kV/40 A SiC IGBTs,” in Proc. IEEE
on Wide Bandgap Semicond. China, Nov. 2016, pp. 1-5. Energy Convers. Congr. Expo., Sep. 2015, pp. 6675-6682.
[62] N. Watanabe1, H. Yoshimoto1, Y. Mori1and A. Shima, “Improvement [81] S. Madhusoodhanan, S. Bhattacharya, and K. Hatua, “Control technique
of switching characteristics in 6.5-kV SiC IGBT with novel drift layer for 15 kV SiC IGBT based active front end converter of a 13.8 kV grid
structure,” Materials Science Forum, vol. 963, pp. 660-665, Feb. 2019. tied 100 kVA transformerless intelligent power substation,” in Proc.
[63] S. Chowdhury, C. Hitchcock, Z. Stum, R. P. Dahal, I. B. Bhat and T. P. IEEE Energy Convers. Congr. Expo., Sep. 2013, pp. 4697-4704.
Chow, “Operating Principles, Design Considerations, and Experimental [82] G. K. Moghaddam, R. D. Gould, S. Madhusoodhanan, K. Hatua, S.
Characteristics of High-Voltage 4H-SiC Bidirectional IGBTs,” IEEE Bhattacharya, S. Leslie, et al, “Thermal design considerations for 12kV
Transaction on Electron Devices, vol. 64, no. 3, pp. 888-896, Mar. 2017. SiC n-IGBT based 3L NPC converter,” in Proc. IEEE Energy Convers.
[64] J. W. Palmour, L. Cheng, V. Pala, E. V. Brunt, D. J. Lichtenwalner, G-Y Congr. Expo., Sep. 2012, pp. 2180-2186.
Wang, et al, “Silicon Carbide Power MOSFETs: Breakthrough [83] D. C. Patel, A. Kadavelugu, S. Madhusoodhanan, S. Bhattacharya, K.
Performance from 900 V up to 15 kV,” in Proc. IEEE Int. Symp. on Hatua, S. Leslie, et al, “15 kV SiC IGBT based three-phase three-level
Power Semicond. Devices & ICs, Jun. 2014, pp. 79-82. modular-leg power converter,” in Proc. IEEE Energy Convers. Congr.
[65] K. Vechalapu, S. Bhattacharya, E. V. Brunt, S.-H. Ryu, D. Grider and J. Expo., Sep. 2013, pp. 3291-3298.
W. Palmour, “Comparative evaluation of 15 kV SiC MOSFET and 15 [84] A. K. Tripathi, K. Mainali, D. C. Patel, A. Kadavelugu, S. Hazra, S.
kV SiC IGBT for medium voltage converter under same dv/dt Bhattacharya, and K. Hatua, “Design considerations of a 15-kV SiC
conditions,” in Proc. IEEE Energy Convers. Congr. Expo., Sep. 2015, IGBT-based medium-voltage high-frequency isolated DC–DC
pp. 927-934. converter,” Trans. on Indus. Appl., vol. 51, no. 4, July/Aug. 2015.
[66] A. Kadavelugu, S. Bhattcharya, B. J. Baliga, S.-H. Ryu, D. Grider and J. [85] E. A. Hirsch, J. A. Schrock, S. B. Bayne, H. O’Brien, A. Ogunniyi,
Palmour, “Zero voltage switching characterization of 12 kV SiC N- “Narrow pulse evaluation of 15 KV SiC MOSFETs and IGBTs,” in Proc.
IGBTs,” in Proc. IEEE Int. Symp. on Power Semicond. Devices & ICs, IEEE Int. Conf. on Pulsed Power, Jun. 2017.
Jun. 2014, pp. 350-353. [86] M. Hinojosa and A. Ogunniyi, “High voltage, step-down converter
[67] A. Kadavelugu, S.h Bhattacharya, S. Leslie, S.-H. Ryu, D. Grider, K. design using 20-kV silicon carbide IGBTs,” in Proc. IEEE Int. Power
Hatua, “Understanding dv/dt of 15 kV SiC N-IGBT and its control using Modulator & High Voltage Conf., Jul. 2016, pp. 101-104.
active gate driver,” in Proc. IEEE Energy Convers. Congr. Expo., Sep.
2014, pp. 2213-2220.
[68] S. Ryu, C. Capell, E. V. Brunt, C. Jonas, M. O’Loughlin, J. Clayton, et
al, “Ultra high voltage MOS controlled 4H-SiC power switching
devices,” Sem. Science and Tech., vol. 30, no. 8, pp. 1-7, July, 2015.
[69] A. Kadavelugu and S. Bhattacharya, “Design Considerations and
Development of Gate Driver for 15 kV SiC IGBT,” in Proc. IEEE Appl. Lubin Han (S’19) received the B.S.
Power Electron. Conf. Expo., Mar. 2014, pp. 1494-1501. degree in Electrical Engineering and
[70] K. Mainali, S. Madhusoodhanan, A. Tripathi, K. Vechalapu, A. De and
S. Bhattacharya, “Design and evaluation of isolated gate driver power Automation from China University of
supply for medium voltage converter applications,” in Proc. IEEE Appl. Petroleum, Qingdao, China, in 2017. He
Power Electron. Conf. Expo., Mar. 2016, pp. 1632–1639. is currently working towards the Ph.D.
[71] J. Thoma, S. Kolb, C. Salzmann and D. Kranzer, “Characterization of degree in Electrical Engineering at
high-voltage-SiC-devices with 15 kV blocking voltage,” in Proc. Inte.
Power Electron. and Motion Control Conf., Sep. 2016, pp. 946-951. Huazhong University of Science and
[72] A. Tripathi, K. Mainali, S. Madhusoodhanan, A. Yadav, K. Vechalapu Technology.
and S. Bhattacharya, “A MV intelligent gate driver for 15kV SiC IGBT His research interests include modeling,
and 10kV SiC MOSFET,” in Proc. IEEE Appl. Power Electron. Conf.
packaging and reliability for power semiconductor devices.
Expo., Mar. 2016, pp. 2076–2082.
[73] A. Anurag, S. Acharya, Y. Prabowo, G. Gohil, and S. Bhattacharya,
“Design considerations and development of an innovative gate driver for
medium-voltage power devices with high dv/dt,” Trans. on Power
Electron., vol. 34, no. 6, pp. 5256-5267. Jun. 2019.
[74] A. Tripathi, S. Madhusoodhanan, K. Mainali, K. Vechalapu, S.
Bhattacharya, “Series injection enabled full ZVS light load operation of Lin Liang (M’12-SM’14) received the
a 15kV SiC IGBT based dual active half bridge converter.” in Proc. B.S and Ph.D. degrees in electronic
IEEE Appl. Power Electron. Conf. Expo., Mar. 2016, pp. 886-892. science and technology from Huazhong
[75] A. Tripathi, K. Mainali, S. Madhusoodhanan, D. Patel, A. Kadavelugu
and S. Hazra, “MVDC microgrids enabled by 15kV SiC IGBT based University of Science and Technology,
flexible three phase dual active bridge isolated DC-DC converter,” in Wuhan, China, in 2003 and 2008
Proc. IEEE Energy Convers. Congr. Expo., Sep. 2015, pp. 5708-5715. respectively.
[76] K. Vechalapu, A. Tripathi, K. Mainali, B. J. Baliga and S. Bhattacharya, She has been the Professor with the School
“Soft switching characterization of 15 kV SiC n-IGBT and performance
evaluation for high power converter applications,” in Proc. IEEE Energy of Electrical and Electronic Engineering,
Convers. Congr. Expo., Sep. 2015, pp. 4151-4158. Huazhong University of Science and Technology since 2019.
[77] K. Vechalapu, A. Negi, S. Bhattacharya. “Comparative performance She has been the Visiting Professor with FREEDM System
evaluation of series connected 15 kV SiC IGBT devices and 15 kV SiC Center, North Carolina State University, Raleigh, NC, USA,
MOSFET devices for MV power conversion systems,” in Proc. IEEE
Energy Convers. Congr. Expo., Sep. 2017. from 2014 to 2015. She received the Delta Young Scholar
[78] K. Vechalapu, A. Negi, S. Bhattacharya. “Performance evaluation of Award from the Delta Environmental and Educational
series connected 15 kV SiC IGBT devices for MV power conversion Foundation in 2019. Her research spans modeling,
systems,” in Proc. IEEE Energy Convers. Congr. Expo., Sep. 2017.
optimization, process, packaging, reliability and application
[79] K. Hatua, S. Dutta, A. Tripathi, S. Baek, G. Karimi, S. Bhattacharya,
“Transformer less intelligent power substation design with 15kV SiC of power semiconductor devices.
IGBT for grid interconnection,” in Proc. IEEE Energy Convers. Congr.
Expo., Sep. 2011, pp. 4225-4232.

0885-8993 (c) 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See [Link] for more information.
Authorized licensed use limited to: University of Exeter. Downloaded on July 02,2020 at 07:51:02 UTC from IEEE Xplore. Restrictions apply.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2020.3005940, IEEE
Transactions on Power Electronics

IEEE POWER ELECTRONICS REGULAR PAPER

Yong Kang (M’14-SM’19) received the

B.E., M.E, and Ph.D. degrees from the
School of Electrical and Electronic
Engineering, Huazhong University of
Science and Technology (HUST), in 1988,
1991, and 1994, respectively.
In 1994, he joined the School of Electrical
and Electronic Engineering, HUST and
became a Professor in 1998. He is the
author or coauthor of more than 200 technical papers
published in journals and conferences. His research interests
include power electronic converter, ac drivers,
electromagnetic compatibility, and renewable energy
generation system.
Dr. Kang received the Delta Scholar Award from the Delta
Environmental and Educational Foundation in 2005, and
supported by the Program for New Century Excellent Talents
in University from the Chinese Ministry of Education in 2004.
Currently, he serves as the vice chairman of the China UPS
standard committee.

Yufeng Qiu (M’18) is the Chief Science

& Technology Consultant of Global
Energy Interconnection Research
Institute co., Ltd. His research interests
include the R&D of FACT, HVDC. He
is a laureate of National Science and
Technology Prize. Currently, he is
focusing on the development of
customized power electric devices for
power system, multi-physical field joint simulation, silicon
based IGBT & SiC based IGBT packages. As the projects
leader, he has successively implemented R&D work on
several key projects from National Key Technologies R&D
Program. He is leading a project of National Key
Technologies R&D Program and devoting to the R&D of 18
kV SiC IGBT technology.

0885-8993 (c) 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See [Link] for more information.
Authorized licensed use limited to: University of Exeter. Downloaded on July 02,2020 at 07:51:02 UTC from IEEE Xplore. Restrictions apply.