Dept.

of ECE

LABORATORY MANUAL

ELECTRONIC CIRCUIT ANALYSIS LAB

II [Link] II-SEM (R22)
[Link] ECE

EC408PC: ELECTRONIC CIRCUIT ANALYSIS LABORATORY

[Link]. II Year II Sem.

Note:

 Experiments marked with * has to be designed, simulated and verified in hardware.

 Minimum of 9 experiments to be done in hardware.

Hardware Testing in Laboratory:

1. Design transformer coupled class A power amplifier and draw the input and output waveforms find its
efficiency

2. Design class B power amplifier and draw the input and output waveforms, find 2nd order and above
harmonics.

3. Prove that the complementary symmetry pushpull amplifier eliminate cross over distortion.

4. Design class C power amplifier and draw the input and output waveforms

5. Design a single tuned amplifier and determine the Q of its tuned circuit practically.

6. Design a Bistable Multivibrator and analyze the effect of commutating capacitors and draw the wave
forms at base and collector of transistors.

7. Design an Astable Multivibrator and draw the wave forms at base and collector of transistors.

8. Design a Monostable Multivibrator and draw the input and output waveforms

9. Draw the response of Schmitt trigger for gain of greater than and less than one.

10. Design a Bootstrap sweep circuit using BJT and draw its output time base waveform

11. Design a Miller sweep circuit using BJT and draw its output time base waveform.

12. Design a constant current sweep generator and draw input and output waveforms

13. Design unidirectional and bidirectional sampling gates

14. Prove practically Schmitt Trigger generates square wave

15. Frequency division with sweep circuit

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[Link] A POWER AMPLIFIER

AIM: To design and test the class A power amplifier
APPARATUS:
1. Class A power amplifier trainer kit

2. Function Generator

3. CRO

4. BNC Probes and connecting wires

CIRCUIT DIAGRAM:

THEORY:
The amplifier is said to be class A power amplifier if the q point and the input signal are selected such that the
output signal is obtained for a full input cycle. For this class the position of q point is approximately y at the
midpoint of the load line. For all the values of input signal the transistor remains in the active region and never
entire into the cutoff or saturation region. The collector current flows for 3600 (life cycle) of the input signal in
other words the angle of the collector current flow is 3600 the class a amplifiers or furthers classified as directly
coupled and transformer coupled and transformer coupled amplifiers in directly coupled type .The load is directly
connected in the collector circuit while in the transformer coupled type, the load is coupled to the collector using
the transformer.

Advantages:

1. Distortion analysis is very important

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2. It amplifies audio frequency signals faithfully hence they are called as audio amplifiers

Disadvantages:

1. H parameter analysis is not applicable

2. Due to large power handling the transistor is used power transistor which is large in size and having
large power rating.

PROCEDURE:
1. Switch ON Class –A power amplifier trainer

2. Set Vs (say 250 to 300 mV), at 10 KHz using signal generator.

3. Connect milli ammeter to the ammeter terminals

4. By keeping the input voltage constant, vary the frequency from 0 to 1MHz in regular steps .

5. Note down the corresponding output voltage from CRO

6. Calculate the DC input power using the formula Pdc= VccIc

7. Calculate the AC output power using the formula Pac = V 2/8R

O L
8. Calculate the efficiency η = Pac /Pdc

9. Plot the graph between Gain (db) and frequency.

10. Calculate bandwidth from the graph.

PRECAUTIONS:
1. Check connections before switching ON power supply

2. Don’t apply over voltage

3. When you are not using the equipment switch them OFF.

4. Handle all equipment carefully.

CALCULATIONS:
Input power: Pdc= VccIc =

Outpower: Pac = VPP2/8RL =

η = Efficiency=output power/input power*100 = Pac /Pdc*100

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EXPECTED GRAPH:

I/P:

O/P:

RESULT: Gain and frequency as observed of Class A power amplifier.

η = Efficiency=output power/input power*100 = Pac /Pdc*100 =

VIVA QUESTIONS:
[Link] which criteria based the power amplifiers are classified?

[Link] is the operating point of class-A power ampliier?

3. what is meant by efficiency?

4. howmuch efficiency will b obtained in classs-A power amplifier?

5. what are the applications of power amplifier?

[Link] B POWER AMPLIFIER

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AIM: Design class B power amplifier and draw the input and output waveforms, find 2nd order and above
harmonics.

APPARATUS:

EQUIPMENT REQUIRED:

Power supply 0-30V- 1 No.

CRO 20MHz - 1 No.

Digital multimeter - 1 No.

Signal generator 1Hz - 1MHz - 1 No.

COMPONENTS:

Resistors : 2.2KΩ - 2 Nos.

100Ω - 2 Nos.

1KΩ - 1 No

Transistors CL100- 1No , CK100 -1NO

THEORY:

An amplifying system consists of several stages in cascade. The input and the intermediate stages
amplify small signal excitations to a value large enough to drive the final device .The out put stage
feeds the final device .The output stage feeds a transducer such as a CRO,loudspeaker or servomotor.
Thus the final stage must be capable of delivering a large voltage or current or appreciable amount of
power. This requires an amplifier which is referred as a power amplifier

In class B complimentary symmetry class _B amplifier one n-p-n and p-n-p is used. Hence the circuit
is called class-B complimentary symmetry amplifier. This circuit ifis transformer less circuit .But
with common emitter configuration it becomes power transfer without output impedance for
maximum power transfer without an output transformers. Hence the matched pair of complementary
transistors are used in common collector configuration This is because in common collector
configuration has lowest output impedance and hence the impedance matching is possible.

CIRCUIT DIAGRAM:
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PROCEDURE:

1. Conncet the circuit s per the circuit diagram

2. Apply 4v p-p with 1KHZ frequency using function generator

[Link] the output in CRO .

[Link] the cross over distortion in output.(outputVp-p)

[Link] the collector connection and put ammeter.

6. Note the Idc value in the ammeter.

7. Using Pdc and Pac formulas find the efficiency.

OBSERVATION:

Pac=Vm2/2R

Pdc=Vcc*Idc

EFFICIENCY: η =Pac/Pdc*100=
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Harmonics are integer multiples of a fundamental frequency.

If the fundamental frequency is 5kHz:

1st harmonic 1 x 5kHz

2nd harmonic 2 x 5kHz

3rd harmonic 3 x 5kHz

harmonic 4 x 5kHz

etc.

Note that the 1st and 3rd harmonics are called odd harmonics and the 2nd and 4th are called even
harmonics
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Second order harmonic=(A2/A1)*100

MODEL GRAPHS: I/P WAVEFORM

O/P WAVEFORM
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Vivavoice:

1. In classB power amplifiers why crossover distortion will be occurred?

[Link] are he different methods to eliminate distortion?

3..howmuch efficiency will b obtained in classs-B power amplifier?

[Link] is the location of operating point in class-B power amplifier?

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3. CLASS B COMPLEMENTARY SYMMETRY PUSH PULL

POWER AMPLIFIER
AIM: Prove that the complementary symmetry push pull amplifier eliminate cross over distortion.

APPARATUS REQUIRED:

Power supply 0-30V- 1 No.

CRO 20MHz - 1 No.

Digital multimeter - 1 No.

Signal generator 1Hz - 1MHz - 1 No.

COMPONNTS REQUIRED:

Resistors 10KΩ - 1N0

1KΩ - 1NO

220Ω -1NO

Capacitors 0.47uf -1NO

22uf - 2NO TRANSFORMER -2NO

THEORY:

An amplifying system consists of several stages in cascade. The input and the intermediate stages
amplify small signal excitations to a value large enough to drive the final device .The out put stage
feeds the final device .The output stage feeds a transducer such as a CRO,loudspeaker or
servomotor. Thus the final stage must be capable of delivering a large voltage or current or
appreciable amount of power. This requires an amplifier which is referred as a power amplifier

In class B complimentary symmetry class _B amplifier one n-p-n and p-n-p is used. Hence the
circuit is called class-B complimentary symmetry amplifier. This circuit ifis transformer less
circuit .But with common emitter configuration it becomes power transfer without output
impedance for maximum power transfer without an output transformers. Hence the matched pair of
complementary transistors are used in common collector configuration This is because in common
collector configuration has lowest output impedance and hence the impedance matching is possible.
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Crossover Distortion

If the transistors Q1 and Q2 do not turn on and off at exactly the same time, then there is a gap in the

output voltage.

CIRCUIT DIAGRAM:
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PROCEDURE:

1. Conncet the circuit s per the circuit diagram

2. Apply 4v p-p with 1KHZ frequency using function generator

[Link] the output in CRO.

[Link] the cross over distortion in output.(outputVp-p)

[Link] the collector connection and put ammeter.

6. Note the Idc value in the ammeter.

7. Using Pdc and Pac formulas find the efficiency.

OBSERVATION:

VO = VCC = RL =

EFFICIENCY: η= Pac/PDC

= Vmax II /4 x VCC

Vm = V pp/2

MODEL GRAPHS:

Input waveform

Output Waveform
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RESULT: The complementary symmetry push pull amplifier eliminate cross over distortion by providing
biasing to the driver transformer.

EFFICIENCY: η=
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4. SINGLE TUNED AMPLIFIER

AIM: Design a single tuned amplifier and determine the Q of its tuned circuit practically

CIRCUIT DIAGRAM & MODEL GRAPH:

APPARATUS:

S. No Name Range / Value Quantity

1 Transistor BC107 1

2 Resistors 1KΩ ,10KΩ , 22 KΩ, 1.8KΩ, 47KΩ Each 1

3 Capacitors 10µF, 0.33µF, 22µF 1

4 Inductor 1mH 1

5. Function 1MHz 1
generator
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6. CRO 30MHz 1

7. BNC Probes - 2

8. Connecting Wires - Required

THEORY

It is usually required to use a number of tuned amplifier stages in cascade in order to obtain large overall
gain. These cascade tuned amplifiers may be put into the following three categories:

1. Single tuned amplifiers.

2. Double tuned amplifiers.

3. Stagger-tuned amplifiers.

Single tuned amplifiers use one parallel tuned circuit as the load impedance in each stage and all these
tuned circuits in different stages are tuned to the same [Link] tuned amplifier uses two
inductively coupled tuned circuits per stage, both the tuned circuits being tuned to the same
[Link] tuned amplifier uses a number of single tuned stages in cascade, the successive tuned
circuits being tuned to slightly different frequencies.

Single tuned amplifiers may again be put into following two categories:

a) Capacitance coupled single tuned amplifiers and

b) Transformer coupled or inductively coupled single tuned amplifiers

RESONANT FREQUENCY:

Depending upon the frequency of the source voltage Vs, the circuits may behave either as inductive or
capacitive. However, at a particular frequency when the inductive reactance Xl equals the capacitive
reactance Xc, then the circuit behaves as a purely resistive circuit. This phenomenon is called resonance:
and the corresponding frequency is called resonant frequency. The resonant frequency (fr) can be found by
equating the two reactance values.

PROCEDURE:

1. Connect the AC signal source from function generator (above AF range) to input of the trainer kit.

2. Keep the input voltage constant , vary the frequency in regular steps and down the corresponding
output voltage

3. Calculate the resonant frequency.

4. Plot the graph: gain (db) Vs frequency

5. Calculate the bandwidth and Q factor

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PRECAUTIONS:

1. Check connections before switching ON power supply

2. Don’t apply over voltage

3. When you are not using the equipment switch them OFF.

4. Handle all equipment carefully

TABULAR FORM:

Frequency Output Voltage ( V0) Gain in dB

(Hz) (mV)
[Link] = 20 log ( V0 / Vi )

1 50

2 100

3 300

4 500

5 700

6 1K

7 3K

8 5K

9 7K

10 10K

11 30K

12 50K

13 70K

14 100K

15 300K

16 500K

17 700K

18 1MHz
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RESULT:

1. Quality factor Q=

2. Resonant Frequency Fr=

3. Bandwidth=

VIVA QUESTIONS:

1. What is a tuned amplifier?

2. Distinguish between a single tuned and a double tuned amplifier?

3. What is meant by stagger tuned amplifier?

4. Is the tuned amplifier a narrow band or a wide band amplifier?

5. Define selectivity?

6. What parameters shall be selected for a highly tuned amplifier?

7. Where the tuned amplifiers are used?

8. What type of tuning is used in the IF stage of a Radio receiver ?

9. What is the relation between the band width of a double tuned and a stagger tuned amplifier?

[Link] to improve the band width of a tuned amplifier?

[Link] is meant by critical tuning?

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5. BISTABLE MULTIVIBRATOR
Aim:

Design a Bistable Multivibrator and analyze the effect of commutating capacitors and draw the
wave forms at base and collector of transistors.

Apparatus:

[Link] Name of the component Specification Quantity

1. Transistor BC107b 2

2. Diode IN4007 3

3. Resistors 1kΩ 5

10kΩ 2

100kΩ 2

4. Capacitors 0.33uf 3

0.001uf 2

5. RPS 1

6. Bread board 1

7. Connecting wires ---

8. CRO 1

Theory:

A Bistable circuit is one which can exist indefinitely in either of two stable states and which can be
induced to make an abrupt transition from one state to the other by means of external excitation. The
Bistable circuit is also called as Bistable multivibrator, Eccles jordon circuit, Trigger circuit, Scale-of-2
toggle circuit, Flip- Flop & Binary.

A bistable multivibratior is used in a many digital operations such as counting and the storing of binary
information. It is also used in the generation and processing of pulse-type waveform. They can be used to
control digital circuits and as frequency dividers.

There are two outputs available which are complements of one another. i.e. when one output is high the
other is low and vice versa.
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CIRCUIT DIAGRAM:
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Design:

Rc = [Vcc – Vce (sat) ] / Ic(max)

Rc = (15 – 0.2) / 15mA ≈ 1KΩ

Choose RC = 1KΩ, VB1 = (-Vbb R1 / R1+ R2) / (Vce (sat) R2 / R1+R2)

-1.2 = (-15x10+0.2R2)/(10+ R2); R2 = 100kΩ

fmax = (R1+ R2)/2CR1R2

= (10+100k)/(2x0.3x10-6x10kx100k)

= 55 kHz

EXPECTED WAVEFORMS:
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Procedure:

1.
Check the square wave output from CRO to conform the voltage is 0.5Vpp.
2.
Connect the circuit as shown in the circuit diagram
3.
Apply sine wave as input at the transistor Q1 across collector and emitter
terminals
4.
Check whether the output waveform at the transistor Q2 is square wave or not
5.
Measure the amplitude of output wave form and check whether the loop gain is
less than 1
6.
Similarly apply the input at transistor Q2
7.
Repeat the steps 3 and 4 and note down the amplitude and output waveform

Result:

Bistable Multivibrator circuit is designed and output waveforms are observed

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[Link] MULTIVIBRATOR

AIM: Design an Astable Multivibrator and draw the wave forms at base and collector of
transistors.

Apparatus:

S. Name of the component Specification Qua

No ntity

1. Resistors 1kΩ 2

72kΩ 2

724kΩ 2

7.2kΩ 2

2. Transistor BC 107 2

3. Bread board 1

4. Connecting wires 1
Bunch

5. CRO 1

6. Dual Regulated Power supply (0-30) V DC 1

Circuit diagram:-
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Theory:

The astable circuit has two quasi-stable states. Without external triggering signal the
astable configuration will make successive transitions from one quasi-stable state to the other.
The astable circuit is an oscillator. It is also called as free running multivibrator and is used to
generate “Square Wave”. Since it does not require triggering signal, fast switching is possible.

Design:

The period T is given by

T = T1 + T2 = 0.69 (R1C1 + R2C2)

For symmetrical circuit with R1 = R2 = R & C1 = C2 = C T = 1.38 RC

10-3 = 1.38 x 10-9 x R

R = 72.4KΩ (When c=1nf)

R= (10 -3) /1.38X10X10 -9

=72.4 K Ω (where c=10nf) R=7.24 K Ω (where =100nf)

Let Vcc=15V, hfe=51(for BC 107)

Vbe sat=0.7V, Vce sat=0.3 V Choose Ic max=10 mA

RC = (VCC – VCESat) / ICmaX

= (15 – 0.3) / (10 x 10-3) = 1.47KΩ

∴ RC =1KΩ

Procedure:

1. Connect the circuit as shown in figure.

2. Apply the supply voltage Vcc =15V

3. Calculate the pulse width (T) of the Astable O/P with the selected values of R & C
on the CRO. See that CRO is in DC mode.

4. Connect the CRO channel-1 to the collector and base of the Transistor Q1&Q2..

5. Measure the pulse width and verify with the theoretical value.

6. Obtain waveforms at different points like VB1, VB2, VC1 & VC2.
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EXPECTED WAVEFORMS:

Result : An Astable Multivibrator is designed, the waveforms are observed and

verified the results theoretically.

Questions:
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1. Is it possible to change time period of the waveform without changing R & C? Support your
answer?

2. Collector waveforms are observed with rounded edges. Explain?

3. Explain charging and discharging of capacitors in an Astable Multivibrator?

4. How can an Astable multivibrator be used as VCO?

5. Why do you get overshoots in the Base waveforms?

6. What are the applications of Astable Multivibrator?

[Link] MULTIVIBRATOR
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Aim : Design a Monostable Multivibrator and draw the input and output waveforms

Apparatus:

[Link] Name of the component Specification Quantity

1. Resistors 1kΩ 2

72kΩ 2

724kΩ 2

7.2kΩ 2

2. Transistor BC 107 2

3. Bread board 1

4. Connecting wires 1 Bunch

5. CRO 1

6. Dual Regulated Power supply (0-30) V DC 1

Circuit Diagram:-

Theory:
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The monostable circuit has one permanently stable and one quasi-stable state. In the monostable
configuration, a triggering signal is required to induce a transition from the stable state to the
quasi-stable state. The circuit remains in its quasi-stable for a time equal to RC time constant of
the circuit. It returns from the quasi-stable state to its stable state without any external triggering
pulse. It is also called as one-shot a single cycle, a single step circuit or a univibrator

Design:-

To design a monostable multivibrator for the Pulse width of 0.03mSec.

Choose ICmax = 15mA, VCC = 15V, VBB = 15V, R1 = 10KΩ.

T = RC ln 2 T = 0.69 RC

Choose C = 10nF

0.3 x 10-3Sec = 0.69 x R x 10 x 10-9

R = 43.47 KΩ.

Rc= (Vcc- Vce sat)/ Ic max. RC = (15 – 0.2) / 15mA = 1kΩ

For more margin Given, VB1= -1.185

VB1= -VBB R1 /( R1+ R2 ) + Vce sat R2/( R1+ R2)

-1.18 = ( -15 R1+ 0.2 R2) / (R1+ R2)

Given R1=10 KΩ

We will R2= 100K

Procedure:

1. Wire the circuit as shown in the circuit diagram.

2. Calculate the pulse width (T) of the Monostable O/P with the selected values of R & C on
the CRO. See that CRO is in DC mode.

3. Select the triggering pulse such that the frequency is less than 1/TApply the

triggering input to the circuit and to the CRO‟s channel 1 .

4. Connect the CRO channei-2 to the collector and base of the TransisterQ1&Q2..

5. Adjust the triggering pulse frequency to get stable pulse on the CRO and now measure
the pulse width and verify with the theoretical value.
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6. Obtain waveforms at different points like VB1, VB2, VC1 & VC2.

7. Repeat the experiment for different combinations of R & C (C = 1nf, 100nf). Calculate R
for same value of T = 0.3 mSec.

Expected wave forms:

Result :
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A collector coupled Monostable Multivinbrator is designed, the waveforms are

Observed and verified the results theoretically.

8. SCHMITT TRIGGER
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AIM: Draw the response of Schmitt trigger for gain of greater than and less than one.

APPARATUS:

1. Schmitt Trigger trainer kit

2. Function Generator
3. C.R.O
4. Connecting wires.
THEORY:

In digital circuits fast waveforms are required i.e, the circuit remain in the active region for a
very short time (of the order of nano seconds) to eliminate the effects of noise or undesired
parasitic oscillations causing malfunctions of the circuit. Also if the rise time of the input
waveform is long, it requires a large coupling capacitor. Therefore circuits which can convert a
slow changing waveform (long rise time) in to a fast changing waveform (small rise time) are
required. The circuit which performs this operation is known as “Schmitt Trigger”. In Schmitt
trigger circuit, the output is in one of the two levels namely low or high. When the input voltage
is rising above the UTP (upper threshold point) i.e. V1, the output changes to high level.
Similarly when a falling output voltage passes through a voltage V2 known as lower threshold
point (LTP), the output changes to low. The level of the output changes V1 is always greater
than [Link] differences of these two voltages is known as “Hysteresis”.

CIRCUIT DIAGRAM:

PROCEDURE:
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1. Switch ON the trainer

2. Connect the circuit as shown in Fig.

3. With Vi = 0V, measure the output voltage.

4. Slowly increase the input voltage from 0V to maximum and observe the output for the
transition.

5. Obtain the voltage at which the low to HIGH transition is occurred and this is the UTP
and now measure the input voltage.

6. Now, slowly decrease the input voltage and observe for the HIGH to LOW transition at
the output, the input voltage at this point is called the LTP.

7. Apply a sine wave input to the circuit.

8. Observe the input and output waveforms on CRO.

9. Vary the input frequency and comment on the results obtained.

10. Repeat the experiment with different R2.

11. Verify the result theoretically.

OBSERVATIONS:

[Link] OUTPUT TRANSISTOR TRANSISTOR

VOLTAGES IS ON IS OFF

VC1

VC2

CALCULATIONS:

DC AC
UTP = 2.9V UTP = 3V
LTP = 1.8V LTP = 2V
VH = UTP – LTP VH = UTP – LTP
EXPECTED WAVEFORMS:
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RESULTS:

Schmitt trigger circuit with the given values is designed and the response is observed.

PRECAUTIONS:

1. Loose and wrong connections should be avoided.

2. Parallax error should be avoided.

APPLICATIONS:

1. Comparator circuit

QUESTIONS:

1. What are the applications of Schmitt Trigger?

2. Define hysteresis action?

3. Why Schmitt Trigger is called a squaring circuit?

4. What is UTP & LTP?

[Link] SWEEP GENERATOR

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AIM: To study Bootstrap sweep generator

APPARATUS:
1. Bootstrap trainer kit
2. CRO and CRO probes
3. RPS
4. FG
5. Connecting Wires
THEORY:

The input to Q1 is the gating waveform. Before the application of the gating waveform, at t = 0,
transistor Q1 is in saturation. The voltage across the capacitor C and at the base of Q2 is
VCE(sat). To ensure Q1 to be in saturation for t = 0, it is necessary that its current be at least
equal to ICE / hFE so that Rb < hfeR. With the application of the gating waveform at t = 0, Q1 is
driven OFF. The current IC1 now flow into C and assuming units gain in the emitter follower V0
. When the sweep starts, the diode is reverse biased, as already explained above, the current
through R is supplied by C1. The current VCC / R through C and R now flows from base to
emitter of [Link] the output V0 reaches the voltage VCC in a time TS / Tg, then from above we
have TS = RC.

CIRCUIT DIAGRAM:

PROCEDURE:
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1. Connect the circuit diagram as shown in the figure .(1) Apply +15V (Vcc) & -15V(-
VEE ) DC as power supply to the circuit.

2. Apply 1kHz symmetrical square wave signal with the help of signal generator.

3. Observe the input and output wave forms of CRO and plot the waveforms.

4. Calculate the sweep & retrace time from the CRO .

5. Clarify the values with the theoretical calculation.

OBSERVATIONS:

Rc Cs Ts

CALCULATION:

Ts = [Link]

CsVs hfe 1
) − ]
Tr = ( Vcc / [ R B Rc 1

VccTg
Whose Vs = Rc 1Cs

Tg = 1msec

EXPECTED WAVE FORMS:

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Vi

Tg

Tg

Ts

INFERENCE:

The operation of Bootstrap sweep generator is studied.

PRECAUTIONS:

1. Connections should be made carefully.

2. Loose and wrong connections should be avoided.

3. Note down the parameters carefully.

TROUBLE SHOOTING:

1. Check the supply connections.

2. Check the CRO probe.

RESULT:
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The waveforms are plotted as shown and the practical T is verified to the theoretical
value

EXTENSION:

By using IC (op-amp) we can design Bootstrap sweep generator circuit.

APPLICATIONS:

1. Constant charging current

QUESTIONS:

1. Explain the basic principle involved in Bootstrap Sweep generator?

2. Mention the type of feedback employed in Bootstrap Sweep generator?

3. Mention the characteristics of the amplifier used in Bootstrap sweep generator?

[Link] SWEEP GENARATOR

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AIM: To generate a saw tooth wave form using miller sweep circuit.

APPARATUS:-

1. Miller sweep trainer kit

2. CRO and CRO probes

3. RPS

4. FG

5. Connecting Wires

THEORY:

The miller sweep circuit or miller integrator generator is a precise and linear ramp
voltage using active devices providing required feedback, the effective time constant and supply
voltage is enhanced. Miller sweep circuit is the basic schematic of a widely used sawtooth
generator.
The amplifier acts to increase the aiming potential; thus, linearity is improved and the
output amplitude is increased. As the integral of a step function is a ramp, it is evident that this
circuit would provide a sawtooth output. The feedback can be negative voltage or current type.
The circuit of miller sweep generator is drawn below. It uses a bjt, the switch shown in the fig. Is
an ideal switch normally it is closed. The transistor is in off condition. The timing capacitor is
charged to a voltage Vcc via the resistor Rc and the switch.

CIRCUIT DIAGRAM:
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PROCEDURE:

1. Connect the circuit as shown in Fig.

2. Observe the waveforms on the CRO.

3. Observe the input and output waveforms on CRO.

4. Plot the waveforms

OBSERVATIONS:

[Link] Ts Tr

CALCULATIONS:

1. Ts=

2. Tr=

MODEL WAVEFORMS:
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INFERENCE:

The operation of miller sweep generator is studied.

PRECAUTIONS:

1. Connections should be made carefully.

2. Loose and wrong connections should be avoided.

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3. Note down the parameters carefully.

TROUBLE SHOOTING:

1. Check the supply connections.

2. Check the CRO probe.

RESULT:

The waveforms are plotted as shown and the practical Ts and Tr is verified to the
theoretical value.

The saw tooth wave form is generated by using miller Sweep circuit.

EXTENSION:

By using IC (op-amp) we can design Bootstrap sweep generator circuit.

APPLICATIONS:

1. Constant charging current

QUESTIONS:

1. Explain the basic principle involved miller sweep circuit generator?

2. Mention the type of feedback employed in miller sweep circuit generator?

3. Mention the characteristics of the amplifier used in miller sweep circuit generator?
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[Link] CURRENT SWEEP GENERATOR

AIM: To observe and to study of transistor current sweep generator.

APPARATUS:-

1. Transistor current sweep trainer kit

2. CRO and CRO probes

3. Connecting Wires

THEORY:

Ideal c constant current source has infinite source impedance. The ideal capacitor
charge and discharges. It is generates the ramp waveform. The circuit gives of a free running
ramp generator realized by a constant current source and a complementary switch. Here
capacitor c chares from the constant current source using pnp transistor and zener diode. The
sweep duration t is decided by the magnitude of constant current and vref applied to the
complementary switch.

CIRCUIT DIAGRAM:
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PROCEDURE:

1. Switch ON the trainer kit.

2. Connect 10V supply to the Vref terminals.

3. Connect the CRO terminal and observe the output by varying the capacitor.

4. Note down the waveforms.

OBSERVATIONS:

R C T=RC

CALCULATIONS:

t= t1 + t2

t1 ---rise time

t2 ---- return time

MODEL WAVEFORMS
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INFERENCE:

The operation of study transistor current sweep generator is studied.

PRECAUTIONS:

1. Connections should be made carefully.

2. Loose and wrong connections should be avoided.

3. Note down the parameters carefully.

TROUBLE SHOOTING:

1. Check the supply connections.

2. Check the CRO probe.

RESULT:

The waveforms are plotted as shown and the practical T1 and T2 value. The wave form
is generated by using transistor current sweep generator circuit

EXTENSION:

By using IC (op-amp) we can design Bootstrap sweep generator circuit.

APPLICATIONS:

1. relaxation circuits

QUESTIONS:

1. Explain the basic principle of transistor current sweep generator circuit?

2. Mention the type of feedback employed in transistor current sweep generator circuit?

3. Types of sweep generator circuit?

[Link] ECE

[Link] OF SAMPLING GATES

AIM: To Study the operation of sampling gates using method of four diode gate.

COMPONENTS REQUIRED:

1. Sampling gate trainer.

2. Function generator.

3. RO and CRO probe

4. DMM.

THEORY:

A Sampling Gate is basically a transmission circuit which allows an input signal to pass
through it during a selected interval; and blocks its passage outside the time interval. The input
signal does not suffer any distortion or attenuation during transmission, with the result that the
output waveform is an exact replica of the input signal waveform. Hence the output of a
sampling gate is an exact reproduction of the input signal during the selected interval, and is zero
otherwise. The interval of the time is selected by means of an external signal termed as Gating
Signal. The gating signal is generally a rectangular pulse of the required polarity.

CIRCUIT DIAGRAM:
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Unidirectional sampling gates

Bidirectional sampling gates

PROCEDURE:

1. Connect the circuit as shown in figure.

2. 2 Switch ON the trainer kit.3

3. Apply input signal frequency of 500Hz

4. Observe the out put wave form on CRO

EXPECTED WAVEFORM:
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INFERENCE:

The operation of sampling gates is studied.

PRECAUTIONS:

1. Connections should be made carefully.

2. Loose and wrong connections should be avoided.

3. Note down the parameters carefully.

TROUBLE SHOOTING:

1. Check the supply connections.

2. Check the CRO probe.

RESULT:

The sampling gates waveforms are generated.

EXTENSION:

By using four diodes and six diodes sampling gates circuits we can design sampling
gate circuits can be constructed using bipolar transistors, or FETs.

APPLICATIONS:

1. Multiplexers

2. Sampling scopes

3. dc or low-frequency signals

QUESTIONS:

1. What is mean by sampling gate?

2. Sampling gate is a linear gate true or false?

3. What is mean by gating signal?