21CSF05

COMPUTER ORGANIZATION AND

ARCHITECTURE
 UNIT II
ARITHMETIC UNIT
• Addition and Subtraction of Signed Numbers
• Design of Fast Adders
• Multiplication of Positive Numbers
• Signed Operand Multiplication
• Fast Multiplication
• Integer Division
• Floating Point Numbers and Operations

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ARITHMETIC UNIT
• An arithmetic-logic unit (ALU) is the part of a
computer processor (CPU) that carries out
arithmetic and logic operations
• Does the calculations
• Everything else in the computer is there to
service this unit
• Handles integers
• May handle floating point (real) numbers

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ARITHMETIC UNIT

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ARITHMETIC UNIT
• A and B are the inputs to the
ALU it is the data to be
operated on (called operands)
• R is the output, result of the
computation
• F is the code (instruction) from
the Control Unit
• D is an output status, also
known as condition code, it
indicates cases such
– as carry-in,
– carry-out,
– overflow,
– division-by-zero, etc. 5
Addition and Subtraction of Signed Numbers

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Addition and Subtraction of Signed Numbers
• The truth table for the sum and carry-out
functions for adding equally weighted bits xi and
yi in two numbers X and Y .
• The figure also shows logic expressions for these
functions, along with an example of addition of
the 4-bit unsigned numbers 7 and 6. The each
stage of the addition process must accommodate
a carry-in bit.
• We use ci to represent the carry-in to stage i,
which is the same as the carry-out from stage (i -
1).
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Addition and Subtraction of Signed Numbers

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Addition and Subtraction of Signed Numbers

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Addition and Subtraction of Signed Numbers

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Addition and Subtraction of Signed Numbers

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Design of Fast Adders
• If an n-bit ripple-carry adder is used in the addition/subtraction
circuit it may have too much delay in developing its outputs
• Carry-lookahead Logic:
• A fast adder circuit must speed up the generation of the carry
signals.
• The logic expressions for sum and carry-out of stage i are

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Design of Fast Adders

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Design of Fast Adders

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Design of Fast Adders

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Multiplication of Positive Numbers

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Multiplication of Positive Numbers

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Multiplication of Positive Numbers

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Multiplication of Positive Numbers

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Multiplication of Positive Numbers

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Signed-Operand Multiplication

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The Booth Algorithm
• The Booth algorithm generates a 2n-bit product
and treats both positive and negative
2’scomplement n-bit operands uniformly.
• To understand the basis of this algorithm,
consider a multiplication operation in which the
multiplier is positive and has a single block of 1s,
for example, 0011110.
• For convenience, we can describe the sequence
of required operations by recoding the preceding
multiplier as 0 +1000-10.

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The Booth Algorithm
The Booth algorithm
• -1 times the shifted multiplicand is selected when
moving from 0 to 1, and
• +1 times the shifted multiplicand is selected
when moving from 1 to 0, as the multiplier is
scanned from right to left.
• The Booth algorithm can also be used directly for
negative multipliers

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The Booth Algorithm
Normal and Booth multiplication schemes

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The Booth Algorithm
Normal and Booth multiplication schemes

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The Booth Algorithm
Booth recoding of a multiplier

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The Booth Algorithm
Booth multiplication with a negative multiplier

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The Booth Algorithm
Booth multiplication with a negative multiplier

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The Booth Algorithm
Booth multiplier recoding table

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The Booth Algorithm
Bit-Pair Recoding of Multipliers
• A technique called bit-pair recoding of the
multiplier results in using at most one summand
for each pair of bits in the multiplier.

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The Booth Algorithm
Bit-Pair Recoding of Multipliers

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The Booth Algorithm
Bit-Pair Recoding of Multipliers

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Integer Division
• Restoring Division

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Integer Division
• Restoring Division

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Integer Division - Restoring Division
• An n-bit positive divisor is loaded into register M and
an n-bit positive dividend is loaded into register Q at
the start of the operation
• Register A is set to 0
• After the division is complete, the n-bit quotient is in
register Q and the remainder is in register A
• The required subtractions are facilitated by using 2’s-
complement arithmetic
• The extra bit position at the left end of both A and M
accommodates the sign bit during subtractions

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Integer Division - Restoring Division
• The following algorithm performs restoring division
Do the following three steps n times:
1. Shift A and Q left one bit position
2. Subtract M from A, and place the answer back in A
3. If the sign of A is 1, set qo to 0 and add M back to A
(that is, restore A); otherwise, set qo to 1

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Integer Division - Restoring Division
• The following algorithm performs restoring division
Do the following three steps n times:
1. Shift A and Q left one bit position
2. Subtract M from A, and place the answer back in A
3. If the sign of A is 1, set qo to 0 and add M back to A
(that is, restore A); otherwise, set qo to 1

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Integer Division - Restoring Division

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Integer Division – Non Restoring Division
Stage 1: Do the following two steps n times:
1. If the sign of A is 0, shift A and Q left one bit position
and subtract M from A;
otherwise, shift A and Q left and add M to A.
2. Now, if the sign of A is 0, set q0 to 1; otherwise, set
q0to 0.

Stage 2: If the sign of A is 1, add M to A.

Stage 2 is needed to leave the proper positive
remainder in A after the n cycles of Stage 1.

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Integer Division – Non Restoring Division

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Floating-Point Numbers and Operations
•A sign for the number
•Some significant bits
•A signed scale factor exponent for an implied base of 2

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[Link]
Floating-Point Numbers and Operations

[Link]

[Link]
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Floating-Point Numbers and Operations

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Floating-Point Numbers and Operations
Add/Subtract Rule
1. Choose the number with the smaller exponent and
shift its mantissa right a number of
steps equal to the difference in exponents.
2. Set the exponent of the result equal to the larger
exponent.
3. Perform addition/subtraction on the mantissas and
determine the sign of the result.
4. Normalize the resulting value, if necessary.

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Floating-Point Numbers and Operations
Multiplication and division are somewhat easier than
addition and subtraction, in that no alignment of
mantissas is needed.
Multiply Rule
1. Add the exponents and subtract 127 to
maintain the excess-127 representation.
2. Multiply the mantissas and determine the
sign of the result.
3. Normalize the resulting value, if necessary.

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Floating-Point Numbers and Operations
Divide Rule
1. Subtract the exponents and add 127 to maintain the
excess-127 representation.
2. Divide the mantissas and determine the sign of the
result.
3. Normalize the resulting value, if necessary.

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Floating-Point Numbers and Operations
Implementing Floating-Point Operations

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