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EE 4221 Microprocessor Midterm Exam

The document is a midterm exam for a microprocessor systems course. It contains multiple choice and problem solving questions testing students' understanding of microprocessor concepts like fetch-decode-execute cycles, data movement, system clocks, memory access, and machine cycle diagrams.

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18 views2 pages

EE 4221 Microprocessor Midterm Exam

The document is a midterm exam for a microprocessor systems course. It contains multiple choice and problem solving questions testing students' understanding of microprocessor concepts like fetch-decode-execute cycles, data movement, system clocks, memory access, and machine cycle diagrams.

Uploaded by

nsbwfbgkcm
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

COURSE NO: EE 4221 MICROPROCESSOR SYSTEM

Midterm Examination
Second Semester AY 2021-2022

Name: ________________________________________________
ID No. ___________________________

Exam Duration: 2 hours

I. True or false :

INSTRUCTION: Write T if the statement is true and F if false. Right minus wrong
TOPIC-LEVEL OUTCOMES (TLO) TO BE ASSESSED: Students shall be able to demonstrate the f
Item outcomes: Questions Points
No.
TLO 5: Fetch-Decode-Execute Cycle / Electrical Characteristics
1 The design of every microcomputer starts with a CPU module 3
2 TLO 6:
The clock can be faster than theExplain
CPU Data Movement / System Clock 2
3 Cache memory is used to slow down the computer system 3
4 TLO 7: Explain Data Processing
The system clock shows the speed of the microprocessor. /Machine cycle diagrams 2
5 In a 6 layer PCB board the best TI stack up design is model 3 3
6 Machine cycle diagrams are important during the program debugging process 2
7 Speed of memory is measured by considering its timing diagram 2
8 The system clock is an electrical signal on the control bus 3
9 Many operations take multiple clock cycles to complete so the CPU often 3
performs operations at a significantly lower rate.
10 Memory access is an operation synchronized around the system clock. 3
11 The access time is specified by the clock frequency 2
12 If the memory subsystem doesn't work fast enough, the CPU will read garbage data 2

II. PROBLEM SOLVING :

INSTRUCTION: Answer the questions . Use illustrations if needed ..Use separate sheets for you answers.

Item Questions Points


No.
1 Refer to attached figure 1 and analyze the ALE signal in the timing diagram. 30
2 Refer to attached figure 2 and analyze the TW state in the machine cycle diagram. 30
FIG 1:

FIG 2:

TOTAL SCORE 90
PASSING SCORE 45

Prepared by: Reviewed by: Approved by:

Engr. Neil dela Cruz Engr. Sharon B. Ressurreccion Engr. Marc Ramde Gonzales
Faculty EE Examination Board Member EE Department Head

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