Lecture 01 – (8/9/18) Page 1-1

LECTURE 1 – CMOS PHASE LOCKED LOOPS

OVERVIEW
Objective
Understand the principles and applications of phase locked loops using integrated circuit
technology with emphasis on CMOS technology.
Topics
• Background
• Fundamentals
Organization Systems Types of PLLs PLL
Perspective and PLL Measurements Applications and Examples

Circuits PLL
Perspective Components

Technology CMOS
Perspective Technology

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Suggested References
Phase Locked Loops:
1. F.M Gardner, Phaselock Techniques, 2nd ed., John-Wiley & Sons, Inc., NY, 1979.
2. B. Razavi (ed.), Monolithic Phase-Locked Loops and Clock Recovery Circuits, IEEE
Press, 1997.
3. R.E. Best, Phase-Locked Loops: Design, Simulation, and Applications, 4th edition,
McGraw-Hill, 1999
4. A. Hajimiri and T.H. Lee, The Design of Low Noise Oscillators, Kluwer Academic
Publishers, 1999.
5. B. Razavi, Design of ICs for Optical Communications, McGraw-Hill, 2003.
6. T.H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits, 2nd edition,
Cambridge University Press, NY, 2004.
7. C. Quemada, et al, Design Methodology for RF CMOS Phase Locked Loops, Artech
House, Norwood, MA, 2009.

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OPERATING PRINCIPLES OF PLLs

What is a PLL?
A PLL contains three basic components as shown below:
Input Error
Signal Phase Signal Loop
Frequency Filter
Detector
Oscillator
Output Contolling
Voltage Voltage
Signal
Controlled
Oscillator 140418-01

• Phase/frequency detector determines the difference between the phase and/or frequency
of two signals
• The loop filter removes the high-frequencies from the voltage-controlled oscillator
(VCO) controlling voltage
• The VCO produces and output frequency controlled by a voltage

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More Detailed PLL Block Diagram

vin(t) – The input or reference signal

in – The radian frequency of the input signal
vosc(t) – The output of the VCO
osc – The radian frequency of the VCO
vd(t) – The detector output voltage = Kde
e – Phase error between vin(t) and vout(t) = in - osc
vc(t) – The output voltage of the loop filter and the control voltage for the VCO

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The Phase Detector and VCO in more Detail

Phase Detector:
vd(t) = Kde = Kd(in - osc)
where
Kd is the gain of the phase detector
in = phase shift of the input voltage
osc = phase shift of the VCO output voltage
The units of Kd are volts/radians or simply volts assuming all phase shifts are in
radians and not degrees.

Voltage Controlled Oscillator:

osc = o + Ko vc(t)
where Ko is the VCO gain and o is the free-running radian frequency.
The units of Ko are rads/sec·V or simply (sec·V)-1 assuming all phase shifts are in
radians and not degrees.

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PLL Operation
Locked Operation:
• The loop is locked when the frequency of the VCO is exactly equal to the average
frequency of the input signal.
• The PLL has the inherent ability to suppress noise superimposed on its input signal.
• To maintain the control voltage needed for locked conditions, it is generally necessary
for the output of the phase/frequency detector to be nonzero.

Unlocked Operation:
• The VCO runs at a frequency called the free running frequency, o, which corresponds
to zero control voltage.
• The capture process is the means by which the loop goes from unlocked, free-running
state to that of the locked state.

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Transient Response of the PLL

Assume the input frequency is increased vin(t)

by an amount .
1.) in increases by  at to.
vosc(t) t
2.) The input signal leads the VCO and vd
begins to increase.
3.) After a delay due to the loop filter, the
VCO increases osc. t

4.) As osc increases, the phase error vd(t) Instantaneous values of vd

reduces.
5.) Depending on the loop filter, the final t
win
phase error will be reduced to zero or
wo Dw
to a finite value.
t
wosc

wo Dw

to t
140420-06

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CLASSIFICATION OF PLL TYPES

Types of PLLs

PLL Type Phase Detector Loop Filter Controlled Oscillator

Linear PLL (LPLL) Analog multiplier RC passive or active Voltage
Digital PLL (DPLL) Digital detector RC passive or active Voltage
All digital PLL Digital detector Digital filter Digitally controlled
(ADPLL)
Software PLL Software multiplier Software filter Software oscillator
(SPLL)

The digital PLL (DPLL) has been the mainstay of most PLLs and is called the “classical”
digital PLL.

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The Linear PLL (LPLL)

Input Error
Signal Signal Analog
Analog
Loop
Multiplier
Filter
Oscillator
Output Controlling
Voltage Voltage
Signal
Controlled
Oscillator 140418-04

• Uses a analog multiplier for the PDF

• Loop filter is active or passive analog
• VCO is analog

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The Digital PLL (DPLL)

Input
Signal Error Controlling
Signal Analog
Digital Voltage
Loop
Detector
Filter
Oscillator
Output
¸N Signal Voltage
Counter Controlled
(optional) Oscillator 140418-05

• Phase detector is digital

• Loop filter is passive of active analog
• VCO is analog
• Called the “Classical Digital PLL”

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The All-Digital PLL (ADPLL)

Input Digital
Signal Error
Digital Signal Digital Loop
Detector Filter

Oscillator Controlling
Output Digital Signal
Digitally
Signal
Controlled
Oscillator

Fixed
Oscillator
(Clock) 140418-06

• Phase detector is digital

• Loop filter is digital
• VCO is digital
• Compatible with modern CMOS technology

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The Software PLL (SPLL)

Input Output
Signal Analog- Software Digital- Signal
Digital PLL Analog
Converter Converter

Clock
140418-07

• Phase detector is implemented in software

• Loop filter is implemented in software
• Oscillator is implemented in software driven by an external clock
• Requires analog to digital conversion at the input and digital to analog conversion at
the output
• Software permits reconfiguring of the PLL

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SYSTEMS PERSPECTIVE OF LINEAR PHASE LOCK LOOPS (LPLLs)

Introduction
Objective:
Understand the operating principles and classification of LPLLs.
Organization:

Systems Types of PLLs PLL

Perspective and PLL Measurements Applications and Examples

Circuits PLL
Perspective Components

Technology CMOS
Perspective Technology

140418-08

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Outline
• LPLL Blocks
• Locked State
• Order of the LPLL System
• The Acquisition Process - Unlocked State
• Noise in the LPLL
• LPLL System Design
• Simulation of LPLLs

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LPLL BLOCKS
Building Blocks of the LPLL
v1(t) w1
Phase
vd(t) Low Pass
w2 Detector
Filter
(Multiplier)

v2(t) Voltage vf(t)

Controlled
Oscillator 140418-09

v1(t) = Input signal, generally sinusoidal

v2(t) = VCO output signal, may be sinusoidal or square wave
vd(t) = Phase detector output signal
vf(t) = Loop filter output signal and controlling signal to the VCO
1 = Frequency of the input signal
2 = Frequency of the VCO

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Loop Filters
In the PLL, there are many high frequencies including noise that must be removed by
the use of a low pass filter in order to achieve optimum performance.
Types of Loop Filters:
1.) Passive lag filter (lag-lead)
1 + s2
F(s) = where 1 = R1C and 2 = R2C
1 + s(1 + 2)
|F(jw)| dB
R1
0dB
+ + -20 dB/decade
R2
Vd Vf
C t2
- - t1+t2 dB
1 1 log10(w)
140419-01 t1+t2 t2

Pole is at 1/(1+2) and the zero at 1/2.

• Since the pole is smaller than the zero, the filter is lag-lead
• Passive filters should have no amplitude nonlinearity
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Loop Filters - Continued

2.) Active Lag filter
1 + s2 C1
F(s) = Ka where 1 = R1C1, 2 = R2C2 and Ka = - C
1 + s1 2

• Easier to make lead-lag

• Can have gain (not necessarily desirable)
• Limited by the linearity and noise of the op amp

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Loop Filters - Continued

3.) Active Proportional-Integral (PI) Filter
1 + s2
F(s) = where 1 = R1C and 2 = R2C
s1

• Has large open loop gain at low frequencies  Large hold range
• Limited by the linearity and noise of the op amp
• Gain limits at the op amp open loop gain
Stability:
To keep the loop stable, it is important to pick the loop filter so that it does not
introduce more than a 90° phase shift in the loop.

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Phase Signals
It is important to remember that frequency and phase are related as
d
dt =  →  =  ·dt

Transfer functions:
V2(s)
H(s) = V (s)
1
where V2(s) and V1(s) are the Laplace transforms of v2(t) and v1(t).

To examine phase signals, let us assume that,

v1(t) = V10 sin[1t + 1(t)] and v2(t) = V20 sin[2t + 2(t)]
For phase signals, the information is carried only in (t).

Next, we consider some simple phase signals that are used to excite a PLL.

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Phase Signals – Continued v1(t)

1.) A step phase shift which is an example of phase
modulation. t
1(t) =  u(t)
q1(t)

DF
t
140419-04

2.) A step frequency change assuming that 1(t) = o v1(t)

for t < 0. We may express v1(t) as,
v1(t) = V10 sin[ot +  ·t] t

= V10 sin[ot + 1(t)] w1(t)

 1(t) =  ·t Dw
t
(the phase becomes a ramp signal)
q1(t)

Dw
t
140419-05

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Phase Signals – Continued

3.) Frequency ramp
v1(t)
 (t) =  + · ·t
1 o

where · is the rate of change of the angular t

frequency.
t  w1(t)
  
 v1(t) = V10 sin (o +· )d
wo .
0  Slope = Dw
 t
· t2  q1(t)
= V10 sinot + 2 
 
· t2
1(t) =  2 t
140419-06

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SUMMARY
• LPLL blocks are:
1.) Multiplying phase detector
2.) Low pass filter
3.) Voltage controlled oscillator
• Locked state: Input frequency = VCO frequency
The phase response is low pass
The phase error response is high pass

CMOS Phase Locked Loops © P.E. Allen - 2018