Binary Adder
The Add micro-operation requires registers that can hold the data and the digital
components that can perform the arithmetic addition.
A Binary Adder is a digital circuit that performs the arithmetic sum of two binary
numbers provided with any length.
A Binary Adder is constructed using full-adder circuits connected in series, with the
output carry from one full-adder connected to the input carry of the next full-adder.
The following block diagram shows the interconnections of four full-adder circuits to
provide a 4-bit binary adder.
● The augend bits (A) and the addend bits (B) are designated by subscript numbers
from right to left, with subscript '0' denoting the low-order bit.
● The carry inputs starts from C0 to C3 connected in a chain through the full-
adders. C4 is the resultant output carry generated by the last full-adder circuit.
● The output carry from each full-adder is connected to the input carry of the next-
high-order full-adder.
● The sum output (S0 to S3) generates the required arithmetic sum of augend and
addend bits.
● The n data bits for the A and B inputs come from different source registers. For
instance, data bits for A input comes from source register R1 and data bits for B
input comes from source register R2.
● The arithmetic sum of the data inputs of A and B can be transferred to a third
register or to one of the source registers (R1 or R2).
Binary Adder-Subtractor
The Subtraction micro-operation can be done easily by taking the 2's complement of
addend bits and adding it to the augend bits.
The Arithmetic micro-operations like addition and subtraction can be combined into one
common circuit by including an exclusive-OR gate with each full adder.
The block diagram for a 4-bit adder-subtractor circuit can be represented as:
● When the mode input (M) is at a low logic, i.e. '0', the circuit acts as an adder and
when the mode input is at a high logic, i.e. '1', the circuit acts as a subtractor.
● The exclusive-OR gate connected in series receives input M and one of the inputs
B.
● When M is at a low logic, we have B⊕ 0 = B.
The full-adders receive the value of B, the input carry is 0,
and the circuit performs A plus B.
● When M is at a high logic, we have B⊕ 1 = B' and C0 = 1.
The B inputs are complemented, and a 1 is added through the
input carry. The circuit performs the operation A plus the 2's
complement of B.
Binary Incrementer
The increment micro-operation adds one binary value to the value of binary variables
stored in a register. For instance, a 4-bit register has a binary value 0110, when
incremented by one the value becomes 0111.
The increment micro-operation is best implemented by a 4-bit combinational circuit
incrementer. A 4-bit combinational circuit incrementer can be represented by the
following block diagram.
● A logic-1 is applied to one of the inputs of least significant half-adder, and the
other input is connected to the least significant bit of the number to be
incremented.
● The output carry from one half-adder is connected to one of the inputs of the
next-higher-order half-adder.
● The binary incrementer circuit receives the four bits from A0 through A3, adds
one to it, and generates the incremented output in S0 through S3.
● The output carry C4 will be 1 only after incrementing binary 1111.