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Variable-Voltage Class-E Amplifiers

This document summarizes a research paper on variable-voltage class-E power amplifiers. The paper: 1) Extends previous analyses of class-E power amplifiers to consider variable-voltage and zero-slope switching (class-Evv). Previous work only considered zero-voltage or variable-slope switching. 2) Presents analytical design equations showing the relationship between input parameters and circuit component values for the class-Evv topology. 3) Shows that class-Evv can have up to 30% lower peak switch voltage than conventional class-E, allowing for up to 200% higher output power with up to 20% lower efficiency assuming the same transistor size and reliability.

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0% found this document useful (0 votes)
9 views5 pages

Variable-Voltage Class-E Amplifiers

This document summarizes a research paper on variable-voltage class-E power amplifiers. The paper: 1) Extends previous analyses of class-E power amplifiers to consider variable-voltage and zero-slope switching (class-Evv). Previous work only considered zero-voltage or variable-slope switching. 2) Presents analytical design equations showing the relationship between input parameters and circuit component values for the class-Evv topology. 3) Shows that class-Evv can have up to 30% lower peak switch voltage than conventional class-E, allowing for up to 200% higher output power with up to 20% lower efficiency assuming the same transistor size and reliability.

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denisotis39
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© All Rights Reserved
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Variable-Voltage Class-E Power Amplifiers

Conference Paper in IEEE MTT-S International Microwave Symposium digest. IEEE MTT-S International Microwave Symposium · July 2007
DOI: 10.1109/MWSYM.2007.380284 · Source: IEEE Xplore

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Variable-Voltage Class-B Power Amplifiers
Mustafa Acar, Anne Johan Annema and Bram Nauta
IC Design Chair, University of Twente, 7500 AE Enschede, The Netherlands

Abstract- The Class-E power amplifier is widely used due paper is based on closed form expressions like those presented
to its high efficiency, resulting from switching at zero voltage in [5], [6] and [7] for Class-E PAs'. In the analysis, the finite
and zero slope of the switch voltage. In this paper, we extend dc-feed inductance (L), the switch (transistor) input/output
general analytical solutions for the Class-E power amplifier to the
ideal single-ended Variable-Voltage Class-E (Class-Evv) power capacitance (Cj,1COut) and on-resistance (Ron) (Fig. 2b) are
amplifier that switches at zero slope but not necessarily at zero all taken into account. As a result of the analysis, analytical de-
voltage. sign equations are presented showing the relation between the
The theory is verified by simulations and measurements, and input parameters and the circuit component values. It is shown
show that the peak switch voltage of Class-Evv power amplifier in this paper that Class-Evv can have up to 30% lower -

is lower (up to 30% ) than in the conventional Class-E power


amplifier; which can be utilized to obtain e.g. higher output peak switch voltage than conventional Class-E PAs; which
power (up to 200% more) with lower power-added efficiency can be used to obtain up to 200% more output power with
-

(maximum 20% less) from technologies with low-breakdown maximum 20% lower power-added efficiency2 assuming the
-

voltages. same transistor size, reliable peak voltage, matching network


Index Terms- Power amplifiers, switching amplifiers. and pre-driver.
I. INTRODUCTION
'VDD,drive
The Class-E power amplifier (PA) can achieve high effi-
ciency due to its tuned load network that shapes the switch
voltage to zero-voltage and zero-slope at the switch turn-
on moment. Many different aspects of the Class-E power
amplifier (PA) have been extensively studied in the last three
decades [1]- [7]. The reportedly "sub-optimum operation" with
nonzero-voltage or nonzero-slope switching [3] is hardly used
because of its believed inferior performance.

zero-slope switching zero-voltage switching E- antenna

tuned at o,: Cm RL
- matchir g:
Fig. 1. Sub-optimum operation classes of Class-E PA C networcV

In [1], zero-voltage and nonzero-slope switching operation


only for RF-choke Class-E PAs has been investigated and it is
( b)
3 oc=O
found that these Class-E PAs have about 10% higher tolerance 4 1VCon Coff
to switch (transistor) output capacitance than conventional RF-
2,5-'
choke Class-E PAs. In [6], it has been shown that zero-voltage
and nonzero-slope switching (denoted as variable-slope Class- v0 1.5-
Q
E, Class-Evs (Fig.1)) operation of finite dc-feed inductance
Class-E PAs allows using significantly larger switch (transis- 0.5
tor) size (up to 110% more); which can be utilized in obtaining flO) 27/o
0
7/0) 27E/o)
higher efficiency. time
(c)
time
To the best of the authors' knowledge, analyses of nonzero-
voltage and zero-slope switching Class-E PAs (denoted as Fig. 2. (a) Class-Evv PA including pre-driver and matching network (b)
Variable-Voltage Class-E, Class-Evv (Fig.1)) have not been Model of Class-Evv PA (c) Normalized switch voltage and switch current
presented in literature. This paper presents an analysis and of Class-Evv PA with turn-on voltage of oa = 2, oa = O(Class-E) and oa = 1
some discussions on Class-Evv PAs to utilize their lower
peak switch voltage feature to obtain higher output power with 'In [5] and [7] only Class-E operation and in [6] only Class-Evs operation
is considered.
reasonably high power-added efficiency from transistor tech- 2Power is lost due to discharging of the capacitor (C) to ground via the
nologies with low-breakdown voltages. The analysis in this switch at the switch turn-on moment.

1-4244-0688-9/07/$20.00 C 2007 IEEE 1095


II. ANALYSIS OF CLAsS-Evv POWER AMPLIFIER * the loaded quality factor (QL) of the series resonant
circuit (Lo and CO) is high enough in order for the output
A single ended switching PA topology and its model are given current to be sinusoidal at the switching frequency
in Fig.2a and Fig.2b respectively. An analytical solution for * the duty cycle is 50%
the model in Fig.2b to operate as a Class-E PA (e.g. switching
at zero-voltage and zero-slope) is given in [5] and [7]3. In Fig.2c shows the switching behavior and the switch definition
[6], switching with variable slope aspect was generalized used: in the time interval 0 < t < 7w/' the switch is closed
and analytical design equations for Class-Evs (e.g. switching and in 7w/w < t < 27w/w it is opened. This switching repeats
at zero-voltage and variable-slope) is given. In the current itself with a period of 27/w.
paper, the variable voltage aspect is generalized and general B. Circuit Analysis
analytical solution for Class-Evv (e.g. switching at variable- In the analysis, the current into the load, iR(t), is assumed
voltage and zero-slope) is given based on the model in Fig. 2b.
to be sinusoidal. Note that theoretically this occurs only for
If the correct input parameters and circuit element values are
infinite QL of the series resonant network consisting of Lo
chosen, the circuit in Fig. 2a properly operates as a Class-Evv
PA by satisfying the following conditions (1):
and Co. It is however a widely used assumption [1], [3], [5]
that simplifies analysis considerably: iR(t) = IR sin(wt + ()
In the time interval 0 < t < 7r/., the switch is closed. The
vc(27w/w) = aVDD and c
dt 2) 0 (1) KCL at the drain node can be written as:
dtt=2r/W
where aVDD is the voltage of vc(t) at the moment the switch (t) t'S (t) t'C (t) + t'R (t) 0 =
(2)
is closed; for conventional Class-E operation a = 0. However, Relation (2) can be arranged in the form of a linear, non-
in Class-Evv operation a is a real value4 that can be selected homogenous, second order differential equation
freely and therefore gives a degree of freedom in the design of
a Class-Evv PA. A design set K = {KL, KC, KP, Kx, KR} cd2VC> (t) 1 dvc0. VDD -VCon
(Table 1) can be derived that relates circuit element values Ron dt L
and operating conditions such as supply voltage, operating -WIR COS(t + W) = 0 (3)
frequency and output power for the switching PA in Fig.2a. which has as solution
In this section, closed form analytical expressions for each
element of the Class-Evv are derived; which enables infinitely q sin (t + () m -(q2 q) cos (t + ()
VCOn = 1 + (m2 + 1) q4-2 q2
many Class-Evv realizations, to be selected by the parameters
q = 1/( LC), m = wRo& C ( [5], [6], [7]) and a. The +VDD + eawtCo2 + ebwt Con, (4)
design parameters q and m are free variables like a and
mathematically can be assigned any positive real value5. where, a = lVl4q2m2 ~2m , b =
1
2m 4q2m2 anp
and p
Table 1: Design Set K for Class-Evv PA6
wLIR
Con, VLDI
and Con2 follow from the continuity of the
] capacitor voltage (C) and the inductor (L) current at the
KL = &f,KC = wCR,Kp =OUT,RKX VD , KR = Ron switch-on moment.
This section presents the derivation of the design set K for In the time interval w/w < t < 27w/w, the switch is opened.
Class-Evv PAs. Then, in the Class-Evv PA the current through capacitance C
is
A. Circuit Description and Assumptions
The circuit model of the Class-E PA is given in Fig.2b. For
ic(t) (VDD -vcoff (t)) dt + 1L () + tR(t) (5)
the analysis and the derivations in this paper a number of Relation (5) can be re-arranged in the form of a linear,
assumptions are made: nonhomogeneous, second-order differential equation
* the only real power loss occurs on RL, Ron, Rd, RO and
d2vc of~ (t)
Rm.
* The capacitors Cin and Cout are assumed to be linear.
LC dt2d
+vtoff (t) -VDD -LiR cos(t+~o) = 0 (6)
* the switch (transistor) operates instantly with on- which has as solution
resistance (Ron) and infinite off-resistance (t) = Vcoff Coff,
cos(qwt) + sin(qwt) + VDD
COff2
3Note that the analysis in [5] is extended in [7] by taking into account a
non-zero switch on-resistance. 1 2PVDD cos(wt + 0) (7)
4Theoretically, a < 0 is possible however, for MOS type of switches the
junction diodes get forward biased when oa < 0; decreasing efficiency. C0ff1 and C0ff2 follow from the Class-Evv conditions (1).
5Although mathematically q, m can be assigned any positive real value It follows from (4) and (7) that vcon (t) and vcf f (t) can be
and oa can be assigned any real value, as it is shown (later) that only certain expressed in terms of VDD and w hence be solved analytically
ranges results in design equations that are feasible in practice.
6LO and Co seen in Fig. 2a can be determined from the chosen loaded only if o, q, p, m and a are known. The derivation of the four
quality factor (QL = woLoIR) where w0 = LT/C. parameters o, p, q, m and a is the next step in the solution.

1096
By using the continttity of the inductor current and the ca- D. Efficiency and Output Power of Class-Evv
pacitor voltage at the sNwitch turn-off moment two independent Taking the three loss mechanisms (Pin, Pswitch, Pmatch)
equations follow that h ave the same format: shown in Fig. 2 and the existence of certain switch (transistor)
fM(p, q, X, m, a) = pai(q, m, a)X coso) + pbi(q, m,1 a) breakdown-voltage7 (VBD = z(q, m, al) VDD) into account
)the efficiency and the power on the antenna can be expressed:
+ci(q, m,
I /
al)\ = U, where
" -1-
i 1,2. CI

Drain Efficiency(r1): derived as a function of q, m and a.


The variables p and o can be solved by using fi (p, q, o, m, al)
and f2(p, q, , m, a) in terms of q, m and a as given in j(q,mT,a) 1 Pswitch = f` vcO (t) dt
the appendix. Here, q, m and a are free variables that can VDDIO VDDD f vcCj(t) dt
mathematically take any positive real value. Power-Added Efficiency(PAE): as a function of q, m and
a.
C. Design sets for Class-Evv operation
The results of the mathematical derivation of the solutions PAE(q, m, a) = Pantenna -Pin
leading to Class-Evv operation can be used to derive an easy- VDDIO
to-use design procedure for Class-Evv PAs. Using the result I clc2 Kc(q, m, a)
of the derivation for p(q, m, a) and o(q, m, a), analytical (q,mTn a1)
(1+ X Q
2d2Qd Kp(q, m, a),)
expressions for the design set K {KL, Kc, Kp, Kx, KR}
can readily be derived. where, Pantenna POUT - Pmatch, n R IPin
WCinlADd" /(2Qd), Cl Cin/Cout, C2 Coat/C, d =
KL : follows from the principle of power conservation: VDD/VDDd,-ive. Qm is the quality factor of the inductors Lm
and Lo. Qd is the quality factor of Ld (Fig. 2b).
I_R/2 + Pswitch = IOVDD (8) Power on Antenna(Pantenna): as a function of q, m and a.
In this relation, 1o is the average supply current: Kp (q, mn, a) n V2D
(L, 7T/W
Pantnnaq, m a)z (q,
mn,
a) 2 1 + vn 1±QL RL
'0 =
2 /Ron vC, (t)dt (9)
and P5,it,h is the power spent on Ron:
070
0.6
7r
0.5 q 1.2
Pswitch 2vcRn J v (t)2dt ;0.65 = 0.4 q=.6

0*0.60 =0.3 q
Substitution of (9) and p in (8) yields q=0K
6 012
0.55 =. X 0.1; -- 1
KL (q, mn, a) (PVDD q) 2mwn
wf fo (VCon (t)- VDDVCon (t))dt 00 0.4 0.8
T. Class-E
Conventional
1.2
a 1.6 2.0 0
'1a0.4 0.8
Conventional Class-E
1.2 1.6 2.0

Since p and o are all functions of q, m and a, KL is a function


of only q, m and a. Fig. 3. PAE and Pantenna using technology and design parameters in [4]
T- . AF"11"xc t1iraotxi4ILUllli
fr1n tla4
11I- Alfniti"n q allU 1k'TTL
,f "A
1VC* LU11UWS UI1CLIY UC1111111U11 UL The value of cl,
d and VBD depend on the characteristics of
K0c(q, m, a) = 1/(q2KL(q, mn, a))
Kp: can easily be found as a function of q, m and a by using
the transistor technology. For a certain operation frequency
and transistor technology, m only depends on the value of
IR = V/2PouT/R and the definition of p: c2 since m = w/3/c2 where Q = RonCo0t which depends
Kp (q, m, a) = p(q, m, a)2/(2KL (q, m, a)2) on the transistor technology. Therefore, for a given transistor
technology, impedance transformation ratio (n), Qm and Qd,
Kx: can be derived using two fundamental quadrature PAE and Pantenna both are a function of only q, m and
Fourier components of vc(t). a. In Fig. 3, PAE and Pantenna are plotted as a function
v 2( (t of a for a few values of q using the design and technology
vR
iF sin(wot+~o) dt+
v iF sin(wot+~o) dt w parameters in [4]. In [4]8, QL 3, Qd = 3, n = 3, C2 = 1,
1r = 27w 1.7. 109 rad/sec and the transistor technology is
( ) 27 0.13um CMOS (thick oxide) for which VBD 2.5 3.56 V9,
VX j VC cos(wot+co) dt+J vco (t) cos(wot+,o) dt cl 4 and RonCout 10 12; resulting in mn 0.011.
7Here VBD refers to gate-drain oxide breakdown voltage which is assumed
to be lower than junction breakdown voltages. It is also assumed that
Kx(q, m, a) V
V/yRvDDd,iver is chosen as max. reliable gate-source oxide breakdown voltage.
8Value of q is calculated as 1.2 from the circuit element values in [4] and
KR: follows from the definition of m and K0: Qm for Lm and Lo (bondwire) is assumed to be 30.
KR (q, m, a) = Kc(q, a) /m
m, 91n [4], breakdown voltage is doubled by using a cascode topology.

1097
conventional Class-E PA (a
-

I
C

I~~~~~
:1~ ~ .
In [4], an optimization procedure based upon approximations
and simulation results is given for Class-E PAs. The PAE
measurement results given in [4] (67%, for conventional Class-
E PA) is close to theoretical value given in Fig.3 (z 71%). The
difference can be attributed to the losses due to ground bonding
and dc-feed inductance; which are not taken into account in
the analytical design equations in this paper.
Fig. 3 shows the strong dependence of PAE and Pantenna
both on q and a. It can be seen in Fig. 3 that the maximum
Pantenna for Class-Evv (q = 0.6, a = 2) is 1.65 times higher
than the maximum Pant,nna for conventional Class-E PA (q =
1.2, a
have
0). Besides, for q = 0.6 Class-Evv (a = 1) can
80% more Pantenna with only 3% less PAE than
0). For the same q = 0.6,
Class-Evv (a = 2) can have 200% more Pantenna with
16% less PAE than the conventional Class-E PA (a = 0).

t6 X ZX

I
X

Fig. 4. Measurement Results for a

III. PROOF OF CONCEPT DESIGN


0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~..............

0, 1 and 2
_I
Z
i

I
Table 2: Measurement Results and Design Details
Design Details
(q,a,m,QL,n)
Frequency, VDD
POUT, PDC
R, r1
Lm, L, Vpeak
C, Cm
Class-E
(0,0,0.001,5,2.3)
5 MHz, 1.4 V
19.9, 29.4 mW
22Q, 67.7%
1.6, 12 uH, 4.2 V
0.26, 0.72 nF

IV. CONCLUSION
Class-Evv, 1 [
(0,1,0.001,5,2.3)
5 MHz, 1.6 V
30.4,48.4 mW
22Q, 62.8%
1.4, 12 uH, 4.2 V
0.42, 0.72 nF

This paper shows the analytical design equations, and the


time domain analytical solution for Class-Evv PAs, including
finite dc-feed inductance and switch input/output capacitance
and on-resistance. In comparison to conventional Class-E
PAs, Class-Evv PAs can have lower peak switch voltage;
which can be utilized to obtain high output power using low-
voltage transistor technologies (e.g. CMOS). This paper shows
(theoretically and experimentally) that Class-Evv PAs can
have up to 200% more output power than conventional
-

Class-E PAs under the same drive, load and reliable peak
voltage conditions, with only a modest PAE penalty.
REFERENCES
Class-Evvc 2
(0,2,0.001,5,2.3)
5 MHz, 1.9 V
55.2, 108.3 mW

[1] T. Suetsugu, M.K. Kazimierczuk, "Analysis of Sub-Optimum Operation


22Q, 51.0%
1.3, 12 uH, 4.2 V
0.79, 0.72 nF

of Class E Amplifier" Circuits and Systems, Proceedings of the 46th IEEE


International Midwest Symposium, vol. 3, pp: 1071- 1074, Dec. 2003.
[2] D.Y.C. Lie, et al "The limitations in applying analytic design equations
for optimal class E RF power amplifiers design" VLSI Design, Automation
and Test, IEEE 2005, pp: 161 - 164
[3] F.H. Raab, "Idealized Operation of The class E Power Amplifier," IEEE
Trans. Circuit. Syst., vol. 24. no. 12, Dec. 1977.
[4] Mazzanti, A,et al "Analysis of reliability and power efficiency in cascode
class-E PAs," IEEE, JSSC, May 2006, vol.24, pp:1222 - 1229.
[5] M. Acar, A.J. Annema, B. Nauta "Generalized Design Equations for
Class-E Power Amplifiers with Finite DC Feed Inductance" 36th Eu-
ropean Microwave Conference, September 2006, pp. 13081311.
[6] M. Acar, A.J. Annema, B. Nauta "Generalized Analytical Design Equa-
tions for Variable Slope Class-E Power Amplifiers" 13th IEEE Interna-
tional Conference on Electronics, Circuits and Systems, December 2006.
[7] M. Acar, A.J. Annema, B. Nauta "Analytical Design Equations for Class-
E Power Amplifiers with Finite DC Feed Inductance and Switch On
Resistance" IEEE, International Symposium on Circuits and Systems,
We verified the given design equations in this paper by May 2007 (accepted).
simulating the model in Fig.2b by transient and pss (periodic
APPENDIX I
steady state) simulations in Spectre (Cadence). Very good
agreement in the waveforms is observed between the simu- p and o are expressed in terms of q, m and a as follows:
lations and the theory with a discrepancy of 3%; attributed -

to the finite value of QL = 5 used in the simulations.


Measurement results at low frequency (5MHz) are given in
Table 2 and Fig. 4; which verify that Class-Evv can have
higher output power with reasonable efficiency in compari-
son to conventional Class-E. The three PAs in Table 2 are
implemented on pcb by using discrete transistor (start499)
with maximum allowed peak voltage (vc 4.5 V), ceramic
capacitors and air-core inductors. In the measurements, a
54642A Oscilloscope, 34401A DMV and a E3631A DC power
supply are used. The switch (transistor) of the Class-E PA is
directly driven with a square signal from an Agilent 33250A
signal source. Due to lack of the RF source at low frequency
Pdrive couldn't be measured but is calculated to be 3 mW. -

1098
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