LABORATORY 2 – COMMON SOURCE STAGE AMPLIFIER
LABORATORY 2
COMMON SOURCE SINGLE STAGE AMPLIFIER
OBJECTIVES
No. Objectives Requirements
1 Knowing use dc, ac and transient ▪ Using DC characteristic curve to
analysis in Cadence virtuoso tool determine the operation point for MOS
device having the large gain.
▪ Determine gain, phase margin and
bandwidth of amplifier using ac analysis
2 Knowing the advances and ▪ Explain the advances and disadvances
disadvances of resistor load, current of each topology based on waveform
load, and diode-connected load from dc, ac and transient analysis.
LAB 2 INFORMATION
▪ Consider NMOS nch_lvt device, PMOS pch_lvt device and power supply 𝒗𝒅𝒅 = 𝟏. 𝟐𝑽
EXPERIMENT 1
Objective: Consider a common source single amplifier with resistor load topology.
Requirements: Simulate dc, ac and transient analysis.
Instruction: Assemble the circuit as shown in Figure 1, setting parameters for power supplies (using
vdc source), with 𝐿𝑛 = 60𝑛𝑚, 𝑊𝑛 = 240𝑛𝑚, 𝑣𝑑𝑑 = 1.2𝑉
Figure 1. Common source stage with resistor load topology for DC and AC analysis
Check:
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LABORATORY 2 – COMMON SOURCE STAGE AMPLIFIER
❖ DC analysis:
▪ Create testbench with V2 source is vdc type (in analogLib library), set value dc voltage is
variable 𝑣𝑔𝑠.
▪ Consider 𝑅𝐷 = 10𝑘𝛺 and 𝑅𝐷 = 100𝑘𝛺, draw DC characteristic curve (using dc analysis,
sweeping variable 𝑣𝑔𝑠 from 0V to 𝑣𝑑𝑑)
▪ Determine the operation point of NMOS device having the large gain. Choose the value of
𝒗𝒈𝒔 and 𝑹𝑫 has the better gain for the next consideration.
Figure 2. DC characteristic curve with resistor load topology
▪ Question: Which value of 𝑅𝐷 has the better gain? Explain the advanced and disadvanced
with large and small 𝑅𝐷 .
❖ AC analysis:
▪ Using DC analysis testbench as Figure 1, set the value of 𝑣𝑔𝑠 equal to the value chosen in
DC analysis. Set value ac voltage of V2 source equals to 1V.
▪ Draw frequency response with ac analysis, frequency varies from 1Hz to 10GHz.
Figure 3. AC characteristic curve with resistor load topology
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LABORATORY 2 – COMMON SOURCE STAGE AMPLIFIER
▪ Determine the DC gain, phase margin, and bandwidth.
❖ TRAN analysis:
▪ Replace V2 source from vdc type to vsin type. Set the offset voltage equal to 𝒗𝒈𝒔 equal
to the value chosen in DC analysis, frequency = 1MHz, amplitude = 10mV.
Figure 4. Common source stage with resistor load topology for TRAN analysis
▪ Draw the input and output waveform with transient analysis from 0s to 20us.
Figure 5. TRAN waveform with resistor load topology
▪ Determine the gain from the amplitude of input and output waveform. Compare to result
with DC and AC analysis.
EXPERIMENT 2
Objective: Consider a common source single amplifier with diode-connected load topology.
Requirements: Simulate dc, ac and transient analysis.
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LABORATORY 2 – COMMON SOURCE STAGE AMPLIFIER
Instruction: Assemble the circuit as shown in Figure 6, setting parameters for power supplies (using
vdc source), with 𝐿𝑛 = 60𝑛𝑚, 𝐿𝑝 = 60𝑛𝑚, 𝑣𝑑𝑑 = 1.2𝑉
Figure 6. Common source stage with diode-connected load topology for DC and AC analysis
Check:
❖ DC analysis:
▪ Using DC analysis, you verify the 𝑊𝑛 and 𝑊𝑝 that the amplifier circuit has gain greater
than 2 (𝐴𝑣 > 2). The method to determine the gain of amplifier circuit in DC analysis
has proposed in Experiment 1.
Figure 7. DC characteristic curve with diode-connected load topology
❖ AC analysis:
▪ Using DC analysis testbench as Figure 6, set the value of 𝑣𝑔𝑠 equal to the value chosen in
DC analysis. Set value ac voltage of V1 source equals to 1V.
▪ Draw frequency response with ac analysis, frequency varies from 1Hz to 10GHz.
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LABORATORY 2 – COMMON SOURCE STAGE AMPLIFIER
Figure 8. AC characteristic curve with diode-connected load topology
▪ Determine the DC gain, phase margin, and bandwidth.
❖ TRAN analysis:
▪ Replace V1 source from vdc type to vsin type. Set the offset voltage equal to 𝒗𝒈𝒔 equal
to the value chosen in DC analysis, frequency = 1MHz, amplitude = 10mV.
▪ Draw the input and output waveform with transient analysis from 0s to 20us.
Figure 9. TRAN waveform with diode-connected load topology
▪ Determine the gain from the amplitude of the input and output waveform. Compare to
result with DC and AC analysis.
EXPERIMENT 3
Objective: Consider a common source single amplifier with current source load topology.
Requirements: Simulate dc, ac and transient analysis.
Instruction: Assemble the circuit as shown in Figure 10, setting parameters for power supplies
(using vdc source), with 𝐿𝑛 = 60𝑛𝑚, 𝐿𝑝 = 60𝑛𝑚, 𝑣𝑑𝑑 = 1.2𝑉
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LABORATORY 2 – COMMON SOURCE STAGE AMPLIFIER
Figure 10. Common source stage with current source load topology for DC and AC analysis
Check:
❖ DC analysis:
▪ Using DC analysis, you verify the 𝑊𝑛 , 𝑊𝑝 and 𝑣𝑏𝑖𝑎𝑠 that the amplifier circuit has gain
greater than 4 (𝐴𝑣 > 4). The method to determine gain of the amplifier circuit in DC
analysis has proposed in Experiment 1.
❖ AC analysis:
▪ Using DC analysis testbench as Figure 10, set the value of 𝑣𝑔𝑠 equal to the value chosen in
DC analysis. Set value ac voltage of V1 source equals to 1V.
▪ Draw frequency response with ac analysis, frequency varies from 1Hz to 10GHz.
▪ Determine the DC gain, phase margin, and bandwidth.
❖ TRAN analysis:
▪ Replace V1 source from vdc type to vsin type. Set the offset voltage equal to 𝒗𝒈𝒔 equal
to the value chosen in DC analysis, frequency = 1MHz, amplitude = 10mV.
▪ Draw the input and output waveform with transient analysis from 0s to 20us.
▪ Determine the gain from the amplitude of the input and output waveform. Compare to
result with DC and AC analysis.
▪ Question:
• Summary the method to increase the gain of amplifier for 3 topologies considered
in this LAB 2. What is the trade-off performance?
• Summary the advances and disadvances of 3 amplifier topologies.
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