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Understanding Flip-Flops in Digital Electronics

This document discusses sequential logic circuits and various flip-flops. It defines the difference between combinational and sequential circuits, and describes bistable devices that can remain in a state until triggered to change. Common flip-flops are then summarized, including SR latches, clocked SR latches, D latches, D flip-flops, and JK flip-flops. Preset and clear inputs are also introduced to directly set flip-flop outputs without an edge trigger event. Example integrated circuits for D and JK flip-flops are shown.

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Izzah Amani
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5 views12 pages

Understanding Flip-Flops in Digital Electronics

This document discusses sequential logic circuits and various flip-flops. It defines the difference between combinational and sequential circuits, and describes bistable devices that can remain in a state until triggered to change. Common flip-flops are then summarized, including SR latches, clocked SR latches, D latches, D flip-flops, and JK flip-flops. Preset and clear inputs are also introduced to directly set flip-flop outputs without an edge trigger event. Example integrated circuits for D and JK flip-flops are shown.

Uploaded by

Izzah Amani
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

DIGITAL ELECTRONICS

Chapter 6: Flip-Flop
1. Difference between combinational and sequential circuits
2. SR latches, clocked SR latches
3. D latch, D flip-flop
4. JK flip-flop
5. Preset and Clear

(STB24403 Digital Electronics)


Sequential Logic Circuits
Combinational Logic Circuits output depends on only the present input.

Sequential Logic Circuits output depends on


I. The present value of its input signals
II. The sequence of past inputs, input memory

Bistable devices which the output will remain until other input trigger signal is
applied to cause the output change.

(STB24403 Digital Electronics)


Sequential Logic Circuits
Three main categories:
1. Event/clock driven – asynchronous circuits that change state immediately when
enabled.
2. Pulse driven – which is a combination of the two that responds to triggering
pulses.

(STB24403 Digital Electronics)


SRLatch

Inputs Outputs Comments


𝑹 𝑺 𝑸 𝑸
0 0 NC NC No change, remain in present state
0 1 1 0 Latch SET
1 0 0 1 Latch RESET
1 1 0 0 Invalid

(STB24403 Digital Electronics)


SRLatch

Inputs Outputs Comments


𝑺 𝑹 𝑸 𝑸
0 0 1 1 Invalid
0 1 1 0 Latch SET
1 0 0 1 Latch RESET
1 1 NC NC No change, remain in present state

(STB24403 Digital Electronics)


SR Latch with Enable
Gated SR Latch

Combination of latch and


steering gates

The output state changes


based on the enable input.
Main inputs Latch Outputs Comments
inputs
Latch wont change until EN is
𝑬 𝑺 𝑹 𝑺 𝑹 𝑸 𝑸
HIGH.
0 X X 1 1 NC NC No change
1 0 0 1 1 NC NC No change
When EN is HIGH, the output
1 0 1 1 0 0 1 Reset
change is controlled by the
1 1 0 0 1 1 0 Set
main SR inputs.
1 1 1 0 0 1 1 Invalid condition

(STB24403 Digital Electronics)


SR Flip-flop
Instead of using
ENABLE input like
in gated latch, it
uses CLOCK input.

𝑺 𝑹 𝑪𝑳𝑲 𝑸 𝑸
X X NC NC NC
0 0 ↑ NC NC
0 1 ↑ 0 1
1 0 ↑ 1 0
1 1 ↑ NA NA

(STB24403 Digital Electronics)


JK Flip-flop
Operates similar to RS flip-flop, but it have a toggle operation where it changes the
output state (SET↔RESET)

𝑱 𝑲 𝑪𝑳𝑲 𝑸 𝑸
X X NC NC NC
0 0 ↑ NC NC
0 1 ↑ 0 1
1 0 ↑ 1 0
1 1 ↑ TGL TGL

(STB24403 Digital Electronics)


D Flip-flop
Operates similar to RS flip-flop, but it dont have the NO CHANGE and
INVALID case.

𝑫 𝑪𝑳𝑲 𝑸 𝑸
X NC NC NC
0 ↑ 0 1
1 ↑ 1 0

(STB24403 Digital Electronics)


Preset and Clear
Normally, flip-flop output can only be changed during the edge-trigger event
How to change flip-flop output without depending on the edge-trigger event?
By using Preset (𝑃𝑅𝐸) and Clear (𝐶𝐿𝑅) to set the output to 1 and 0

(STB24403 Digital Electronics)


74HC74 – Dual D Flip-Flop

(STB24403 Digital Electronics)


74HC76 – Dual JK Flip-Flop

(STB24403 Digital Electronics)

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