Memory " 6.
43
6.5 VIRTUAL MEMORY
In most computers, the physical main. memory is not as large as the address
space available. When a program does not completely fit into the main memory, a
part of the program is stored on aecondary storage devices such as magnetic disks.
In modem computers, the oprating system moyes programs and data
automatically between the main memory and secondary storage. Techniques that
automatically move program and data blocks into the physical main memory when
they are required for execution are called virtual memory techniques.
6.5.1 Virtual memory Basics
The binary addresses that the processor issues for either instructions or data
are called virtual or logical addresses. Theses addresses are translated into
physical addresses. If a virtual address refers to apart of the program or data space
that is currently in the physical memory, then the contents are accessed from main
memory immediately. On the other hand, if the reference address is not in the main
'memory, its contents must be brought into a suitable location in main memory
before they can be used.
Figure 6.12 shows a typical organization that implements virtual memory.
Here, a special hardware called Memory Management Unit (MMU), translates
virtual addresses into physical addresses. When the desired data are in main
memory, they are fetched through cache mechanism. If the data are not in the main
memory, the MMUcauses the operating system to bring he data into the memory
from the disk. Transfer of data between the disk and the main memory is
performed using Direct Memory Access (DMA).
6.44
" Computer Architecture
Processor
Virtual address
Data MMU
Physical address
Cache
Data
Physical address
Main Memory
DMA Transfer
Disk Storage
Figure 6.12 Virtual memory organization
6.5.2 Address Translation
Avirtual memory address translation method based on the concept of fixed
nglh pages is shown in figure 6.13. Each virtual address generated by the
processor consists of two fields:
bits)
Virtual page number (higher order
Offset (lowerorder bits),
" 6.45 ".
Memory
Virtual address from processor
PTBR holds the
address of the
table base register
page table Page table address Virtual page number Offset
Virtual address is
interpreted as
page number and
offset.
PAGE TABLE
PTBR + Virtual page
number provide the
entry of the page in This entry has the starting location
the page tabBe of the page
Page table holds infomation
about each page. This includes
the starting address of the page
in the main memory.
Contro Page frame
bits in memory Page framie Offset
Physical address in main mema,y
Figure 6.13 Virtual memoryaddress translation
[Link] Page Table
location of each
Page table contains information about the main memory
This information includes the main memory address where the page is stored
page.
current statis of the page. An area in main memory that holds one page is
andthe
called page frame.
page table is kept in a page table base register.
The starting address of the
added with the virtual page number to get
register is
The content of page table base
entry in the page table.
the corresponding
". 6.46 " " Computer Architecture
Each entry in the page table also includes some control bits. They are used to
describe the status of the page when it is in the main memory. The two important
control bits are: valid bit and modify bit
S. No. Control Bit Purpose
1. Valid bit Indicates the validity of the page
If it is 1, the page is loaded in memory.
Ifit is 0, the page is not valid
Toremove a page, the corresponding valid bit
is made to 0 simply.
2. Modify bit Indicates whether the page has been modified
during residency in the memory.
This information is needed to determine
whether the page should be written back in the
disk before it is removed from memory
3. Access Indicates restrictions on accessing the page.
control bits Example: Read/write access
The following steps are used in address tranalation:
1. Virtual address generated by the processor is divided into two parts as
virtual page number and offset.
2. The virtual page number in the address is added with the contentsof page
table base register to get the required entry in the page table.
3. The page table entry provides the address of page frame in memory.
4. Physical address is generated by combining the page frame address with the
offset field of the virtual address.
" Menory " 6.47
Buffer
6.5.3Translation Lookaside
page table
For every read and write access, the information is used by
management unit. So if the page table is kept in MMU, it will be.
memory will be easy to
access. But, the page table is too large to fit in MMU. Normally MMes .
implemented as part of the processor chip. Therefore, the page table is kent in h
main memory. But still, a copy of small portion of the page table' can he
accommodated within MMU. This smallcache is called as Tranlation Lookaside
Buffer (TLB).
Virtual address from processor
Virtual Page Number Offset
TLB
Virtual Page Control bits Page frame
Number in memory
es
Miss
Page Frame Offset
Physical address in ain memory
Figure 6.14 Translation Look aside Buffer
lo6.48
" Computer Architecture
TLB contains entries that
structure of TLB is correspond to most recently accessed pages.
pddition to the
slightly modified fromm the page The
information in the page table table in main memory. In
tlhe entry (virtual page entry, TLB includes the
number). Figure 6.14 virtual address
mapping is used. shows a TLB in which
associative
The following steps are
üsed in address translation
process with TLB:
. Processor generates the virtual address.
2. MMUlooks in the TLB for the
3. If the page table entry for
referenced page.
this page is found in the TLB, the physical
addrëss is obtained immediately.
4. If the page table entry is not
found for the required page, then the
corresponding page entry is obtained from the page table in the main
memory
5. Then TLB is updated
accordingly.
[Link] Page Fault
When a program generates an address request to a page that is not available
in the main memory, then a page fault is occurred. The whole page must be
brought from the disk into the main memory. When the MMU detects a page fault,
it asks the operating system to handle the situation by raising an exception
(interrupt). The operating system copies the contents of the page from disk into the
main memory and transfers the control back to the interrupted task.
[Link] Page Replacement
main rgemory is full, a page
When a new page is brought from the disk, if the
replaced from main memory. Concepts similar to LRU replacement
ust be a control
replacement. A simple scheme is to set
gorithnms can be used for page determine the pages
a simple way to
bit
whenever
a is referenced. This is
page
Memory " 6.49
which have not been used recently. The operating system occasionally clears this
bit in all the page entries.
[Link] Write Operation
A modified page has to be writen back to the disk before it is removed from
the main memory. As in cache memories, write-through protocol is not suitable
here. Since the access time of disk is so long, only write-back protocol is suitable
for virtual memories.
EXAMPLE -6.8
An address space is specified by 32-bits and memnory space is specified by 24
bits.
(a) How many words are there in address space?
(b) How many words are there in memory space?
(c) If a page consists of 4K words, how many pages and blocks are there in
virtual memory and main memory?
ANSWER
-(a) How many words are there in address space?
Number of bits used to specify address space = 32-bits
Number of words in address space =2=4 Gwords
(Note: 1G=2";2G =2; 4G =2)
(b) How many words are there in memory spacc?
= 24-bits
Number of bits used to specify memory space
Number of words in address space 22= 16M words
(Note: 1M= 2"; 2M =2'; 4M =2", 8M =2, 16M =2)
Architecture "
" Computer
words, how many pages and blocksare there in
(c) Ifa pageconsists of 4K
virtual memory and main menmory?
Number of words in address space
Number of pages Number of words in each page
4G 232.
4K 212 = 220 = 1M pages
Number of words in memory space
Number of blocks
Number of words in each page
16 M
4K
212 212=4K blocks
224
EXAMPLE-6,9
An address space is specified by 24-bits and memory space is specified by 16
bits.
(a) How many words are there in address space (virtual memory)?
(b) How many words are there in memory space (main
memory)?
|ANSWER
(a) How many words are there in address
space(virtual memory)?
Number of bits used to specify address space = 24-bits
Number of words in address space = 2= 16M
words
(b) How many words are there in memory
space (main memory)?
Number of bits used to specify memory space = 16-bits
Number of words in address space 2=64K words
(Note : 1K= 2°; 2K = 2"; 4K = 22, 8K =2, 16K = 2", 32K = 2'S.
64K =24)
"7.30 "
" Computer Architecture
4. Contains address-decoding circuitry and generates required timing signa ls
5. Perforins any formát'conyersions required
7.6.1 Universal Serial Bus.
A Universal Serial Bus (USB) is the commonly used interconnection
standard. It enables communication between devices and a host controller
such as a. [Link]. It is afast serial bus.
" It connects peripheral devices such as- digital cameras, mice, keyboards,
printers, scanners, media devices, external hard drives and flash drives.
",The commercial success of the USB is due to its simplicity and low cost.
The USB has been designed to meet the following key objectives:
Provide simple, low cost and easy to use interconnection system
Accommodate a wide range ofI/O devices and bit rates
Enhance user friendliness through plug-and-play mode of operation
Device Characteristics
The speed, volume and timing constraints associated vith data transfers to
and from the devices vary significantly.
USB can provide a small amount of power to the attached device through the
USBcord.
Devices that only need a little power can get it from the bus, and do not need
a separate electric power plug.
" /0 Systerm 7.31
Plug-and-play
the
The plug-and-play featute means that when a new device is connected
system detects its existence automatically.
The USB standard defines both the USB software and hardware for
communication.
The software finds the type of the device connected and how to communicate
with it.
The USB is also called hot-pluggable, which means adevice can be plugged
into or remove from aUSB port while power is turned on.
USB Versions
Currently, five different USB standards are used:
USB 1.0,
USB 1.1,
USB 2.0,
USB 3.0
USB 3.1.
USB 3.1 doubled the speed of 3.0.
USB Transfer Speeds
USB offers five different transfer speeds:
1.5 MBit per second (called low speed),
12 MBit per second (Full Speed),
480 MBiUsecond (Hi Speed),
SGbit per second (super speed),
10Gbi/s ('super speed+").
7.32 "
Computer Architecture
Hi speed is only available in
USB 2.0 and later, and
available in USB 3.0. Super speed is only
USB Connectors
Anumbér of
different USB connectors exists, the two major types of
connectors are:
TvDe A: The USB 2.0
standard is type A; it has a flat
inserts into a hub or USB host which rectangle interface that
A keyboard or
transmits data and supplies power.
mouse are common examples of a
Connector.
type A USB
Type B: A type B USB
connector is square with slanted exterior corners. It is
connected to an
upstream port that uses a removable cable such as a
printer. The type B conneçtor also transm its
data and supplies power.
Somé type B connectors do not have a
data connection and are used
only as a power connection.
USB Architecture
USB Tree Structure
Host Computer
Root
hub
Hub Hub
I/O /O
Hub device
device devicedevice
I/0
device device
The USB uses point-to-point connections and a serial transmission format.
When multiple devices are connected, they are arranged in a tree structure
as shown in figure.
" 7.33
i/0 System
Each node of the tree has a device called a hub. It acts as an intermed iate
transfer point between the host computer and the I/O devices.
At the root of the tree, a root hub connects the entire trce to the host
computer.
The leaves of the tree are the /O devics like, mouse, 'a keyboard, printer,
camera, ora speaker.
time. Tohandle this,
The I/O devices are allowed to send messages at any
only in
USB operates on the basis of polling, A device may send a message
Hence no two devices
response to a poll message from the host processor.
can send the messages at the same time.
is local to the USB
Each device is assigned a 7-bit addres. This address
tree.
Isochronous Traffic on USB
simple manner.
USB supports transfer of isochronous data in a
precisely timed regular intervals.
" Isochronous data need to be transferred at
The root hub transmits unique sequence of bits over the USB tree every
"
millisecond.
called as Start of Frame character which is used as the marker to
It is
indicate the beginning of data.
digitized audio and video signals can be transferred in a regular and
Thus,
at precise time.
Electrical Characteri_tics
wires carry power, +5V and
USB connections consist of four wires: Two
Ground and another two wires carry data.
" 7.34 " Computer Archilecture
The VO devices that do not h£ve large power requirements can he powered
directly from USB.
Two methods are used to send data over USB cable.
a) Single-ended transmission,
b) Difierential Signalling
(a) Single-ended transmission (Low-Speed)
This methodis uséd when data is sending at low spevd.
Ascheme in which a signal is injected on a wire relative to ground is
called as single-ended transm ission.
A high voltage relative to ground is transmitted on wne of the two
data wires to represent a 0 and on the other to, represent a l.
The ground wire carries the return current in both the cases.
This scheme is vulnerable to noise.
(b) Differential Signaling
High-speed USB uses Differential Signaling method.
The data signal is injected between two data wires twisted together.
Here, the ground wire is not involved.
The receiver senses the voltage difference between the two signal
wires directly without reference to the ground.
Here, the noise component is cancelled ot.