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Understanding P-N Junctions in Transistors

The document summarizes the operation of a p-n junction semiconductor diode. It describes how diffusion of holes and electrons across the junction leads to the formation of a depletion region with an electric field and potential barrier. In equilibrium with no applied bias, the potential barrier opposes further diffusion and the net current is zero. The document outlines the conduction mechanism for the diode under no bias, reverse bias, and forward bias conditions.

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0% found this document useful (0 votes)
15 views25 pages

Understanding P-N Junctions in Transistors

The document summarizes the operation of a p-n junction semiconductor diode. It describes how diffusion of holes and electrons across the junction leads to the formation of a depletion region with an electric field and potential barrier. In equilibrium with no applied bias, the potential barrier opposes further diffusion and the net current is zero. The document outlines the conduction mechanism for the diode under no bias, reverse bias, and forward bias conditions.

Uploaded by

Francis
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Semiconductor diodes

and junction transistors

Since 1948, when the first transistor was announced by Bardeen and Brattain
(Ref. 1) at the Bell Telephone Laboratories, a large number of semiconductor
devices have been invented, and in this chapter and the next we describe some
of the more important ones.
The p-rt junction is described first and its mechanism of operation is con-

sidered in some detail since forms the basis for almost all the other semi-
it

conductor devices. The junction transistor and the drift transistor have had
such a very great impact on post-war electronics that it is unnecessary to stress
their importance any further. The more recent junction-field-effect devices are
increasingly important because they extend the use of semiconductor devices
to circuit applications which had hitherto been beyond the capabilities of
the junction transistor. Finally, the metal-oxide-semiconductor device, which
should play an important part in the development and production of micro-
circuits, is described.

Notation
n electron concentration
np electron concentration in p-type region (minority carriers)
n pQ electron concentration in bulk p-type crystal
nn electron concentration in n-type region (majority carriers)
p hole concentration
pn hole concentration in n-type region (minority carriers)
pn0 hole concentration in bulk «-type crystal
pp hole concentration in p-type region (majority carriers)
Vn barrier voltage at unbiased p-n junction
Vb applied battery bias
Lp Ln
, hole and electron diffusion lengths
D P Dn , diffusion constants
tp t„
, lifetimes
Jp> Jn current densities
A junction area
96
The p-n junction 97

4.1. The p-n junction


An exact theoretical analysis of the conduction process at a practical p-n
junction is very difficult, but a close approximation to the experimental pro-
perties can be obtained by assuming a fairly simple model for the p-n junction
itself. We assume that (a) the junction is abrupt, (b) recombination in the region

of the junction is negligible and (c) there are no fields in either semiconductor
material away from the junction region. Assuming this simple model we first
describe the action at the junction qualitatively and then derive expressions
for the current flow across the junction, the width of the junction region and
the junction capacitance.
The action at the junction with no external applied voltage is described with
reference to Fig. 4.1. A/?-type crystal, with its high concentration of holes, is
brought into close contact with an «-type crystal containing a high concentra-
tion of free electrons. The concentrations are shown in Fig. 4.1b. From the
discussion of diffusion in section 3.7.3 we know that there is an immediate
diffusion of holes from the ^-region, where they are abundant, to the n-region,
where they are scarce, and there is a corresponding movement of electrons
from the H-region to the/7-region. The movements are shown schematically by
the firm arrows in Fig. 4.1a. These movements last for a very short while and
mobile holes and electrons known as carriers subsequently recombine as they
move away from the junction into the bulk of the crystal.
Before the junction was made, both crystals were electrically neutral so that
the movement of holes from the />-region leaves a number of negatively
charged acceptor atoms on that side, which remain bound to the lattice, and
similarly the movement of electrons from the n-region leaves behind positively
charged donor atoms. The result is the formation of a space-charge layer in
the vicinity of the junction with a positive charge on the n-type region and a
negative charge in the/?-type region, and with the reversal of charge occurring
at the junction. The immobile charged atoms are shown schematically in
Fig. 4.1a and the magnitude and distribution of the space charge is shown in
Fig. 4.1c. The extent of this space-charge layer between the two crystals is
known as the depletion region or layer because mobile carriers have been re-
moved from it. Another feature of these two space-charge regions is that they
are equal in magnitude, though opposed in polarity. This arises because we
have assumed that there is no field in the crystal far from the junction. The
existence of the oppositely charged layers produces a field in the depletion
region and all field lines from positive donor atoms must terminate on an
equal number of negative acceptor atoms.
The field intensity between the two field-free regions is shown as a function
of distance in Fig. 4. Id. The maximum is exactly at the junction where the
greatest number of lines cross. The direction of this field is such as to oppose
the further movement of carriers and the diffusion process is therefore in-
hibited. A state of equilibrium is eventually reached when the field is strong
enough to stop the net current flow across the junction completely. The field
does cause some of the few holes in the n-type region to drift into the />-type
98 Semiconductor diodes and junction transistors

Depletion
layer
+(Z?T~
Holes +~ -© ^Electrons

p-type
+ + ^ /7-type
Immobi le acceptors
(o)
© © ©Immobile donors

Negative Positive
space space
charge charge

Electrons

o
(J

o>
o

(b)

Space charge K
(c)

(d) I

o
a.
(e)
Space-charge
region

Fig. 4.1 Schematic diagram of depletion layer formation, (b) Concentration of holes
(a)
and electrons, (c) Space charge in the depletion layer, (d) Electric field in the depletion
layer, (e) Potential barrier
The p-n junction 99

region, but they are balanced by an equal number of holes which overcome
the field and still from the/>-type region; the net
diffuse into the w-type region
hole movement is zero. A similar argument applies in the case of electrons and
the net current is zero.
A field at the junction implies that there is a potential difference between the
two regions. It is shown plotted in Fig. 4.1e and is known as the potential
barrier. The sense is such as to oppose the diffusion of carriers in either direc-
tion. To summarize, at a p-n junction in equilibrium with no applied bias,
there is a potential barrier across a depletion layer and the net current flow is
zero.

/?-type /7-type

S
*v S 1 . Conduction band

r\
i

*-*

Valence band
Junction

Fig. 4.2 Energy level diagram for p-n junction with no applied bias

The energy level diagram for the p-n junction in the equilibrium state is
shown in Fig. 4.2. The energy gap for the semiconductor, Eg is as shown. The ,

Fermi level is continuous through the junction and lies near the valence band
in the />-type material and near the conduction band in the w-type material.
The potential barrier, Vd is also shown in the same figure.
,

The conduction of charge across the p-n junction will be considered under
three conditions: (1) with no applied bias voltage, (2) with a reverse bias
applied to the junction, and finally (3) with a forward bias applied to the junc-
tion. The three bias conditions and the resulting potential barriers are shown
in Fig. 4.3.

[Link] unbiased p-n junction


The junction is in equilibrium with no applied voltage. There are four com-
ponents of charge moving across the junction although the net current is zero.
(a) There are a few electrons on the/?-side which move into the n-side with
the aid of the field, causing a current which is proportional to the concentra-
tion of electrons on the p-side.

hi = C n p0
x (1)
100 Semiconductor diodes and junction transistors

Depletion layer

( i ) Unbiased
mm
HE n—
(a) (ii) Reverse
bias
H
1
" msm«
rt
(iii)Forward
Vb
bias

- Reverse bias
f i

M i
Unbiased
8}
Forward bias
u Wd
W X
(b) J •

/ < 1

_J
Fig. 4.3 (a) Bias conditions on a p-n junction, (b) Potential barrier formed
1

with the three bias conditions

The constant C x depends upon various semiconductor parameters such as


diffusion constant, diffusion length, lifetime and the junction area and is given
a more precise meaning in section 4.1.4.
(b) There are a number of electrons which move from the H-side, overcome
the potential barrier Vd
and enter the ^-side. This number is proportional to
the concentration of electrons in the n-side multiplied by the probability of
these electrons being able to surmount the potential barrier.

7n2 = dn„ exp (-£) (2)

The usual Boltzmann relation is used to express the probability of electrons


overcoming the barrier and the constant Cx is the same as in eqn. 1, since it
again depends on the same parameters as before which apply to the conduc-
tion of electrons in a crystal.
(c) In a manner similar to case (a), a few holes will move from the n-side to
the ju-side, giving

hi = C2PnO 0)
The p-n junction 101

where C2 is a constant which applies to the conduction of holes in a


crystal.
(d) Some holes overcome the barrier and move from the p-side to the
ra-side and this current is given by

/„ a = C^p exp(-^) (4)

In equilibrium, for the unbiased junction, since the net current is zero,

hi = hv. and Ipl = Ip2

Hence n p0 = " n exp ( 5)


(—j-ff

and p n0 = -P" ex P( _
^r) ^
4.1.2. The p-n junction with a reverse bias
Reverse bias applied to a p-n junction as shown in Fig. 4.3a with the
is

negative terminal of the battery connected to the^-type crystal and the posi-
tive terminal to the n-type crystal. The height of the potential barrier is in-
creased by the magnitude of the applied bias as shown in Fig. 4.3b. The effect
of this increase in barrier height is that the currents In2 and Ip2 are reduced, to
negligible values when Vb is large enough, while the currents Inl and Ipl re-
main unchanged. We have, for the reverse bias

hi = Ci«n exp kT
(/)

Vd + Vb)
and 7P a = C2 pP exp
e(
^ /«
W
The net current flow under these conditions is given by the algebraic sum of
the four components

h= (Ci«» + C2 />P)exp -e{Vd + V„)/kT - O p0 - C2 pn0


Using eqns. 5 and 6 we have

/« = (Qnpo + C2 p n0) (exp -^ - l) (9)

or IR = I (exp -'-£ - l) (10)

where I = (Cjn p0 + C2 p„ ) is known as the saturation current. The presence


of the negative exponent ensures that for bias voltages greater than ~ 1 volt IB
is equal to the negative of the saturation current which flows as a result of the
small number of electrons in the />-type region and the small number of holes
in the n-type region.
102 Semiconductor diodes and junction transistors

4.1.3. p-n Junction with forward bias

Forward bias is applied to the p-n junction as shown in Fig. 4.3a, and the
potential barrier is reduced by the amount of the battery voltage as shown in
Fig. 4.3b. The currents InZ and Ip2 are considerably increased because they
have a much lower barrier to surmount while the currents Ipl and 7„i remain
unchanged. The total current in the forward direction is

IF = (€>„ + C2 pp) exp - d


,
b)
- Ci/jpo - C2 p n0
kJ

Using eqns. 5 and 6 again, we have

/, = / (exp^-l) (11)

This is same as eqn. 10 except for the sign of Vb IF increases very


exactly the .

fast for 10 and 11 are known as the diode equations


Vb > 002V. Equations
and give the relation between current and applied bias. Experiments on real
p-n junction diodes show that eqns. 10 and 1 1 give curves which agree very
closely with experiment.

4.1.4. Interpretation of the saturation current I

We have said earlier that the minority carrier flow across the junction de-
pends on the parameters of the semiconductor material. To interpret the
nature of the saturation current we must investigate the behaviour of these
minority carriers more closely.
Forward bias applied to the junction alters the concentration of minority
carriers near the junction. Figure 4.4 shows a large increase in minority
carriers near the junction for both p- and n-regions. This happens because
there is a high concentration p p of holes on the p-side where they form the
,

majority carriers and some of these cross the potential barrier so that the con-
centration just beyond the depletion layer on the n-side is p„ exp[-e(Fd -
Vb)jkT]. This high concentration decreases as one proceeds further into the
n-side, to reach the equilibrium concentration of minority carriers (holes) in
the n-side, p nQ Similarly, there is a high concentration of majority carriers
.

n n on the n-side of the depletion layer and this concentration becomes


n n exp [-e(Vd - Vb )lkT] just on the/>-side of the depletion layer and decays
to the equilibrium value of n p0 at some distance from the junction.
Reverse bias affects the carrier densities as shown in Fig. 4.4b. The holes
arriving at the junction from the/7-side encounter a very high potential barrier
and very few cross into the n-side. Also, the few minority carriers (holes)
arriving at the junction from the n-side are swept away by the field into the
p-side so that there is a very low concentration of holes on the n-side, well
below the normal equilibrium concentration of pn0 In a similar manner, the .

number of electrons at the junction on the/>-side is well below the equilibrium


concentration in the bulk material n p0 .
The p-n junction 103

Depletion layer

c p-type / />-type
o
"p-

.o&-v*>
n„ exp-e ("fc-ii) pp exp-e
7r~"7f. *r

.£ /
8 "po
(a)

Hole concentration near p-n junction with forward bias


Electron concentration nearp-n junction with forward bias

Depletion layer
,0-type /7-type

— nn

/
/
/
(b)
Hole concentration near junction with reverse bias
Electron concentration near junction with reverse bias

Fig. 4.4 Carrier concentration at a p-n junction with : (a) forward bias ; (b) reverse bias

For holes in the n-type material, the concentration at the junction is given
by

Pn = Pp exp
- e{Vd - V„) (12)
kT
If the equilibrium hole density in the n-side is p n0 we have from
, eqn. 6.

Pno = PP exp - eVd (13)


kT

therefore Pn = Pno exp (14)


kT
104 Semiconductor diodes and junction transistors

Using the continuity equation (eqn. 52, Chapter 3) and assuming that both
generation of holes and drift currents are negligible, we have for the decay of
holes with time

where the first term on the r.h.s. is the rate of decay through recombination,
and the second term represents the diffusion current. Hence

and in the steady state

*&^?(-»-#-')-° <">

Integrating, and using the boundary conditions,

Pn = Pno exp jj; at x = 0, p n = pn0 at *-* oo

we obtain

Pn = Pno {l + (exp *-£ - l) exp


-^p} (18)

Now, from eqn. 41a, Chapter 3, we have

where A is the area of the junction. Therefore

A similar expression can be derived for the electron current, giving


/B -^g&o(expg-l) (20)

therefore /, = Ae (^=2 + ^)(exp §- l) (21)

Comparing this equation with the diode equation, eqn. 11, we have

/„ = Ae (£^=2 + ^o) (22)

and the constants d, C2 are defined; or, in terms of lifetime,

Io = Ae ^2 + h^2J (23)
The p-n junction 1°5

Equation 23 may be written in terms of the acceptor and donor impurity con-
centrations assuming that they are completely ionized.

''""•'irfa + m) <24)

Since p n0 t
= n 2 INd and np0 = n 2 INa eqns. 23 and 24 show that the saturation
current depends on the minority carrier concentrations. For example, if the
p-type region is heavily doped and the n-type region lightly doped, then large
numbers of holes will be injected into the n-region where they are, of course,
minority carriers. This type of junction design is known as minority-carrier
injection and is used in many semiconductor devices.

[Link] of the depletion layer and depletion layer capacity


We have seen that space-charge layers form on either side of a. p-n junction
and that this disturbed region effectively controls the behaviour of the p-n
junction, while the bulk of the crystal remains unchanged. now calculate We
the width of the depletion layer for two cases assuming j(a) that the transition
from ^-type to n-type material and the other boundaries of the depletion
layer are abrupt, and (b) that the junction is linearly graded, with the impurity
doping changing linearly from/>-type at some point within thep-region to zero
at the junction, and then to «-type at some point within the w-region. The two
conditions are shown in Fig. 4.5a and b respectively. (Ref. 2 discusses non-
uniformly graded junctions.)

Case 1. Abrupt junction


Let the space-charge density be greater in the n-type crystal than in the
p-type crystal and let the extent of the space-charge layer be dp on the /7-side
and dn on the n-side.
Since the total charge on either side of the junction must be the same,

eNddn = eNadP (25)

We also use Poisson's equation in one-dimensional form

d2 V p_
dx2 ee

For the /^-region this becomes

S?-^
dx 2
ee
(26)

%r
Integrating, = eNjc + (27)
QX es

at x = dp the electric field -aVjdx = 0, therefore

-j—
dx

dV = eNa - ,.
= (x
v
ee Q
dp/
p)
.
106 Semiconductor diodes and junction transistors

a>
o NM
o
a.
tn

BSBWJ^iS*^

r'^vfi-^Mt^.. .v. .':•:•:•:•:•:•:•:•:•:

d~[Link].-
/
/
V?
/
/
(a)
/
9) H
«
U y N,
a
a.
03

N„
/
/
/
.2,i /
/
o /
a. /
/
(b)

Fig. 4.5 The depletion layer: (a) abrupt junction; (b) graded junction

Integrating again V=
eN2 lx 2 -
ly — d„x + K2 \
J

Using an arbitrary reference V= at x = dp


(28)
The p-n /unction 107

Therefore, the height Vp from our reference level to the junction is given by
putting x = in eqn. 28 giving

K,-gj-4" (29)

Similarly, using Poisson's equation for the n-side, where x is positive, we have
the part of the barrier voltage given by Vn

Vn =
V ^^ • d
Un
2
GO)
K
'
2ee

The total barrier voltage is

V = Vp + Vn =
t
^ (Nad„ 2 + N
d .dn *) (31)

Using eqns. 25 and 31 and solving for dn and dp we have ,

_ /2 eeo Kt \
1/3
/ Na \" 2
n„
* It") lAgvTinv?)
(32)

rf = few*/ Aj^y 2
(33)

and 4j, the total depletion layer width, is

In practice it is often found that one side of the junction is much more heavily
doped than the other. Considering the case where the />-type side is again
heavily doped, we have #„ » Nd and therefore

From
** m*
and 33 it is apparent that under these conditions dn is much
eqns. 32

greater thandp and most of the depletion layer lies in the lightly doped region.
The width of the depletion layer depends on the impurity doping and gets
narrower as the doping is increased. It also depends on V112 = (Vd + Kb) 1/2
and therefore increases when the junction bias is in the reverse direction and
decreases when the bias is in the forward direction.
As an example, we calculate the width of the depletion layer in the case of
a Ge junction with a » N N
d from eqn. , 35.
If all the donors are ionized

°n = ^eNd (36)

2£e F 1/2
Thus dd = '
(37)
( °J*" )
J 08 Semiconductor diodes and junction transistors

For Ge we have the following data:


=
relative permittivity 16
electron mobility= 3,900 cm2 /volt sec

conductivity assumed = 0-02 mho/cm


bias + Vd = 0-5 volt

From these figures substituted in eqn. 37 we find

dd = 5-24 n

The junction capacitance


The depletion layer acts as a parallel-plate capacitor, and its capacitance may
be written as

Ct -&
aV
= *p
t
«d
(38)

therefore Cd = A
^^N^ ll2

^+^ _ 1/2
^ 1/2
(39)

Numerically for the case we have just considered

Ca = 30 ixF/m 2

Case 2. Linearly graded junction

The variation of charge-density across the junction is illustrated in Fig. 4.5b.


This type of variation is found in many practical junctions at low bias voltages
and is therefore of interest.
We have, in the ^-region,

d2 V exd
(40)
dx2 ss Q

where 6 is the impurity-density gradient = {Na + N A )jl.


Integrating

QX 2ee

Now, j— = at x = dP

hence ^
ax
= ^-
2ee n
(x
2
- d*) (42)

e6 fx 3
Integrating again, V= =— ly - d p
2 \
x\ + K 2

But, V= at x = 0, :. K2 =
and
.
_ eO t x
v= d>*
1

2^X3 ~ ,)
The p-n junction 109

Therefore Vp ~ 2ee \ 3 J

From symmetry we have dp = dJ2


ed dd*
therefore vp '
(43)
2ee 12

and "t
— n (44)

/12K(eeo \ 1/3
so that d*-\ (45)
e6 )

From the symmetry of the arrangement,

= (Na + Nd )ll
The junction capacity
The junction capacity is again ee Q Aldd therefore ,

/ pf) \ 113
Cd = ^-o) 2 3 (igr) '
(46)

4.1.6. Diode resistance and diffusion capacity

We derive in this section linear variational models for the junction diode
which hold, first, at low frequencies where capacity effects may be neglected
and, then, at higher frequencies where diode capacities must be taken into
account. The diode current equation is

/ = / (ex P §-l)
d/ l
Now dT = 7d ~ 8*
b

gives the conductance of the diode, hence

ela eVb
8* = kT* Xp W
r
* - eTTTh) (47)

This equation shows that when the diode is reverse biased, I = —I and ideally
the resistance is infinite. In practice, this is not so because there is always
some current flow in the reverse direction due to thermal carrier generation in
the depletion region, and there are also surface leakage currents.
J

/ 10 Semiconductor diodes and junction transistors

In the forward direction / » J in normal operation and we may write

rd = kTjel == 0-026/7 ohms (48)

At higher frequencies we must take capacity effects into account. We al-


ready have an expression for depletion layer capacity, but there is another
effect in thep-n junction which behaves as a capacitative effect and is known
as the diffusion capacity.


Excess
minority
carrier
density

Junction

/j-region

Fig. 4.6 Variation of carrier concentration with forward bias

Consider a forward biased p-n junction. The excess minority carrier (hole)
concentration in the H-type side is as shown in Fig. 4.6, for two values of
forward bias. The total charge stored is a function of Vb and hence acts as a
capacitance. The excess holes as a function of distance from the junction may
be written as

as in eqn. 18.
Pn = PnO
HSH exp (49)

To obtain the total charge enclosed we can integrate e times eqn. 49 from
x = to x = oo, giving

Qv = ep n0 Lp |exp-£^ - I
(50)
The p-n junction 111

The current at x = is found from eqn. 41a, Chapter 3

>=- eD>te
J

From eqns. 50 and 51


= eD PnO
'i, KM
L ZJ
(51)

Qp = —JZ = TpJp (52)


Up

and Cpoum unit area = ^ = tp -p^-

r
»-p((Uff)
-

eI
-pp t p
-
— —
t p
(53a)

Similarly for electrons, we have

--n(illtt) (53b)

Therefore the total diffusion capacity is

(54)
7b ' n

If, however, the/>-type region is heavily doped, then we can write the diffusion
capacity as
Wlff -r

Cjiff diffusion capacity

/•
rf
,low frequency
i Depletion \
diode resistance
( layer )
v capacity '

Fig. 4.7 High frequency model for the junction diode with forward bias

Using the results for the depletion-layer capacity, the low-frequency diode
resistanceand the diffusion capacity, we are in a position to derive a model for
the diode which holds at high frequencies as shown in Fig. 4.7. It must be
emphasized that the two capacitative components in the model depend on the
voltage across the diode and therefore the exact frequency response is very
complicated. Ref. 2 gives a more detailed account of p-n junction theory.
112 Semiconductor diodes and junction transistors

4.1.7. p-n Junction rectifiers

The equations we have derived for the diode current show clearly that the
p-n junction may be employed as a rectifier with a low forward resistance and
a high reverse resistance. Ge and Si diodes are extensively used as rectifiers in
power supply circuits. The characteristics of a typical low-power Ge diode
and a medium-power Si diode are shown in Fig. 4.8a and b. Ge diodes are
employed at low operating power levels where the device temperature does not
much exceed 50 °C. Silicon diodes, however, may be operated at temperatures
in excess of 100 °C and therefore, with adequate cooling arrangements, at
very high power levels. Si diodes capable of delivering several hundred
amperes have been constructed.
The forward current characteristic of a p-n junction diode fits the curve pre-
dicted by the theory we have outlined in this chapter, except at very high
forward currents where ohmic drops in the semiconductor material begin to
have an appreciable effect. The reverse current characteristic, however, does
not agree so well. The theory predicts a reverse current, 7 , which should
remain constant for values of reverse voltage more negative than, say, 0-1 V.
In practice, the reverse current, especially for Ge diodes, is found to be greater
than predicted theoretically and there is an increase with reverse voltage. The
increase is thought to be caused by surface leakage, but is not clearly under-
stood. Modern devices have been much improved in this respect.

7"amb=25»C

7"a,nb
= 60 o C

(a)

Fig. 4.8 (a) Characteristics of Ge p-n junction diode at two values of ambient
temperature
The p-n junction 113

1-5

1-25

1-0
</>4
Q.
E Forward
< characteristic
0-75

0-5

Volts

1500 0-5

' volts
Reverse . I!
I00
characteristic

200 L
(b)

Fig. 4.8 (b) Characteristic of a Si rectifier

(a and b from Milliard Technical Handbook, vol. 4 (1 967) Nlullard, London)

The reverse current in Si devices is much lower than in Ge. This is to be


expected because of the greater energy gap. There is again a slight increase in
reverse current with increasing reverse voltage. In this case the increase is
believed to occur because of increased carrier generation in the depletion
layer which widens as the reverse bias is raised.
Temperature also has a considerable effect on the reverse current, as can be
seen from the characteristics shown in Fig. 4.8a, and care must be taken to
ensure that the manufacturer's limiting parameters are not exceeded.
5 + I.P.E.
114 Semiconductor diodes and junction transistors

40

30

20
Forward characteristic

10

Vr{ volts)

10

Zd,
m Zd 3 Zd ;
Zd,
10
VF ( volts)

20

X X X—X- -/(max)

30
(c)

Fig. 4.8 (c) Breakdown characteristics of four Zener diodes

Finally, there is voltage at which the diode breaks down


a critical reverse
and conducts heavily in the reverse direction, and obviously this voltage
must not be approached in normal rectifier operation. It is, however, a feature
of the p-n junction which may be usefully employed in other applications. The
mechanism of this breakdown and its application are described in the next
section.

4.2. Reverse bias breakdown and Zener diodes


Whenthe reverse voltage on any diode approaches a particular value, the
current through it begins to increase rapidly with very little further increase in
voltage. The junction is said to 'break down' at this point and the current
through it has to be limited by the insertion of a series resistance in the circuit.
The breakdown characteristic for a diode is shown in Fig. 4.8c. Provided that
the current is not allowed to increase to such a value that the junction is
Reverse bias breakdown and Zener diodes 1 15

destroyed by overheating, the phenomenon is reproducible and is utilized in


making semiconductor voltage regulators, called Zener diodes. The break-
down is caused by two different mechanisms known as avalanche breakdown
and Zener breakdown.

4.2.1. Avalanche breakdown


At reverse voltages below the breakdown voltage there are only a small
number of charge carriers moving through the depletion layer of a p-n junc-
tion. The charge carriers collide with some of the unionized atoms but the
probability of making ionizing collisions is very small at low voltages. As the
reverse voltage is increased, the field across the depletion layer increases and
the charge carriers are accelerated and gain in kinetic energy until ionizing
collisions become possible. Such collisions release a large number of
electron-hole pairs in the depletion region which move apart in the high
field and, in turn, are accelerated to make further collisions to produce still
more free electrons and holes. At this stage an avalanche process is said to
take place and the original small reverse current is multiplied many fold. On
an energy level diagram, the effect is represented as a large number of elec-
trons being excited from valence band levels into the conduction band. This
type of breakdown can occur at fields of about 250 kV/cm. The voltage at
which the breakdown occurs depends on the field strength and on the width of
the depletion layer. If one side of the junction is heavily doped, most of the
depletion layer is formed in the lightly doped side and the breakdown voltage
can be controlled over a wide range by varying the impurity concentration in
the highly doped side and thus changing its width.

4.2.2. Zener breakdown


This type of breakdown occurs in diodes which are heavily doped and con-
sequently have a very narrow depletion layer. In this condition very high fields
may be created and if this field strength exceeds 1 MV/cm, the diode breaks
down and conducts a large current. The mechanism in this case is that co-
valent interatomic bonds are broken for some of the atoms in the depletion
layer and electrons from the valence band jump across the energy gap and
enter the conduction band. Zener breakdown depends only on the field
strength and not on the path length of free carriers in the depletion layer.
Provided that the depletion layer is narrow enough for the probability of
ionizing collisions to be negligible, Zener breakdown is the dominant conduc-
tion mechanism.
Zener breakdown was thought to be the major factor causing breakdown in
p-n junctions before the avalanche mechanism was recognized. In fact, since
avalanche breakdown occurs at lower field strengths than Zener breakdown,
it is often the prime cause. The conditions which determine the type of break-

down are the doping level and the reverse bias and, in some cases, both
mechanisms play a significant part in making up the reverse current.
It is believed that Si diodes which break down at voltages below about 5V
do so mainly under the influence of Zener effects. Those breaking down at
voltages of 10 V or more do so almost entirely by avalanche effects. Diodes
116 Semiconductor diodes and junction transistors

which break down at intermediate voltages are probably influenced by both


effects.
The breakdown phenomenon is used to make voltage reference diodes
known, rather misleadingly, as Zener diodes though most of them break down
due to the avalanche process. Zener diodes are available for a large number of
reference voltages ranging from a few volts to a few hundred volts.

4.3. The junction transistor (Ref. 3)

The schematic arrangement of an unbiased p-n-p junction transistor is


shown in Fig. 4.9a and the corresponding potential diagram is shown in
Fig. 4.9b. Viewing the transistor from the left, we have first a £-type region
which is called the emitter, then we have an n-type region called the base and,
finally, another ^-type region called the collector. We assume that both/7-type

:•:•::

Emitter Base Collector

(a) P n P

c \
Depletion
O layers
a.

(b)

Fig. 4.9
1\
Potential distribution on an unbiased p-n-p
*~ x
transistor

regions are heavily doped and have very high conductivities, and also that the
n-type region is both comparatively lightly doped and that its width is less
than the minority carrier diffusion length.
With zero applied bias, the Fermi level is continuous through the three re-
gions. There are two depletion layers, one at each of the junctions, between
emitter and base, and between base and collector. Equal numbers of holes and
electrons cross these junctions in either direction and there is no net current
flow.
The situation alters when bias is applied to the transistor, as shown in
Fig. 4.10, and transistor action takes place in the following manner.

4.3.1. Emitter-base junction

At the emitter-base junction we have a forward-biased p-n junction with


thep-type material heavily doped so that there is a high injection of holes into
the n-type base. At the same time, there is a small number of electrons mov-
ing from the lightly doped base into the collector region and the total current
is the sum of these two separate current components. The hole current, which

is almost equal to the total current, plays an important part in the operation
117
The junction transistor

of the device, while the electron current does not have a useful role. For the
emitter-base junction, an emitter efficiency, y, is defined as the ratio

hole current injected by emitter into base


total current flow from emitter to base

This efficiency is very close to unity because the heavy doping of the />-type
region ensures that there are many more holes being injected into the base
than there are electrons capable of moving from base to emitter.

Depletic n
/ layers \

p \
n P
i

to)

* 3T s
/forward bias\
\on emitter /
/reverse bias\
vc
Von collector /

(b)

Fig. 4.10 Potential distribution on a normally biased p-n-p transistor

4.3.2. Base region


holes injected into the base region have a high concentration at the in-
The
jection plane near the emitter. Hence they diffuse into the base in order to try
to reach a uniform concentration. (We assume there are no fields in the base
region.) Holes which manage to reach the base-collector junction encounter a
field which sweeps them out of the base into the collector. Those unable to
reach the collector recombine with electrons in the base region, consequently
there is a flow of electrons into the base region continuously replenishing the
electrons lost by recombination. To express the fact that not all the injected
holes reach the collector, we define a transport factor, ft, as the ratio

holes reaching collector


holes injected into base

This factor, again, is only slightly less than unity in a well-designed transistor.
It depends on the lifetime of holes in the w-type region and on the geometry of
1

118 Semiconductor diodes and junction transistors

the transistor. The influence of geometry may be understood by considering


that the holes diffuse in all directions once they enter the base region. Some
are lost by recombination within the bulk base material and there is also sub-
stantial recombination at the surface of the base where the recombination
probability is much higher. To obtain a good transport factor, the collector
must be designed to have a much greater area than the emitter. Figure 4.1
illustrates the advantage of having a large collector.

Base

Emitter Collector

Surface
recombination

Fig. 4.11 Schematic diagram illustrating the large collector area to


ensure a high transport factor in the forward direction

4.3.3. Base-collector junction

We have stated earlier that the direction of the field in the depletion layet at
the base-collector junction is such that sweeps the holes arriving at the junc-
it

tion into the collector. If this field is sufficiently high, there can be an enhance-
ment in the number of holes arriving at the collector, because the avalanche
type of carrier multiplication described in section 4.2.1. can occur. Hence we
define a collector efficiency, S, as the ratio

total collector current


incident hole current

This factor may have a value greater than one if the collector to base voltage
is very high, but it is usually close to unity at normal collector voltages.

The junction transistor 119

[Link]. Collector cut-off current


Collector cut-off current is the current which flows from the collector to
base when the emitter is open-circuit, and no current is injected from it. We
have, at the collector, under these conditions a reverse biased p-n junction.
V
The barrier height of this junction is Vd + c and the depletion layer extends
mainly into the n-region which is lightly doped. Thermally-generated holes
move from the base to the collector give a small current flowing from
and
collector to base. This current as the collector cut-off current Ieo .
is known
The other charge-carrier movements at the junction make negligible contribu-
tions to this current; e.g. the electrons in the n-type base are unable to sur-
mount the high barrier and the electrons in the collector are so few in number
that their effect may be discounted.

4.3.4. The current flow equations and the current amplification factor

The current amplification factor for transistors is defined as the ratio of the
collector current to the emitter current. More exactly, a must be written as

«„ = m\
\*elV c const.
ess)

since Icis not a linear function of Ie when Vc is a parameter. Except at very

high voltages, the value of « is slightly less than unity.

Ie 'c - a ie

o m^
—\? Cy » •

V
1

'

4=(l-a )/e
1 i •

Fig. 4.12 Current directions in a transistor for a linear


variational model

a may also be written in terms of the parameters we have just defined as

«o = yj8S=/(/e Ve) , (56)

If linear relationships are assumed between the transistor currents, we have


the following equations
7C = cc fe + Tco (57)

and /„ = (1 - 00)1. - Ico (58)

The current directions used in these equations are as shown in Fig. 4.12.
;

120 Semiconductor diodes and junction transistors

Another current amplification factor, j3 , is defined for a common-emitter


circuit shown in Fig. 4.13

a
<•-©,. c const. 1 — a
(59)

This shows that a must be made very nearly equal to one if high current gain
isto be obtained in the common-emitter circuit.

^° l-a

Fig. 4.13 Common-emitter configuration of a p-n-p transistor

4.3.5. Analysis of the junction transistor at low frequencies


An expression can be derived for the current gain of a transistor in terms of
measurable physical parameters of the semiconducting materials (Ref. 3).
From this expression it is possible to derive a model for the transistor in which
passive circuit elements and linear voltage and current generators are used to
represent the physical action. The model applies as long as the current and
voltage variations are restricted to linear incremental variations at low fre-
quencies. In carrying out the analysis we assume that the following conditions
apply:

(a) there are electric fields in the depletion region only. All other regions are
field-freeand have very high conductivities
(b) carrier flow through the base region is by diffusion only;
(c) there are abrupt junctions between emitter and base, and between base
and collector;
(d) the temperatures are low enough for the numbers of thermally generated
minority carriers to be very much smaller than the numbers of injected
carriers. This condition avoids the need to use excess carrier concentra-
tions in deriving the equations.

4.3.6. The diffusion equation for the base region


The diffusion equation for the base region may be written in the usual form

p U (60)
dx2 dt rv

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