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Diode Circuit Analysis and Voltage Calculations

1. The document contains examples calculating voltage (V), current (I), and resistance (R) values for circuits containing diodes using their ideal, approximate, and actual characteristics. Comparisons are made between the results. 2. R values are determined that produce desired I levels. Diode V and I values are calculated for series, parallel, and series-parallel configurations. 3. Calculations are shown for various diode circuits to determine V and I outputs. Comparisons are made between ideal and actual diode models.
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67% found this document useful (3 votes)
2K views44 pages

Diode Circuit Analysis and Voltage Calculations

1. The document contains examples calculating voltage (V), current (I), and resistance (R) values for circuits containing diodes using their ideal, approximate, and actual characteristics. Comparisons are made between the results. 2. R values are determined that produce desired I levels. Diode V and I values are calculated for series, parallel, and series-parallel configurations. 3. Calculations are shown for various diode circuits to determine V and I outputs. Comparisons are made between ideal and actual diode models.
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
  • Diode Analysis Problems
  • Characteristics and Load Line Analysis
  • Advanced Circuit Configurations
  • Logic Gate Applications
  • Experimental Diode Configurations
  • Transformers and Circuit Performance

1. a. Using the characteristics of Figure 2.

147, determine ID, VD, and VR for the


circuit of Figure 2.147a.

b. Repeat part (a) using the approximate diode model and compare the results.

c. Repeat part (a) using the ideal diode model and compare the results.

a)

E
ID=
R

8V
ID=
0.33 kΩ

ID=24.24 mA

VD=0.92 V
VR=E−VD
VR=8V −0.92 V
VR=7.08 V
b)
VD=0.7 V
VR=E−VD
VR=8−0.7 V
VR=7.3 V
c)
VD=0
VR=E−VD
VR=8−0 V
VR=8V

For (a) and (b), the voltage levels of the diodes are quite close. The levels in
part (c) are reasonably close but as expected due to the applied voltage level E.

2. a. Using the characteristics of Fig. 2.147b, determine ID and VD for the circuit of
Fig. 2.148.
b. Repeat part (a) with R = 0.47 k

c. Repeat part (a) with R = 0.18 k

d. Is the VD level relatively close to 0.7 V in each case? How do the resulting ID levels
compare? Comment accordingly.

to)

VD=5 V

E
ID=
R

5V
ID=
2.2 kΩ

ID=2.27 mA

According to the graph in figure b) the current is 2mA and the voltage is 0.7V
b)

E
VD=5 V ID=
R

5V
ID=
0.47 kΩ

ID=10.64 mA

According to the graph in figure b) the current is 9mA and the voltage is 0.8V

c)

E
VD=5 V ID=
R

5V
ID=
0.18 kΩ

ID=27.78 mA

According to the graph in figure b) the current is 22.5mA and the voltage is 0.93V

The resulting values of the voltage across the diode are quite close, while the diode
currents range from 2 mA to 22.5 mA.

3. Determine the value of R for the circuit in Figure a that will produce a current
through the diode of 10 mA if E=7 V . Use the characteristics of figure b for the
diode.
Figure a. Circuit

Figure b. Diode characteristics

Data:

E=7 V

Corriente en el diodo I D 1 =10 mA

R=?[Ohms ]

Solution:

10 mA caracteriticas voltaje del diodo 0.7 V and Vd=7 [V ]


Figure c. Trace of the load line and the operating point

A=( 0.7 , 10 ) B=(7 ,0)

m=−1.6

Ec . Recta de carga ID=−1.6 ( VD ) +11.2

Ec . Recta de carga ID=−1.6 ( VD ) +11.2

Crossing point between (ID and VD)

E
para VD=0 ID=11.2 mA=
R

We calculate the resistance

E
ID=11.2mA=
R

7V
R= =0.625[ KΩ]
11.2mA

4. a) With the approximate characteristics of the Si diode. determine V D , I D y V R


for the circuit in the figure.
b) Perform the same analysis of part (a) with the ideal model for the diode
c) Do the results obtained in parts (a) and (b) follow that the ideal model can be
a good approximation of the real response under some conditions?

Solution

Data:

E=30 V

Voltaje de diodo Si 0.7 V

R=2.2[KΩ]
a) I D =I R
L .V . K
−30 V +0.7 V + I R R=0

29.3 V
I R= =13.318 [mA ]
2.2 [KΩ]
V D=0.7 [V ]
V R=I R∗R

V R=( 13.318 [ mA ] )∗( 2.2 [ KΩ ] )

V R=29.03 [ V ]

Voltaje de diodo ideal 0 V

b) I D =I R
L .V . K
−30 V +0 V + I R R=0

30 V
I R= =13.636 [mA ]
2.2 [KΩ]
V D=0 [V ]
V R=I R∗R

V R=( 13.636 [ mA ] )∗( 2.2 [ KΩ ] )

V R=30 [ V ]

c) If given in section (b) the consumption of the Diode Voltage is 0 and the current
is equal, therefore they are quite close
5. Determine the current I for each of the configurations in Figure 2.150 using the
equivalent diode model .
to)

I =0 mA (Reverse biased diode)

b)

V 20 Ω=20V −0.7 V =19.3 V (LVK)

19.3V
I= =0.965 A
20 Ω

c)

10V
I= =1 A
10 Ω

6. DetermineV o and I D for the networks of Figure 2.151

to)

(LVK) −5 V +0.7 V −V o=0

V o =−4.3 V

|V o| 4.3 V
I R =I D = = =1.955 mA
R 2.2 K Ω

b)

8 V −0.7 V
I D= =1.24 mA
1.2 K Ω+4.7 K Ω

V o =V 4.7 k Ω +V D =( 1.24 mA ) ( 4.7 K Ω )+ 0.7 V =6.53 V

7. Determine the level ofV o for each of the networks in figure 2.152
to)

2 K Ω ( 20V −0.7 V −0.3 V )


V o=
2 K Ω+ 2 K Ω

1 1
¿ ( 20 V −1 V )= ( 19 V )=9.5V
2 2

b)

( 10V + 2V −0.7 V ) 11.3V


I= = =1.915 mA
1.2 K Ω+4.7 K Ω 5.9 k Ω
'
V =IR=( 1.915 mA ) ( 4.7 K Ω ) =9 V
'
V o =V −2V =9 V −2V =7 V

8. Determine Vo and ID for the networks in Figure 2.153.

a) Thevenin equivalent circuit

Vth=I . R

Vth=( 10 mA ) ( 2.2 k )

Vth=22V

Rth=2.2 k
22 V −0.7 V
Id=
2.2 k +1.2 k

Id=6.26 mA

Vo=Id . R

Vo=(6.26 mA)(1.2 k )

Vo=7.51V

b)
20 V +5 V −0.7 V
Id=
6.8 k

Id=3.58 mA

Vo−0.7 V +5 V =0
Vo=−4.3 V
9. Determine Vo1 and Vo2 for the networks in Figure 2.154.

a)
Vo 1=12 V −0.7 V
Vo 1=11.3 V
Vo 2=0.3V
b)
Vo 1=−10 V +0.3 V + 0.7 V
Vo 1=−9V

10V −0.7 V −0.3V


I=
1.2 k +3.3 k
I =2 mA
Vo 2=−(2 mA )(3.3 k )

Vo 2=−6.6 V

2.4 Parallel and series-parallel configurations

10. Determine Vo and ID for the networks in Figure 2.155.


a)
20 V −0.7 V
I 4.7 k =
4.7 k
I 4.7=4.1 mA

4.1mA
Id=
2
Id=2.05 mA

Vo=20 V −0.7 V
Vo=19.3V

b)
15 V +5 V −0.7 V
Id=
2.2 k
Id=8.77 mA

Vo=15 V −0.7 V
Vo=14.3V
*11. Determine Vo and I for the networks of Fig. 2.156

a) The Germanium diode is "on" and prevents the Silicon diode from turning on:
10V −0.3 V 9.7 V
I= I=
1k Ω 1k Ω
I =9.7 mA
b)

16 V −0.7 V −0.7 V −12 V 2.6 V


I= I=
4.7 k Ω 4.7 k Ω
I =0.553 mA
Vo=12V +(0.553 mA )(4.7 k Ω)

Vo=14.6 V

12. Determine Vo1, Vo2, and I for the network in Figure 2.157.

V O 1=0.7 V ,V O 2 =0.3 V

20 V −0.7 V
I 1 k Ω=
1k Ω
19.3V
I 1 k Ω=
1k Ω

I 1 k Ω=19.3 mA

0.7 V −0.3V
I 0.47 K Ω=
0.47 k Ω
0.5 V
I 0.47 K Ω=
0.47 k Ω

I 0.47 K Ω=0.851 mA

I D =I 1k Ω−I 0.47 K Ω

I D =19.3 mA−0.851mA

13. Determine Vo e I D for the networks of figure 2.158.


2 k Ω ( 10 V −0.7 V )
V 0=
1 k Ω+2 k Ω

2 k Ω ( 9.3 V )
V 0=
3k Ω

V 0=6.2V

6.2V
I 2 k Ω=
2k Ω

I 2 k Ω=3.1 mA

I 2k Ω
I D=
2k Ω

3.1 mA
I D=
2k Ω

I D =1.55 mA
14. Determine Vo for the network of Figure 2.39 with 0 V at both inputs.

There is no voltage necessary for the operation of the diodes, which do not work and
Vo=0
fifteen. Determine Vo for the network of Fig. 2.39 with 10 V at both inputs.

Vo=10−0 ,7
Vo=9 , 3

Both diodes are working


16. Determine Vo for the network of Fig. 2.42 with 0 V at both inputs.

Vo=0.7 V

Both diodes are working

17 . Determine Vo for the network of Fig. 2.42 with 10 V at both inputs.

V o =10V

Both diodes are not working

18 . Determine Vo for the negative logic OR gate of Fig. 2.159.


V o =−5 V + 0 ,7 V

V o =−4 ,3 V

The Si diode with -5 V at the cathode is working while the other one is not working.

19. Determine Vo for the negative logic AND gate of Fig. 2.160.

V o =0 V −0 , 7 V

V o =−0 , 7 V

20. Determine the Vo level for the gate in Fig. 2.161

Vo=+10 V
Since all terminals in the system are at 10 V, the required 0.7 V difference cannot be
established across any of the diodes. Therefore, both diodes are "off" and Vo = +10 V
as set by the 10 V supply connected to the 1 kΩ resistor
21. Determine Vo for the configuration of Fig. 2.162

Vo=5V −0.3 V

Vo=4.7 V

The Si diode requires more terminal voltage than the Ge diode to turn on. Therefore,
with 5 V at both input terminals, assume the Si diode is "off" and the Ge diode "on".
22. Assuming an ideal diode, plot vi, vd, and id for the half-wave rectifier of Fig.
2.163. The input is a sine waveform with a frequency of 60 Hz.

Vdc=0.318 Vm

Vdc
Vm=
0.318

2V
Vm= V
0.318

Vm=6.28 V

Vm
ℑ=
R

6.28
ℑ=
2.2 KΩ

ℑ=2.85 mA

23. Repeat problem 22 with a silicon diode (VK = 0.7 V)


24. Repeat Problem 22 with a 6.8 k load applied as shown in Figure 2.164. Plot vL and
iL.

25. For the network of figure 2.166; trace vo and determine Vcd

26.- For the network in figure 2.166, draw V 0 e I R

V 0=V 10k

V 10 k =0.7 V

V 0=0.7 V

−10+0.7 +1k I =0
−9.3+1 k I =0

1k I =9.3

9.3
I=
1k

I =9.3 m A

27.- a. Dadaist Pmax =14 mW For each of the diodes in Figure 2.167, determine the
maximum current ratings of each diode (using the approximate equivalent model).

b. Determine I max for V imax=160 V

c. Determine the current through each diode inV imax using the results of part (b)

d. If there is only one diode, determine the current through it and compare it to the
maximum ratings.

a)
¿ Pmax =14 mW = ( 0.7 V ) I D

14 mW
I D=
0.7 V

I D =20 mA

b)

4.7 k∗56 k
4.7 k + 56 k

¿ 4.34 k

V R=160 V −0.7 V
V R=159.3

159.3 V
I max=
4.34 k

I max=36.71mA

c)

I max
I diode =
2

I 36.71V
diode=¿ ¿
2

I diode=¿ 18.36mA ¿

29.- A full-wave rectifier in bridge configuration with a 120 V rms sinusoidal input has
a 1 k load resistor.

to. If silicon diodes are used, what is the voltage available at the load?

b. Determine the PIV rating of each diode.

c. Find the maximum current through each diode during conduction.

d. What is the required power rating of each diode?

to)

V M =❑√ 2 ( 120 V )=169.7 V

V i=V i −2V D

V i=169 V −2(0.7 V )

V i=168.3 V

V dc =0.636 (168.3 V )
V dc =107.4 V

b)

PIV =V i+V D

PIV =168.3 V + 0.7V

PIV =169 V

c)

Vi
I D (max )=
R

168.3V
I D (max )=
1k

I D (max )=168.3 mA

d)

Pmax =V D I D

Pmax =( 0.7 V ) ( 168.3 mA )

Pmax =117.81 mW

29. Determine vo and the nominal value of PIV for each of the diodes in the
configuration of Figure 2.168.

Positive negative

Vi−0 , 7+VR−0 ,7=0 Vo=−2Vo−Vi

Vi=−2Vo−Vo Vo=−100

VR=−Vi+1 , 4 PIV ≥Vm=100

VR=−Vi PIV on each diode


Vo=−100

PIV ≥Vm=100

PIV on each diode

30. Plot vo for the network of Fig. 2.169 and determine the available dc voltage.

Positive negative

2.2 K∗Vi 2.2 K∗Vi


Vo¿ =50V Vo= =50 V
2.2 K +2 , 2 K 2.2 K +2 , 2 K

VCD=0,318 ( 2 ) ¿EITHER)
VCD=31 , 8V

31. Plot vo for the network of Fig. 2.170 and determine the available dc voltage.

Positive

2.2 K (2 ,2 K )
2 , 2 K II 2, 2 K= =1, 1 K
2.2 K + 2, 2 K

Vi=2 ,2 ki+1 , 1 ki
Vi
I=
2 ,2 k +1 , 1 k

I =51 ,5 mA

V 1 ,1 k =( 51, 5 m ) (1 , 1 k )=56 ,67 V

V 2 ,2=113 , 33 V

Vo=V 2, 2=56 ,67 V

vcd

VCD=2 ( 0,318 ) 56 , 67

VCD=36 , 04

32. Determine Vo for each of the networks in Figure 2.171 with the input shown.

Silicon diode.

Analysis by positive half cycle

V O =V i
V O =0 V
Analysis by negative half cycle

V O −0.7 V +20 V =0
V O =0.7 V −20 V
V O =−19.3 V

ideal diode

Analysis by positive half cycle

V O =V i−5 V
V O =5V −5 V
V O =0 V

Analysis by negative half cycle

V O =V i−5 V
V O =−20 V −5 V
V O =−25 V
33. Determine Vo for each of the networks in Figure 2.172 with the input shown.

a) Figure a

Analysis by positive half cycle, we calculate by voltage dividers

1.2 kΩ ( 10 V −0.7 V )
V 0=
1.2 KΩ+2.2 KΩ

V 0=3.8V

Analysis by negative half cycle, diode open.


V O =V i
V O =0 V
b) Figure b

Analysis by positive half cycle


V O =V i+ 5V −0.7 V

V O =10V + 5V −0.7 V

V O =14.3V
Analysis by negative half cycle, diode open.

V O =V i
V O =0 V

34. Determine Vo for each of the networks in Figure 2.173 with the input shown.
a) Figure a

Positive half cycle analysis, ideal diode open.


V O =V i
V O =0 V
Analysis of negative half cycle, applying Kirchhoff's law of voltages.
−5 V +2 V −V O =0
V O =−3 V

b) Figure b

Positive half cycle analysis


V O =V i=20 V
V O =20 V

Negative half cycle analysis, ideal diode open but the output voltage is 5V.

V O =−V i=−5 V
V O =5V
35. DetermineV O for each of the networks in Figure 2.174 with the input shown

a) Figure a
Analyzing the positive half cycle
V O −0.7 V −4 V =0
V O =0.7 V +4 V
V O =4.7 V
Analyzing the negative half cycle
V O =V i
V O =8 V
Resulting Wave:
b) Figure b

Analyzing the positive half cycle


V O =V Si
V O =0.7

Analyzing the negative half cycle


I R =0
V r =I R∗R
V r =0 V

V O =V i−4 V
V i=0
V O =−4 V

V O + 4 V +8 V =0
V O =−12V
Resulting Wave:

36. Tracei R andV O for the network of Figure 2.175 with the input shown.
Analyzing the positive half cycle
V O −0.7 V −5.3 V =0
V O =0.7 V +5.3 V
V O =6 V

V R +0.7 V +5.3 V −10 V =0


V R=−0.7 V −5.3 V +10 V
V R=4 V

VR 4V
iR = = =0.4 mA
R 10 K Ω

Analyzing the negative half cycle


V O +0.7 V + 7.3V =0
V O =−0.7 V −7.3 V
V O =−8 V

V R−0.7 V −7.3 V +10V =0


V R=+0.7 V +7.3 V −10 V
V R=−2 V

V R −2 V
iR = = =−0.2 mA
R 10 K Ω

Resulting Wave:
BRAS
37. TraceV O for each of the Networks in the Figure. With the entry shown.

c) Figure a
Analyzing the negative half cycle
V i−V c −0.7 V =0
20−V c =0
−V c =−20+ 0.7
V c =19.3
V O =−0.7 V
Analyzing the positive half cycle
V O −V i−V c =0
V O =20 V + 19.3V
V O =39.3V
Resulting Wave:

d) Figure b

Analyzing the negative half cycle


V O +5 V +0.7 V =0
V O =−5.7 V
−V i +V c +5 V +0.7 V =0
V c =20 V −5V −0.7 V
V c =14.3 V

Analyzing the positive half cycle


V O −V i−V c =0
V O =20 V + 14.3V
V O =34.3V
Resulting Wave:

38. TraceV O for each of the networks in the following figure with the input shown.
Would it be a good approximation to consider the diode to be ideal in both
configurations? Because?

a)
Analyzing the negative half cycle

V O =−0.7 V

120 V −0.7 V −V c =0
V C =120 V −0.7 V
V c =119.3V

Analyzing the positive semi-cycle

120 V +V c −V O =0
V O =120V + V c
V O =239.3 V

Resulting wave:
Figure b)
Analyzing the positive semi-cycle

V O −0.7 V −20 V =0

V O =20.7 V

120 V −V O −V c =0
V C =120 V −V O
V c =99.3V

Analyzing the negative half-cycle

120 V +V c +V O=0
V O =−120 V −V c
V O =−219.3 V

Resulting wave:
It would be a good approximation to carry out the calculations using ideal
diodes since the values would only vary by 0.7V, which is the voltage at which
the silicon diode conducts.

39. For the network of figure 2.178 :

a) Calculate 5t.

b) Compare 5t with half the period of the applied signal.

c) TraceV O .

a) 5 t=5( R)(C)
5 t=(5)(50 K Ω)(0 , 1uF )
5 t=28 ms .
1 1
b) T = = =1 ms
f 1 KHz
T
5t≫
2
5t is much greater than half the period therefore it will be guaranteed that the
capacitor is charged throughout the period.

c) Analyzing the positive semi-cycle

V O −0.7 V +2 V =0

V O =0.7 V −2 V
V O =−1.3 V
10 V −V O −V c =0
V C =10 V −V O
V c =11.3V

Analyzing the negative half-cycle

10 V +V c +V O=0
V O =−V c −10 V
V O =−21.3 V

Resulting wave:

40. Design a fastener to perform the function indicated in Figure 2.179.


Will use aV i=20 V and an ideal diode as seen in the circuit to obtain the
required waveform.
41. Design a fastener to perform the function indicated in Figure 2.180
C3

3.5uF

D3 R3
3.8k
1N4001

BAT3
2V

47. Determine the voltage available with the voltage doubler of Figure 2.118 if the
secondary voltage of the transformer is 120 vrms

Vm=120 vrms

Vm=❑√ 2*120

vm=169.28 v

Vc−vm−Vm=0

Vc=2 Vm

vc=339.4 v

48. Determine the required PIV ratings of the diodes in Figure 2.118 as a function of
the peak value of the secondary voltage Vm
The PIV for each diode is 2Vm

PIV =2(1.414)(Vrms)

PIV =2.828Vrms

Common questions

Powered by AI

In a voltage doubler circuit, the PIV for each diode is determined based on the peak secondary voltage of the transformer. Explicitly, the PIV rating is calculated as twice the peak secondary voltage (PIV = 2Vm), where Vm is 1.414 times the rms voltage when a sine wave input is considered, ensuring diode protection during reverse bias states. This is crucial to prevent breakdown due to voltage over-stress . Proper PIV rating ensures reliability and prevents failures in the voltage doubling process, maintaining circuit function and safety.

The ideal diode model, which assumes no forward voltage drop, can effectively approximate real-world diode behavior when the voltage across the diode is significantly larger than the forward voltage drop, thus rendering the drop negligible . This model is valid under conditions of high supply voltages relative to the diode's threshold voltage or when the precise voltage drop is not crucial to the analysis outcome . Its use simplifies the analysis, particularly in educational contexts or preliminary design stages.

Diode performance characteristics, such as forward voltage drop and operating condition (on/off), impact output voltages (Vo) in circuit networks significantly. For instance, in figure 2.155, with a silicon diode, Vo is influenced by the diode's forward voltage of 0.7V . Under certain conditions, voltage equations incorporate these drops, adjusting Vo as calculated from source voltages and resistances. Additionally, diode 'on' or 'off' states, driven by input conditions and load, alter how networks manage voltage division, thereby determining specific output levels such as in rectifier circuits where forward drops cause a notable shift in Vo from the peak input.

In a full-wave rectifier, changes in load resistance impact both output voltage and diode stress levels. As load resistance decreases, more current passes through, potentially reducing the voltage across the load and increasing the stress on diodes due to higher current demand during conduction . Conversely, increasing load resistance raises output voltage closer to the peak input, reducing diode strain. The balance between load resistance and these parameters is crucial for optimal rectifier performance and diode longevity.

In RC diode circuits, capacitor charging time, characterized by the time constant 5t, must be well synchronized with the period of an applied signal. If 5t is significantly greater than half the signal's period, the capacitor charges fully, ensuring a stable output voltage but potentially slower transient response . This impacts the circuit's performance by influencing frequency response and voltage smoothing; small 5t relative to the period may cause voltage ripple, while larger 5t leads to better stability at the cost of speed. Proper design tuning is essential to balance these trade-offs for optimized circuit performance.

Germanium diodes have lower forward voltage drops (~0.3V) compared to silicon diodes (~0.7V), which can be advantageous in high-frequency applications where efficiency and speed are crucial due to the lower energy required for transition between on and off states . However, silicon diodes offer better thermal stability, higher peak reverse voltages, and improved current capacity, making them suitable in scenarios needing robustness against thermal and electrical stresses. The choice depends on the specific priorities of frequency, efficiency, and environmental robustness in the application.

In negative logic gate configurations, diode forward voltages significantly determine the logic output voltage. For example, a negative logic OR gate input impacts the output voltage by subtracting the diode's forward voltage (0.7V for silicon) from applied voltages, ensuring logic level translation while maintaining functionality . These voltage levels are significant as they ensure proper logic state representation, maintain signal integrity, and ensure expected low or high output levels depending on gate design and component characteristics, which are critical in digital circuits for accurate logic operation.

To calculate the resistance required to achieve a specific diode current, the diode's forward voltage drop must be taken into account. For a circuit with a 7V source and 10mA current through the diode, the operating point on the load line (when VD = 0.7V for the diode) shows ID = 11.2mA with R calculated as 0.625 kΩ . The load line analysis, crossing point, and forward voltage drop directly influence the determination of resistance for the desired current.

Using the actual diode characteristics, VD is found to be 0.92V and the resulting VR is 7.08V with ID at 24.24mA . The approximate diode model sets VD at 0.7V, giving VR a value of 7.3V . In the ideal diode model, VD is assumed to be 0V, leading to a voltage of 8V across the resistor . The ideal diode model simplifies analysis by ignoring the forward voltage drop, while the approximate diode model offers a balance between simplicity and accuracy, closely matching the actual diode behavior under certain conditions.

Different resistor values in a diode circuit significantly affect the diode voltage and current. For instance, with R = 2.2 kΩ, the diode voltage VD is 0.7V leading to an ID of 2mA . When R is changed to 0.47 kΩ, VD becomes 0.8V with ID increasing to 9mA . With R at 0.18 kΩ, VD rises to 0.93V and ID reaches 22.5mA . These variations illustrate the inverse relationship between resistance and current, as a decrease in resistance leads to a higher diode current and voltage drop.

1. a. Using the characteristics of Figure 2.147, determine ID, VD, and VR for the 
circuit of Figure 2.147a.
 b. Repeat part
b. Repeat part (a) with R = 0.47 k
 c. Repeat part (a) with R = 0.18 k
 d. Is the VD level relatively close to 0.7 V in each
b)   
VD=5V ID=E
R
ID=
5V
0.47 kΩ
ID=10.64mA
According to the graph in figure b) the current is 9mA and the voltage is 0.8V
c
Figure a. Circuit 
Figure b. Diode characteristics   
Data:
E=7V
Corriente enel diodo I D1=10mA
R=?[Ohms]
Solution:
10mA cara
Figure c. Trace of the load line and the operating point    
A=(0.7,10)B=(7 ,0)
m=−1.6
Ec. Rectade cargaID=−1.6 (VD)+11.2
Ec.
a) I D=I R
L.V . K
−30V +0.7V +I R R=0
I R= 29.3V
2.2[KΩ]=13.318[mA ]
V D=0.7[V ] 
V R=I R∗R
V R=(13.318 [mA ])∗(2.2 [KΩ])
V
to)
 I=0mA  (Reverse biased diode)
b)
V 20Ω=20V −0.7V=19.3V  (LVK)
I=19.3V
20Ω =0.965 A
c)
I=10V
10Ω =1 A
6. DetermineV o and
to)
V o=2 K Ω (20V −0.7V−0.3V )
2K Ω+2K Ω
¿ 1
2
(20V−1V )=1
2
(19V )=9.5V
b)
I=
(10V +2V −0.7V )
1.2 K Ω+4.7 K Ω = 11.3V
5.9
Id=22V−0.7V
2.2k+1.2k
Id=6.26mA
Vo=Id .R
Vo=(6.26 mA)(1.2k)
Vo=7.51V
b)
Id=20V +5V−0.7V
6.8k
Id=3.58 mA
Vo−0.7V +5V=0
Vo=−4.3
9. Determine Vo1 and Vo2 for the networks in Figure 2.154.
a)
Vo1=12V−0.7V
Vo1=11.3V
Vo2=0.3V
b)
Vo1=−10V +0.3V +0.7V
Vo1=−9V

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