LEARNING MATERIAL II

Transistor: Bipolar Junction

Transistor and Field Effect
Transistor

Lesson 1 Introduction

Lesson 2 Transistor Biasing,

Transistor Circuits

Lesson 3 Basic Transistor

Application: amplifier,
switch

Lesson 4 Digital Circuits of

Transistor

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LEARNING MATERIAL II

INTRODUCTION

 INTRODUCTION

If we now join together two individual signal diodes back-to-back, this

will give us two PN-junctions connected together in series that share a
common P or N terminal. The fusion of these two diodes produces a three
layer, two junction, three terminal device forming the basis of a Bipolar
Junction Transistor, or BJT for short.

Transistors are three terminal active devices made from different

semiconductor materials that can act as either an insulator or a conductor by
the application of a small signal voltage. The transistor’s ability to change
between these two states enables it to have two basic functions: “switching”
(digital electronics) or “amplification” (analogue electronics).

OBJECTIVES

After studying the module, you should be able to:

1. Discuss the construction and operation of a transistor.

2. Solve unknown parameters in a transistor circuit.
3. Use biasing technique in the operation of a transistor.
4. Evaluate what type of logic gate is formed using transistor in a circuit.

 DIRECTIONS/ MODULE ORGANIZER

There are four lessons in the module. Read each lesson carefully then
answer the exercises/activities to find out how much you have benefited from
it. Work on these exercises carefully and submit your output to your instructor
through google classroom.

In case you encounter difficulty, contact your instructor.

Good luck and happy reading!!!

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Lesson 1

 INTRODUCTION

The transistor was invented by Dr. William Shockley and Dr. John Bardeen at
Bell Laboratory in America in 1951. First time, in 1952 transistor was used in
telephone switching circuits. Since then, it has revolutionized the field of
electronics. The transistor has helped the bulky vacuum tubes in most of the
electronic circuits. The transistor is a basic building block of all modern
electronic systems. It is a three terminal device. The output voltage, current
or power are controlled by the input current in a transistor. Therefore, it is
also called current-controlled device. In short, it is also called BJT. BJT stands
for Bipolar Junction Transistor because the transistor operation is carried out
by two types of charge carriers: majority carriers and minority carriers.

A transistor has a very important property that it can raise the strength of an
input weak signal. This property is called Amplification. Due to this quality,
the transistor is one of the most widely used semiconductor devices.

At present, transistor is used in almost every field of electronics.

Few applications are:
1. Transistor is used in control systems.
2. Transistor is used in satellites and mobile phones.
3. In digital computer electronics, the transistor is used a a high-speed
electronic switch.
4. In communication systems, it is widely used as the primary component
in amplifier.

BIPOLAR JUNCTION TRANSISTOR (BJT)

CONSTRUCTION
A transistor is a single crystal of silicon (Si) or Germanium (Ge). A transistor
can be of two types: NPN or PNP. A transistor consists of two PN junctions.
The junctions are formed by sandwiching either P-type or N-type
semiconductor layers between a pair of opposite types as shown in figures
1(a) and (b).

(a) (b)

Fig. 1. (a) NPN transistor, (b) PNP transistor

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A transistor has three regions. They are emitter, base and collector.
1. Emitter: It is an outer region situated in one side of transistor. The
function of emitter is to inject charge carriers (electrons in case of
NPN transistor and holes in cse of PNP transistors) into the base. Since
emitter has to supply large number of charge carriers, so it is heavily
doped “More doping, more will be available charge carriers.”
2. Base: It is the middle region of the transistor. The base is a very thin
and lightly doped region. The function of this region is to pass all the
charge carriers (electrons or holes) onto the collector.
3. Collector: It is the other outer region situated in the other side of the
transistor. The doping of the collector is between the heavy doping of
emitter and lightly doping of base. The function of the collector is to
collect charge carriers (electrons or holes). The collector region is
physically larger than the emitter region. The reason for this is that
the collector has to dissipate more heat. Hence, it is clear that
although a BJT has two same type of outer regions, their function
cannot be interchanged.

A transistor has two PN-junctions. One junction is formed between the

emitter and the base. This is known as emitter-base junction. Another
junction is formed between the base and the collector. This is known as
collector-base junction.

TRANSISTOR SYMBOLS
There are two types of transistors known as NPN and PNP. When the transistor
is used as a circuit element in any electronic circuit, it is always represented
by its own symbol as shown in Fig. 2. (a) and (b). Also, the direction of
currents IE, IC, and IB are indicated.

(a) (b)

Fig. 2. (a) Symbol of NPN transistor, (b) Symbol of PNP transistor

Fig. 2 (a) represents the symbol for NPN transistors. The emitter has an
arrowhead. The arrowhead indicates the direction of a conventional current
flow in a transistor. The arrowhead points from the P-region towards the N-
region. Therefore, in an NPN transistor, the conventional current will flow
from the base to emitter.

Fig. 2 (b) shows the symbol for PNP transistor. The arrowhead in the emitter
points from the P-region towards the N-region. Therefore, in PNP transistor,
the conventional current will flow from emitter to the base.

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The PNP is a complement of the NPN transistor. Hence, in NPN transistor, the
majority carriers are free electrons but in PNP transistor, majority carriers
are holes. The currents and voltages involved in the action of PNP transistor
are opposite to those of NPN transistor.

Out of these two types of transistor, the NPN transistor is mostly used. The
reason for this is that in NPN transistors, the current conduction is mainly by
electronic whereas in PNP transistors the current conduction is mainly by
holes. Since the electrons are more mobile than holes, the conduction is
higher in NPN transistors than PNP transistors.

BJT is a bipolar device where conduction is carried out by both charge carriers
i.e. electrons and holes. The number of electrons diffused in the base region
is more the number of holes diffused in emitter region. Electrons behave as a
minority carrier in the base region.
Under normal conditions, when the emitter-base junction is forward biased it
allows the current to flow from emitter to collector. When a voltage is applied
at the base terminal, it gets biased and draws current, which directly affects
the current at the other terminals.
BJT is called a current controlled device where small current at the base side
is used to control the large current at other terminals. All three terminals of
the BJT are different in terms of their doping concentrations. The emitter is
highly doped as compared to base and collector.

Fig. 3 Bipolar junction Transistor

The collector is moderately doped and its area is larger as compared to

emitter area, allowing it to handle more power.
When a voltage is applied, the majority of electrons from emitter are diffused
into the base where these electrons act as minority charge carriers, making
the holes in the base region majority charge carriers.
As the base is very thin and lightly doped it cannot hold the number of
electrons for too much time, allowing the electrons to diffuse from base to
collector.

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Making a slight change at the voltage applied at the base-emitter terminals

can cause a significant change at the current between emitter and collector
terminals. This is the process used for amplification purpose.
When the emitter-base junction is not forward biased the amount of current
at the base and collector terminal is zero, no matter how much voltage is
applied at the base terminal.
Common-Emitter current gain is a term mostly used for BJTs. It is a ratio
between collector current and base current. Similarly, a common-base
current gain is defined as a ratio between collector current and emitter
current. Most of the time its value is taken as unity.
Construction of BJT is not symmetrical in nature. The lack of symmetry of
BJTs is due to the difference in doping concentration between the terminals.
The mode of operation where an emitter-base junction is forward biased and
the collector-base junction is reverse biased is called active region.

Types of BJT

BJTs are divided into two types based on the nature and construction of the
transistor. Following are two main types of the BJT.

NPN

• NPN (negative-positive-negative) is a type of

BJT where a P-doped layer of semiconductor
exists between the two layers of N doped
material.
• The P doped region represents the base of the
transistors while other two layers represent
emitter and collector respectively.
Fig. 4 NPN

• NPN transistors are also called minority carrier devices because minority
charge carriers at the base side are used to control large current at other
terminals of the transistor.
• The current moves from an emitter to the collector where electrons act as
a minority carrier at the base side.

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Fig 5. NPN Symbol

PNP
• PNP (positive-negative-positive) transistor is a type of BJT where N doped
semiconductor layer which acts as a base, is housed between the two layers
of P doped material.
• The base uses small base current and negative base voltage to control large
current at the emitter and collector side and voltage at the collector side
is larger than the voltage at the base side.
• In PNP transistor current direction and voltage polarities are reversed as
compared to NPN transistors.

Fig. 6. PNP
• PNP transistors work in a similar way like NPN transistor with some
exception i.e. holes are diffused through the base from an emitter and are
collected by the collector.

Fig. 7. PNP Symbol

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Regions of Operations of BJT

Bipolar junction transistors come with different regions of operation. These

modes of operations set a tone for current flowing from emitter to collector.

Forward Active Mode

• BJT comes with two junctions called emitter-base junction and collector-
base junction. Emitter-base junction is forward biased and the collector-
base junction is reverse biased.
• For amplification purpose, most of the transistors come with high common
emitter current gain which shows the exact current and power gain
required for amplification purpose.
• The collector-emitter current is largely dependent on the base current
where small current at the base side is used to control the large current at
the emitter and collector side.
Reverse Active Mode
• By interchanging the emitter and collector, transistor goes from active
mode to reverse active mode.
• Most of the transistors are designed to afford high current gain, but
reversing the role of emitter and collector makes the current gain very
small as compared to forward biased region. This type of mode is rarely
used unless a failsafe condition is required.
Saturation
• BJT exhibits saturation mode when both junctions are forward biased. This
mode of operation is referred as a closed circuit which allows a large
amount of current flowing from emitter to collector side.
Cut-off
• When the emitter-base junction is not forward biased, the transistor is said
to have in the cut-off region where collector current and base current will
be zero, no matter how much voltage is applied at the base terminal.

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Three Basic Configurations of BJT

BJT is a current controlled device which is mainly used for amplification and
switching purpose. There are three ways to connect this device with external
electronic circuits called:

1. Common Base Configuration

2. Common Collector Configuration
3. Common Emitter Configuration
The nature of the current being controlled at the output is different for
different configurations.

Common Base Configuration

• Common base configuration is a configuration where the common base is
shared between input and output signal.
• Voltage is applied at the emitter-base junction and corresponding output
signal is obtained at the output across the base-collector junction.
• The base voltage is connected to some reference voltage or can be
grounded in some cases with the intention of making common base
between input and output signals.
• Following figure shows the circuit diagram of common base configuration.

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Fig. 8. Common Base Configuration

• Current at the emitter side is quite large, where electrons are diffused into
the base terminal. These electrons make a pair with some holes present in
the base, while most of them leave the base and are collected by the
collector.
• This type of transistor comes with remarkable high voltage characteristics
which don’t make it an ideal choice for many applications. In this
configuration, an output and input voltage is in line with each other. The
input characteristics of this transistor are quite identical to forward biased
diode while output characteristics are similar to a regular diode and come
with a high output to input resistance ratio.
• Common base current gain is a very important factor used in this
configuration which is a ratio between collector current and emitter
current. It is denoted by α alpha.
I
= C
IE
• The alpha value ranges between 0.95 to 0.99, however, most of the time
its value is taken as unity. High-frequency response of common base
configuration makes it an ideal choice for single stage amplifier.
Common Collector Configuration
• This configuration is also known as voltage follower where the input is
applied at the base terminal and output is taken from emitter terminal.
• This configuration is mainly used for impedance matching as the input
impedance of this configuration is very high while output impedance is very
low.
• Common collector configuration is termed as non-inverting amplifier where
output signal and an input signal are in phase with each other.
• The current gain of this transistor is very large because the load resistance
is at the receiving end of both collector current and base current, making
it a suitable for amplification purpose.
• Hence very little voltage gain, around unity, can help in producing very
large current gain.

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• Following figure shows the circuit diagram of common collector

configuration.

Fig. 9. Common Collector Configuration

Common Emitter Configuration

• This configuration is widely used in transistor based amplifier, where an
input signal is applied between emitter and base while the output is taken
from emitter and collector.
• This configuration comes with highest current and power gain which makes
it an ideal choice for amplification. Input impedance is connected to
forward biased PN junction which shows low value while output impedance
is connected to reverse biased PN junction which shows high value.
• Most of the transistors generally come with common emitter
configuration because this exhibits the ideal power and current required
for amplification purpose.
• Common emitter configuration is termed as inverting amplifier circuit
where an input signal is out-of-phase with the output signal.
• Following figure shows the circuit diagram of common emitter
configuration.

Fig. 10. Common Emitter Configuration

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• The common emitter current gain of this transistor is very large as

compared to a current gain of common base configuration which is a ratio
between collector current and base current. It is denoted by β beta which
is the measure of current being amplified.
I
= C
IB
• Output current at the collector and emitter side is highly dependent on the
current at the base side.
• Current at the emitter side is the sum of current at the base and collector
side because emitter side is highly doped as compared to base and
collector.
I E = I B + IC
• When the voltage is applied at the base terminal it triggers the electrons
reaction which forces the electrons to move towards the collector side.
• Any small change at the voltage applied at the base terminal results in a
very large change at the current obtained at the collector side.

Pros of BJTs

• Bipolar junction transistor comes with a large amplification factor.

• This type of transistor provides a better voltage gain.
• This transistor comes with a capability of operating in 3 regions i.e active
region, saturation and cut-off region.
• BJT provides a better response at higher frequencies.
• BJTs also act as a switch.

Cons of BJTs

• BJT is very sensitive to heat and produces noise is some cases.

• The switching power of BJTs is very low as compared to unipolar transistors
like FETs.

Applications

• BJTs come with two major applications called amplification and switching.
• They are the building blocks of most of the electronic circuits, especially
where audio, current or voltage amplification is required.
NPN transistors are preferred over PNP transistors for amplification purpose
because conduction carried out through mobility of electrons is better than
conduction through mobility of holes.

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FIELD EFFECT TRANSISTOR (FET)

We have already discussed Bipolar Junction Transistor (BJT). Another type of
transistor is the Field Effect Transistor. The field-effect transistor (FET) is a
three-terminal device used for a variety of applications that match, to a large
extent, those of the BJT transistor. Although there are important differences
between the two types of devices, there are also many similarities that will
be pointed out. The primary difference between the two types of transistors
is the fact that the BJT transistor is a current-controlled device while the FET
transistor is a voltage-controlled device.

(a) (b)
Fig. 11. (a) Current-controlled, (b) Voltage-controlled amplifiers

The current Ic in Fig. 11a is a direct function of the level of I B. For the FET in
Fig 11b, the current ID is a function of the voltage VGS applied to the circuit.

Just as there are npn and pnp bipolar transistors, there are n-channel and p-
channel field-effect transistors. However, it is important to keep in mind that
the BJT transistor is a bipolar device—the prefix bi- revealing that the
conduction level is a function of two charge carriers, electrons and holes. The
FET is a unipolar device depending solely on either electron (n-channel) or
hole (p-channel) conduction.

For the FET an electric field is established by the charges present that will
control the conduction path of the output circuit without the need for direct
contact between the controlling and controlled quantities.

JUNCTION FIELD EFFECT TRANSISTOR (JFET)

A JFET is a type of FET, a three-terminal device with one terminal capable of
controlling the current between the other two. In our discussion of the BJT
transistor, the npn transistor was employed through the major part of the
analysis and design sections. For the JFET transistor, the n-channel device
will appear as the prominent device. Majority of the discussions will
concentrate on n-channel JFET.

Fig. 12. Junction Field Effect Transistor

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The basic construction of the n-channel JFET is shown in Fig. 12. Note that
the major part of the structure is the n-type material that forms the channel
between the embedded layers of p-type material. The top of the n-type
channel is connected through an ohmic contact to a terminal referred to as
the drain (D), while the lower end of the same material is connected through
an ohmic contact to a terminal referred to as the source (S). The two p-type
materials are connected together and to the gate (G) terminal. In essence,
therefore, the drain and source are connected to the ends of the n-type
channel and the gate to the two layers of p-type material. In the absence of
any applied potentials the JFET has two p-n junctions under no-bias
conditions. The result is a depletion region at each junction as shown in Fig.
12 that resembles the same region of a diode under no-bias conditions.

Analogies are seldom perfect and at times can be misleading, but the water
analogy of Fig. 13 does provide a sense for the JFET control at the gate
terminal. The source of water pressure can be likened to the applied voltage
from drain to source that will establish a flow of water (electrons) from the
spigot (source). The “gate,” through an applied signal (potential), controls
the flow of water (charge) to the “drain.” The drain and source terminals are
at opposite ends of the n-channel as introduced in Fig. 12.

Fig. 13. Water analogy for the JFET

In Fig. 14, a positive voltage VDS has been applied across the channel and the
gate has been connected directly to the source to establish the condition
VGS=0 V. The result is a gate and source terminal at the same potential and a
depletion region in the low end of each p-material similar to the distribution
of the no-bias conditions of Fig. 12. The instant the voltage V DD (= VDS) is
applied, the electrons will be drawn to the drain terminal, establishing the
conventional current ID with the defined direction of Fig. 14. The path of
charge flow clearly reveals that the drain and source currents are equal (ID =
IS). Under the conditions appearing in Fig. 5.4, the flow of charge is relatively
unrestrained and limited solely by the resistance of the n-channel between
drain and source.

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Fig. 14. JFET in the VGS = 0 V and VDS >0 V

It is important to note that the depletion region is wider near the top of both
p-type or n-type materials. The reason for the change in width of the region
is best described through the help of Fig. 15. Assuming a uniform resistance
in the n-channel, the resistance of the channel can be broken down to the
divisions appearing in the figure. The current ID will establish the voltage
levels through the channel as indicated on the same figure. The result is that
the upper region of the p-type material will be reverse-biased by about 1.5
V, with the lower region only reverse-biased by 0.5 V. Recall from the
discussion of the diode operation that the greater the applied reverse bias,
the wider the depletion region—hence the distribution of the depletion region
as shown in Fig. 15. The fact that the p-n junction is reverse-biased for the
length of the channel results in a gate current of zero amperes as shown in
the same figure. The fact that I G = 0 A is an important characteristic of the
JFET.

Fig. 15. Varying reverse-bias potentials across the p-n junction of an n-

channel JFET

As the voltage VDS is increased from 0 to a few volts, the current will increase
as determined by Ohm’s law and the plot of ID versus VDS will appear as shown
in Fig. 16. The relative straightness of the plot reveals that for the region of
low values of VDS, the resistance is essentially constant. As V DS increases and
approaches a level referred to as VP in Fig. 16, the depletion regions of Fig.
14 will widen, causing a noticeable reduction in the channel width. The
reduced path of conduction causes the resistance to increase and the curve
in the graph of Fig. 16 to occur. The more horizontal the curve, the higher
the resistance, suggesting that the resistance is approaching “infinite” ohms

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in the horizontal region. If VDS is increased to a level where it appears that

the two depletion regions would “touch” as shown in Fig. 17, a condition
referred to as pinch-off will result. The level of VDS that establishes this
condition is referred to as the pinch-off voltage and is denoted by VP as shown
in Fig. 6.

Fig. 16. ID versus VDS for VG = 0 V

Fig. 17. Pinch-off (VGS = 0 V, VDS = VP)

SYMBOLS
The graphic symbols for the n-channel and p-channel JFETs are provided in
Fig. 18. Note that the arrow is pointing in for the n-channel device of Fig.
5.18a to represent the direction in which IG would flow if the p-n junction
were forward-biased. For the p-channel device (Fig. 18b) the only difference
in the symbol is the direction of the arrow.

Fig. 18. JFET Symbols (a) n-channel, (b) p-channel

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Lesson 2

 Transistor Biasing, Transistor

Circuits

BIASING BIPOLAR JUNCTION TRANSISTOR

Biasing is an all-inclusive term for the application of dc voltages to

establish a fixed level of current and voltage. For the transistor amplifiers the
resulting dc current and voltage establish an operating point on the
characteristics that define the region that will be employed for amplification
of the applied signal. Since the operating point is a fixed point on the
characteristics, it is also called the quiescent point (abbreviated Q-point). By
definition, quiescent means quiet, still, inactive. Figure 4.1 shows a general
output device characteristic with four operating points indicated. The biasing
circuit can be designed to set the device operation at any of these points or
others within the active region.
Although a number of networks are analyzed in this chapter, there is
an underlying similarity between the analysis of each configuration due to the
recurring use of the following important basic relationships for a transistor:

The BJT device could be biased to operate outside these maximum

limits, but the result of such operation would be either a considerable
shortening of the lifetime of the device or destruction of the device. Confining
ourselves to the active region, one can select many different operating areas
or points. The chosen Q-point often depends on the intended use of the
circuit. Still, we can consider some differences among the various points
shown in Fig. 4.1 to present some basic ideas about the operating point and,
thereby, the bias circuit.

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For the BJT to be biased in its linear or active operating region the following
must be true:
1. The base–emitter junction must be forward-biased (p-region voltage
more positive), with a resulting forward-bias voltage of about 0.6 to
0.7 V.
2. The base–collector junction must be reverse-biased (n-region more
positive), with the reverse-bias voltage being any value within the
maximum limits of the device.

Operation in the cutoff, saturation, and linear regions of the BJT

characteristic are
provided as follows:
1. Linear-region operation:
Base–emitter junction forward biased
Base–collector junction reverse biased

2. Cutoff-region operation:
Base–emitter junction reverse biased

3. Saturation-region operation:
Base–emitter junction forward biased
Base–collector junction forward biased

We shall be discussing three biasing techniques namely: Fixed Bias, Emitter-

stabilized Bias Circuit, and Voltage Divider Bias Circuit.

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FIXED BIAS

The fixed-bias circuit of Fig. 4.2 provides a relatively straightforward

and simple introduction to transistor dc bias analysis. Even though the
network employs an npn transistor, the equations and calculations apply
equally well to a pnp transistor configuration merely by changing all current
directions and voltage polarities. The current directions of Fig. 4.2 are the
actual current directions, and the voltages are defined by the standard
double-subscript notation. For the dc analysis the network can be isolated
from the indicated ac levels by replacing the capacitors with an open circuit
equivalent. In addition, the dc supply VCC can be separated into two supplies
(for analysis purposes only) as shown in Fig. 4.3 to permit a separation of
input and output circuits.

Forward Bias of Base-Emitter

Consider first the base–emitter circuit loop of Fig. 4.3. Writing Kirchhoff’s
voltage equation in the clockwise direction for the loop, we obtain

+ VCC − I B RB − VBE = 0

Note the polarity of the voltage drop across RB as established by the indicated
direction of IB. Solving the equation for the current IB will result in the
following:

+ VCC − VBE
IB = (4.4)
RB

Equation (4.4) is certainly not a difficult one to remember if one simply

keeps in mind that the base current is the current through RB and by Ohm’s
law that current is the voltage across RB divided by the resistance RB. The
voltage across RB is the applied voltage VCC at one end less the drop across
the base-to-emitter junction (VBE).

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Consider first the base–emitter circuit loop of Fig. 4.4. Writing Kirchhoff’s
voltage equation in the clockwise direction for the loop, we obtain
V − VBE
I B = CC (4.4)
RB

The collector–emitter section of the network appears in Fig. 4.5 with the
indicated direction of current IC and the resulting polarity across RB. The
magnitude of the collector current is related directly to IB through

I C = I B (4.5)
It is interesting to note that since the base current is controlled by the level
of RB and IC is related to IB by a constant β, the magnitude of IC is not a
function of the resistance RC. Change RC to any level and it will not affect the
level of IB or IC as long as we remain in the active region of the device.
However, as we shall see, the level of RC will determine the magnitude of VCE,
which is an important parameter. Applying Kirchhoff’s voltage law in the
clockwise direction around the indicated closed loop of Fig. 4.5 will result in
the following:
VCE + I C RC − VCC = 0
And
VCE = VCC − I C RC (4.6)

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which states in words that the voltage across the collector–emitter region of
a transistor in the fixed-bias configuration is the supply voltage less the drop
across RC. As a brief review of single- and double-subscript notation recall
that

VCE = VC − VE (4.7)

where VCE is the voltage from collector to emitter and VC and VE are the
voltages from collector and emitter to ground respectively. But in this case,
since VE = 0 V, we have

VCE = VC (4.8)
In addition, since
VBE = VB − VE (4.9)

And VE = 0, then

VBE = VB (4.10)

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EMITTER-STABILIZED BIAS CIRCUIT

The analysis will be performed by first examining the base–emitter

loop and then using the results to investigate the collector–emitter loop.
The Network of Fig. 4.17 can be redrawn as shown in Fig. 4.18.

Writing Kirchhoff’s voltage law around the indicated loop in clockwise

direction results I the following equations:

+ VCC − I B RB − VBE − I E RE = 0 (4.15)

Recall that

I E = ( + 1) I B (4.16)

Substituting for I E in Eq. (4.15) results in

+ VCC − I B RB − VBE − (  + 1) I B RE = 0

Solving I B gives

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VCC − VBE
IB =
RB + (  + 1) RE

COLLECTOR-EMITTER LOOP

The collector-emitter loop is redrawn in Fig. 4.21. Writing Kirchhoff’s voltage

law for the indicated loop in thee clockwise direction results in

+ I E RE + VCE + I C RC − VCC = 0

Substituting I E  I C and grouping terms gives

VCE = VCC − I C ( RC + RE ) (4.19)

The single-subscript voltage VE is the voltage from emitter to the ground and
is determined by

VE = I E RE (4.20)

Whereas the voltage from collector to ground can be determined from

VCE = VC − VE

And VC = VCE + VE (4.21)

Or VC = VCC − I C RC (4.22)

The voltage at the base with respect to ground can be determined from

VB = VCC − I B RB (4.23)

Or VB = VBE + VE (4.24)

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Solution:

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VOLTAGE DIVIDER BIAS CIRCUIT

In the previous bias configurations, the bias current ICQ and voltage
VCEQ were a function of the current gain (  ) of the transistor. However,
since  is temperature sensitive, especially for silicon transistors, and the
actual value of beta is usually not well defined, it would be desirable to
develop a bias circuit that is less dependent, or in fact, independent of the
transistor beta. The voltage-divider bias configuration is such a network.

There are two methods that can be applied to analyze the voltage-divider
configuration. The first to be demonstrated is the exact method that can be
applied to any voltage-divider configuration. The second is referred to as the
approximate method and can be applied only if specific conditions are
satisfied.

EXACT ANALYSIS
The input side of the network of Fig. 4.25 can be redrawn as shown in Fig.
4.27 for the dc analysis. The Thévenin equivalent network for the network to
the left of the base terminal can then be found in the following manner:

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RTh: The voltage source is replaced by a short-circuit equivalent as shown in

Fig. 4.28.

RTH = R1 || R2 (4.28)

ETh: The voltage source VCC is returned to the network and the open-circuit
Thévenin voltage of Fig. 4.29 determined as follows:

Applying the voltage-divider rule:

R2VCC
ETH = VR 2 = (4.29)
R1 + R2

The Thévenin network is then redrawn as shown in Fig. 4.30, and IBQ can be
determined by first applying Kirchhoff’s voltage law in the clockwise direction
for the loop indicated:

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ETH − I B RTH − VBE − I E RE = 0

Substituting IE = ( + 1) I B and solving for I B yields

ETH − VBE
IB = (4.30)
RTH + (  + 1) RE

Once IB is known, the remaining quantities of the network can be found in the
same manner as developed for the emitter-bias configuration. That is,

VCE = VCC − I C ( RC + RE ) (4.31)

The remaining equations for VE, VC, and VB are also the same as obtained for
the emitter-bias configuration.

Example 4.7. Determine the dc bias voltage VCE and the current IC for the
voltage-divider configuration of Fig. 4.31.

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Solution:

APPROXIMATE ANALYSIS
The input section of the voltage-divider configuration can be represented by
the network of Fig. 4.32. The resistance Ri is the equivalent resistance
between base and ground for the transistor with an emitter resistor RE. the
reflected resistance between base and emitter is defined by Ri = ( + 1) RE . If
Ri is much larger than the resistance R2, the current IB will be much smaller
than I2 (current always seeks the path of least resistance) and I2 will be
approximately equal to I1. If we accept the approximation that IB is essentially
zero amperes compared to I1 or I2, then I1 = I2 and R1 and R2 can be considered
series elements. The voltage across R2, which is actually the base voltage,
can be determined using the voltage-divider rule (hence the name for the
configuration). That is,

R2VCC
VB = (4.32)
R1 + R2
Since Ri = ( + 1) RE  RE the condition that will define whether the
approximate approach can be applied will be the following:

RE  10R2 (4.33)

In other words, if the above condition (Eq. 4.33) is satisfied, the approximate
approach will be used. If not, use the exact analysis.

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Once VB is determined, the level of VE can be calculated from

VE = VB − VBE (4.34)

and the emitter current can be determined from

VE
IE = (4.35)
RE

And

I CQ  I E (4.36)

The collector-to-emitter voltage is determined by

VCE = VCC − I C RC − I E RE

But since I E  I C ,

VCEQ = VCC − I C ( RC + RE ) (4.37)

Note in the sequence of calculations from Eq. (4.33) through Eq. (4.37) that
 does not appear and IB was not calculated. The Q-point (as determined by
ICQ and VCEQ) is therefore independent of the value of  .

Example 4.8. Repeat the analysis of Fig. 4.31. using the approximate
technique, and compare solutions for I C and VCEQ.

Solution:

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IMPORTANT: There are two methods to analyze a voltage-divider bias circuit:

the exact and the approximate analysis. But we shall only use one whichever
is applicable using RE  10R2 . If this condition is satisfied, we use the
approximate analysis. Otherwise, use exact analysis.

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BIASING FIELD EFFECT TRANSISTOR

The general relationship that can be applied to the dc analysis of all FET
amplifiers are

IG  0A (6.1)
and

ID = IS (6.2)

Shockley’s equation is applied to relate the input and output quantities:

2
 1 − VGS 
I D = I DSS   (6.3)
 VP 

We shall consider three FET biasing techniques: fixed bias configuration, self-
bias, and voltage-divider bias.

FIXED BIAS CONFIGURATION

The simplest of biasing arrangements for the n-channel JFET appears in Fig.
6.1. Referred to as the fixed-bias configuration, it is one of the few FET
configurations that can be solved just as directly using either a mathematical
or graphical approach.

For dc analysis,

IG  0A

VRG = I G RG = (0 A) RG = 0V

The zero-volt drop across RG permits replacing RG by a short circuit

equivalent, as appearing in network of Fig. 7.2.

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The fact that the negative terminal of the battery is connected directly to
the defined positive potential of VGS clearly reveals that the polarity of VGS
is directly opposite to that of VGG . Applying Kirchoff’s voltage law in the
clockwise direction of the indicated loop of Fig 7.2 results in

− VGG − VGS = 0

and

VGS = −VGG

Since VGG is a fixed dc supply, the voltage VGS is fixed in magnitude, resulting
in the designation “fixed-bias configuration.”

The resulting level of drain current I D is now controlled by Shockley’s

equation:

2
 V 
I D = I DSS 1 − GS 
 VP 

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SELF-BIAS CONFIGURATION

Another configuration is the self-bias configuration that eliminates the need

for two separate dc supplies. The controlling gate-to-source voltage is now
determined by the voltage across a resistor RS introduced in the source leg of
the configuration as shown in Fig. 7.8.

For the dc analysis, the capacitors can again be replaced by “open circuits”
and the resistor RG replaced by a short-circuit equivalent since I G = 0 A . The
result is the network of Fig. 7.9 for the important dc analysis.

The current through RS is the source current

I S , but I S = I D and

VRS = I D RS

For the indicated closed loop of Fig 7.9, we

find that

− VGS − VRS = 0

and

VGS = −VRS

or

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VGS = − I D RS (7.10)

Note that in this case that VGS is a function of the output current I D and not
fixed in magnitude as occurred for the fixed bias configuration.

Equation 7.10 is defined by the network configuration, and shockley’s

equation related the input and output quantities of the device.

A mathematical solution could be obtained simply by substituting Eq. (7.10)

into Shockley’s equation as follows:

2
 V 
I D = I DSS 1 − GS 
 VP 
2
 − I D RS 
= I DSS 1 − 
 VP 
2
 I R 
= I DSS 1 + D S 
 VP 

The following formulas are applicable:

VDS = VDD − I D ( RS + RD ) (7.11)

VS = I D RS (7.12)

VG = 0 (7.13)

VD = VDs + VS = VDD − VRD (7.14)

Example:

Determine the following for the network of Fig. 7.12 assuming VGSQ = −2.6V
and I DQ = 2.6mA is obtained from the Shockley’s equation

(a) V DS
(b) VP
(c) VG
(d) VD

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Solution:

(a) Eq. (7.11) VDS = VDD − I D ( RS + RD )

= 20V − (2.6m)(1k + 3.3k)
= 20V − 11.18V
= 8.82 V
(b) Eq. (7.12) VS = I D RS
= (2.6mA)(1k)
= 2.6 V
(c) Eq. (7.13) VG = 0 V
(d) Eq. (7.14) VD = VDS + VS = 8.82 V + 2.6 V = 11.42 V
or VD = VDD − I D RD = 20 V − (2.6mA)(3.3k) = 11.42 V

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VOLTAGE DIVIDER BIASING

The voltage-divider bias arrangement applied to BJT transistor amplifiers is
also applied to FET amplifiers.
The basic construction is exactly the same but the dc analysis of each is quite
difference. I G = 0 for FET amplifiers, but the magnitude of I B for common
emitter BJT amplifiers can affect the dc levels of current and voltage in both
the input and output circuits.
Recall I B provided the link between input and output circuits for the BJT
voltage-divider configuration while VGS will do the same for the FET
configuration.

The network can be redrawn as shown in Fig. 7.22 for the dc analysis. Note
that the capacitors, including by-pass capacitor Cs, have been replaced by
“open-circuit” equivalent. In addition, the source VDD was separated into two
equivalent sources to permit a further separation of the input and output
regions of the network.

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KCL requires that IR1=IR2 and the series equivalent circuit appearing to the left
of the figure can be used to find the level of VG.

The voltage VG, equal to the voltage across R2, can be found using the voltage-
divider rule as follows:

R2VDD
VG =
R1 + R2

KVL in the clockwise direction to the indicated loop will result in

VG − VGS − VRS = 0
VGS = VG − VRS

And substituting VRS = I S RS = I D RS we have

VGS = VG − I D RS

Once the quiescent values of I DQ and VGSQ are determined from the graph
using shockley’s equation, the remaining network analysis can be performed
in the usual manner.

That is,

VDS = VDD − I D ( RD + RS )

VD = VDD − I D RD

VS = I D RS

VDD
I R1 = I R 2 =
R1 + R2

Example:
Determine the following for the network shown in Fig. 7.25 assuming
I DQ = 2.4mA and VGSQ = −1.8V is obtained from the shockley’s equation:
a. VD
b. VS
c. V DS
d. VDG

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Solution:
a. VD = VDD − I D RD
= 16 V − (2.4 mA)( 2.4 k)
= 10.4 V

b. VS = I D RS = (2.4 mA)(1.5 k)

= 3.6 V

c. VDS = VDD − I D ( RD + RS )
= 16 V − (2.4 mA)( 2.4 k + 1.5 k)
= 6.64 V
or
VDS = VD − Vs
= 10.24 V − 3.6 V
= 6.64 V

d. VDG = VD − VG
= 10.24 V − 1.82 V
= 8.42 V

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Lesson 3


Basic Transistor
Application: amplifier,
switch

For a transistor to act as an amplifier, it should be properly biased. Here, let

us focus how a transistor works as an amplifier.

Transistor Amplifier
A transistor acts as an amplifier by raising the strength of a weak signal. The
DC bias voltage applied to the emitter base junction, makes it remain in
forward biased condition. This forward bias is maintained regardless of the
polarity of the signal. The below figure shows how a transistor looks like when
connected as an amplifier.

The low resistance in input circuit, lets any small change in input signal to
result in an appreciable change in the output. The emitter current caused by
the input signal contributes the collector current, which when flows through
the load resistor RL, results in a large voltage drop across it. Thus a small
input voltage results in a large output voltage, which shows that the transistor
works as an amplifier.

Example
Let there be a change of 0.1v in the input voltage being applied, which further
produces a change of 1mA in the emitter current. This emitter current will
obviously produce a change in collector current, which would also be 1mA.

A load resistance of 5kΩ placed in the collector would produce a voltage of

5 kΩ × 1 mA = 5V

Hence it is observed that a change of 0.1v in the input gives a change of 5v in

the output, which means the voltage level of the signal is amplified.

Performance of Amplifier
As the common emitter mode of connection is mostly adopted, let us first
understand a few important terms with reference to this mode of connection.

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Input Resistance
As the input circuit is forward biased, the input resistance will be low. The
input resistance is the opposition offered by the base-emitter junction to the
signal flow.
By definition, it is the ratio of small change in base-emitter voltage (ΔVBE) to
the resulting change in base current (ΔI B) at constant collector-emitter
voltage.
VBE
Input resistance, Ri =
I B
Where Ri = input resistance, VBE=base-emitter voltage, and IB = base current

Output Resistance
The output resistance of a transistor amplifier is very high. The collector
current changes very slightly with the change in collector-emitter voltage.

By definition, it is the ratio of change in collector-emitter voltage (ΔVCE) to

the resulting change in collector current (ΔI C) at constant base current.

VCE
Output resistance, Ro =
I C
Where Ro = Output resistance, VCE = Collector-emitter voltage, and IC =
Collector-emitter voltage.

Effective Collector Load

The load is connected at the collector of a transistor and for a single-stage
amplifier, the output voltage is taken from the collector of the transistor and
for a multi-stage amplifier, the same is collected from a cascaded stages of
transistor circuit.

By definition, it is the total load as seen by the a.c. collector current. In case
of single stage amplifiers, the effective collector load is a parallel
combination of RC and Ro.

Effective Collector Load, RAC=RC//Ro

RC + Ro
= RAC
RC + Ro

Hence for a single stage amplifier, effective load is equal to collector load
RC. In a multi-stage amplifier (i.e. having more than one amplification stage),
the input resistance Ri of the next stage also comes into picture.

Effective collector load becomes parallel combination of RC, Ro and Ri i.e,

Effective Collector Load, RAC=RC//Ro//Ri

RC Ri
RC || Ri =
RC + Ri

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As input resistance Ri is quite small, therefore effective load is reduced.

Current Gain
The gain in terms of current when the changes in input and output currents
are observed, is called as Current gain. By definition, it is the ratio of change
in collector current (ΔIC) to the change in base current (ΔIB).

I C
Current Gain,  =
I B
The value of β ranges from 20 to 500. The current gain indicates that input
current becomes β times in the collector current.

Voltage Gain
The gain in terms of voltage when the changes in input and output currents
are observed, is called as Voltage gain. By definition, it is the ratio of change
in output voltage (ΔVCE) to the change in input voltage (ΔVBE).

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Lesson 4

 Digital Circuits of Transistor

When used as an AC signal amplifier, the transistors Base biasing voltage is

applied in such a way that it always operates within its “active” region, that
is the linear part of the output characteristics curves are used.

However, both the NPN & PNP type bipolar transistors can be made to operate
as “ON/OFF” type solid state switch by biasing the transistors Base terminal
differently to that for a signal amplifier.

Solid state switches are one of the main applications for the use of transistor
to switch a DC output “ON” or “OFF”. Some output devices, such as LED’s
only require a few milliamps at logic level DC voltages and can therefore be
driven directly by the output of a logic gate. However, high power devices
such as motors, solenoids or lamps, often require more power than that
supplied by an ordinary logic gate so transistor switches are used.

If the circuit uses the Bipolar Transistor as a Switch, then the biasing of the
transistor, either NPN or PNP is arranged to operate the transistor at both
sides of the “ I-V ” characteristics curves we have seen previously.

The areas of operation for a transistor switch are known as the Saturation
Region and the Cut-off Region. This means then that we can ignore the
operating Q-point biasing and voltage divider circuitry required for
amplification, and use the transistor as a switch by driving it back and forth
between its “fully-OFF” (cut-off) and “fully-ON” (saturation) regions as shown
below.

Operating Regions

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The pink shaded area at the bottom of the curves represents the “Cut-off”
region while the blue area to the left represents the “Saturation” region of
the transistor. Both these transistor regions are defined as:

1. Cut-off Region
Here the operating conditions of the transistor are zero input base current
(IB), zero output collector current ( I C ) and maximum collector voltage (VCE)
which results in a large depletion layer and no current flowing through the
device. Therefore the transistor is switched “Fully-OFF”.

Then we can define the “cut-off region” or “OFF mode” when using a bipolar
transistor as a switch as being, both junctions reverse biased, VB < 0.7v and
IC = 0. For a PNP transistor, the Emitter potential must be negative with
respect to the Base.

2. Saturation Region
Here the transistor will be biased so that the maximum amount of base
current is applied, resulting in maximum collector current resulting in the
minimum collector emitter voltage drop which results in the depletion layer
being as small as possible and maximum current flowing through the
transistor. Therefore the transistor is switched “Fully-ON”.

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Then we can define the “saturation region” or “ON mode” when using a
bipolar transistor as a switch as being, both junctions forward biased, V B >
0.7v and IC = Maximum. For a PNP transistor, the Emitter potential must be
positive with respect to the Base.

Then the transistor operates as a “single-pole single-throw” (SPST) solid state

switch. With a zero signal applied to the Base of the transistor it turns “OFF”
acting like an open switch and zero collector current flows. With a positive
signal applied to the Base of the transistor it turns “ON” acting like a closed
switch and maximum circuit current flows through the device.

The simplest way to switch moderate to high amounts of power is to use the
transistor with an open-collector output and the transistors Emitter terminal
connected directly to ground. When used in this way, the transistors open
collector output can thus “sink” an externally supplied voltage to ground
thereby controlling any connected load.

An example of an NPN Transistor as a switch being used to operate a relay is

given below. With inductive loads such as relays or solenoids a flywheel diode
is placed across the load to dissipate the back EMF generated by the inductive
load when the transistor switches “OFF” and so protect the transistor from
damage. If the load is of a very high current or voltage nature, such as motors,
heaters etc, then the load current can be controlled via a suitable relay as
shown.

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The circuit resembles that of the Common. The difference this time is that to
operate the transistor as a switch the transistor needs to be turned either
fully “OFF” (cut-off) or fully “ON” (saturated). An ideal transistor switch
would have infinite circuit resistance between the Collector and Emitter when
turned “fully-OFF” resulting in zero current flowing through it and zero
resistance between the Collector and Emitter when turned “fully-ON”,
resulting in maximum current flow.

In practice when the transistor is turned “OFF”, small leakage currents flow
through the transistor and when fully “ON” the device has a low resistance
value causing a small saturation voltage ( VCE ) across it. Even though the
transistor is not a perfect switch, in both the cut-off and saturation regions
the power dissipated by the transistor is at its minimum.

In order for the Base current to flow, the Base input terminal must be made
more positive than the Emitter by increasing it above the 0.7 volts needed for
a silicon device. By varying this Base-Emitter voltage VBE, the Base current is
also altered and which in turn controls the amount of Collector current
flowing through the transistor as previously discussed.

When maximum Collector current flows the transistor is said to be Saturated.

The value of the Base resistor determines how much input voltage is required
and corresponding Base current to switch the transistor fully “ON”.

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 MODULE SUMMARY

• No matter what type of configuration a transistor is used in, the basic

relationships between the currents are always the same, and the base
to emitter voltage is the threshold value if the transistor in the “on”
state.
• The operating point defines where the transistor will operate in its
characteristic curves under dc conditions. For linear amplification, the
dc operating point should not be too close to the maximum power,
voltage, current rating and should avoid regions of saturation or cur-
off.
• Amplification in theca domain cannot be obtained without the
application of dc biasing level.
• For most applications the BJT amplifier can be considered linear,
permitting the use of the superposition theorem to separate the dc
analysis and designs.
• When introducing the ac model for a BJT:
o All dc sources are set to zero and replaced by a short-circuit
connection to ground.
o All capacitors are replaced by a short-circuit equivalent.
o All elements in parallel with an introduced short circuit
equivalent should be removed from the network.
o The network should be redrawn as often as possible.
• The input impedance of an ac network cannot be measured with an
ohmmeter.
• The output impedance of an amplifier is measured with an applied
signal set to zero. It cannot be measured with an ohmmeter.

Congratulations! You have just studied Module II. Now you are ready to
evaluate how much you have benefited from your reading by answering the
summative test. Good Luck!!!

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 SUMMATIVE TEST

2.

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3.

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4. For the network of Fig 7.89, assuming I Q = 3.3mA and VGSQ = −1.5V is
obtained from the graph of shockley’s equation, determine
a. VG
b. VD
c. VS
d. V DS

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