IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. PE-2, NO.

4, OCTOBER 1987 273

Active Power Factor Correction for Switching

Power Supplies
MARTIN F. SCHLECHT, MEMBER, IEEE, AND BRETT A. MIWA

Abstract-The harmonic-free utility/dc interface provides to the in terms of the power being delivered, for which the con-
computer industry a means to extract more power from the wall outlet verter's switches and filter elements must be rated.
than the normal rectifier, with its heavily distorted input current, will
allow. Due in part to the very high switch stresses in this interface, For example, Fig. 1 shows the simplest form of a har-
however, the cost appears to be too high to justify its use at this time. monic-free interface in which the rectified utility is con-
An alternate approach is proposed that focuses on power factor cor- nected to the dc bus of a switching power supply through
rection rather than harmonic reduction. Compared to the harmonic- an up-converter. The duty cycle of this converter is con-
free interface, the switch stress of this new approach is approximately trolled in a closed-loop manner to actively shape the input
a factor of two smaller.
current into the desired sinusoid. The components must
be rated to handle the peaks of the utility's sinusoidal
I. INTRODUCTION waveforms. At the very least the product of the voltage
OVER the last 5-10 years the power electronics com- and current rating is, therefore, twice the average power,
munity has developed utility/dc interfaces that draw but when one considers the wide range of input voltage
a nearly perfect sinusoidal current from the utility [1]-[9]. over which the converter must typically work, the product
These harmonic-free interfaces were first conceived as a can be as high as four times the power.
way to deal with the distortion problems that a large num- Faced with this excessive rating, the computer industry
ber of conditioned loads and sources would otherwise is searching for a less-expensive way at least to mitigate,
create [10]-[14]. The US Department of Energy (DOE), if not perfectly correct, its power factor problem. The
through its photovoltaic program, was a major promoter purpose of this paper is to propose one possible solution.
of this work, and several of its sponsored projects dem- It is an approach that is very similar to the harmonic-free
onstrated the ability to achieve a total harmonic distortion interface in that it makes use of active waveshaping tech-
of five percent or less. Some such converters are com- niques rather than passive filtering. It therefore maintains
mercially available, although the "harmonic pollution the attributes of small volume and low weight. The prem-
problem" is not yet great enough to justify their wide- ise of its design is power factor correction rather than
spread use. harmonic reduction. As a result, a special circuit modi-
The computer industry is nevertheless contemplating the fication that allows the component ratings to be less than
use of the harmonic-free interface. It is viewed primarily half those of the harmonic-free interface is possible.
as a way to extract more power from a standard wall outlet The following section presents the proposed circuit to-
rather than as a solution to a governmental standard that pology, its operation, and a comparison of two different
might someday exist. The rectifier front-ends now used ac current waveshapes. This is followed by a discussion
by the industry are, due to the high harmonic content of of how a standard switching power supply can be modi-
their utility current, able to access only about two thirds fied to perform part of the interface's function, thereby
of the available wall power. The harmonic-free interface, saving parts and cost. Simulation results are provided to
on the other hand, achieves a power factor very close to demonstrate the validity of this interaction. Finally, the
unity and, therefore, permits a substantial increase in the issue of holding the dc bus voltage constant over a wide
amount of computing power that can be installed for a range of input voltage is addressed.
given utility service. Throughout this paper are many graphs that relate the
While such an increase in the extraction of power is circuit's performance to various design parameters. The
valuable, the cost of the harmonic-free interface still ap- primary intent of these graphs is to show the wide latitude
pears to be too great to justify its use. This high cost is in over which one can find a satisfactory design. The equa-
part due to the extremely high voltage and current ratings, tions used to generate the graphs are provided in the Ap-
pendix.
Manuscript received August 20, 1986; revised January 14, 1987. This
paper was presented at the IEEE Power Electronics Specialists' Confer- II. THE PROPOSED TOPOLOGY
ence, Vancouver, BC, June 23-27, 1986. The proposed power factor correction interface is shown
The authors are with the Laboratory for Electromagnetic and Electronic
Systems, Massachusetts Institute of Technology, Cambridge, MA 02139. in Fig. 2. Like the harmonic-free interface, an up-con-
IEEE Log Number 8715896. verter connects the rectified utility to the dc bus of a

0885-8993/87/1000-0273$01.00 © 1987 IEEE

274 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. PE-2, NO. 4, OCTOBER 1987

+
V ac

Fig. 1. Simple topology for harmonic-free interface.

Vac+

Fig. 2. Proposed power factor correction interface.

switching power supply. Here, however, the dc bus ca- charge, an additional power circuit must be provided to
pacitor has been split to form a midpoint. Since both ca- remove it. The power rating of this circuit (which will be
pacitors are large on a 60-Hz basis, the voltage at the mid- referred to as the midpoint power) is relatively small,
point is constant. It is to this midpoint that the emitter of however, as will be shown. Furthermore, the next section
the up-converter's transistor is connected, as though it of this paper will describe how this function can be per-
were the ground of the circuit. Due to this special con- formed by the switching power supply with minimal com-
nection, the up-converter's semiconductor and filter com- plication.
ponents have a voltage stress that is only the difference
between the midpoint and the upper bus voltage, instead Example Power Factor and Device Ratings
of the full bus voltage. This reduced rating is the essence Because current can only be drawn from the utility when
of what the interface has to offer. its voltage is greater than that of the midpoint, a low power
As a consequence of this special connection, the up- factor and a high peak current rating might be expected.
converter cannot operate when the utility voltage dips be- However, very little of the cycle is lost because a si-
low the midpoint voltage. When this happens, neither the nusoidal waveform is at a high value most of the time.
transistor nor the diode can connect the converter's in- Furthermore, current drawn near the peak of the voltage
ductor to a voltage lower than the input, and the inductor waveform represents more power than current drawn near
current quickly decays to zero. Conduction resumes when the zero-crossings. As a result, a very good power factor
the rectified utility voltage again rises above the midpoint and a low peak current stress are actually possible.
voltage in the next half cycle. This interruption in the flow Assume, for example, that the dc bus voltage is equal
of utility current is the penalty paid for the reduced volt- to the peak of the utility waveform and that the midpoint
age stress, and a trade-off between the two is required. voltage is one-half this value. The device voltage ratings
The node to which the transistor, diode, and inductor are, therefore, a factor of two less than they would be for
of the up-converter are connected does not follow the rec- the harmonic-free interface, and the angle at which the
tified utility voltage below the midpoint voltage. Instead, utility and midpoint voltages are equal is 300. If we fur-
the bridge rectifiers withstand the negative voltage be- ther assume that a utility current is given the chopped si-
tween the two, thereby keeping the transistor from be- nusoidal shape shown in Fig. 3(a), it can be shown (using
coming reverse biased. A small diode should be placed in the equation provided in the Appendix and graphed in Fig.
antiparallel to the transistor to protect it from the reverse 4) that a power factor of 0.97 is achieved, which is quite
recovery transient of these rectifiers, however. adequate for the computer industry's needs. Meanwhile,
Finally, while the split bus capacitors form an incre- the peak current for which the devices must be rated is
mental ground at the midpoint, it is not a true ground, and only six percent higher than it would be for a full si-
the average charge flowing into it must therefore be zero. nusoidal current waveform (Fig. 5). The result is a 47-
Since the transistor of the up-converter only supplies percent reduction in switch power rating compared to the
 SCHLECHT AND MIWA: ACTIVE POWER FACTOR CORRECTION
275
I Ipeak
ac
I
p 1.5 Ifund.X

1.0 sine-wave/

\ / I square-wave

0.5
Il
180-cx 180 (degrees)
I -30.
6e
.1 .2 .3 .4 .5 .6 .7 .8 .9
(a) i 11 I1-
1 ~~~~~~~
PF- I- -B-
~ ~ ~

10 20 30 40 50 60 a
I (degrees)
ac
Fig. 5. Peak current when VbuS = Vacp,k.
I
p
2.0
P/

1.5 sine-wave

I - --
6e
180-rz 180 (degrees) 1.0

(b) 0.5
Fig. 3. Two possible utility current waveforms. (a) Chopped sine wave.
(b) Chopped square wave.
.9 6

10 20 30 40 50 60 a
P.F. (degrees)
Fig. 6. Switch power rating when Vbus = Vacp,k.
1.0 sine-wave

Imid
square-wave P
0.9 0.3

0.8 0.2
square-wave

T .1 .2 .3 .4 .5 .6 .7 .8 .9
_ 1- i - I
! I-- -r I
*~~~~~~6
W
0.1
10 20 30 40 50 60 a
(degrees)
Fig. 4. Power factor when VbUS = Vacpulk .7 .8 .9 6

harmonic-free interface (Fig. 6). The average power that (degrees)

must be extracted from the midpoint by the additional Fig. 7. Midpoint power when Vb65 =
Vacpk.
power circuit is only 17 percent of the total, and the har-
monic distortion factor of the utility current is approxi- a chopped square-wave current shape (Fig. 3(b)) should
mately 24 percent (Figs. 7 and 8). be investigated.
Square Wave Versus Sine Wave For the same case given previously, where all devices
have half the voltage stress of a harmonic-free interface,
One might ask if a better waveform exists than a it can be seen from Figs. 4-8 that a chopped square-wave
chopped sine wave. For example, since there is usually a current has a power factor of 0.955, while its peak value
maximum current that a circuit can handle, the most power is only 90 percent of the corresponding fundamental com-
will be extracted from the utility if the circuit continually ponent's amplitude. A 16-percent reduction in peak cur-
draws this level of current. Therefore, the performance of rent rating compared to the chopped sinusoid is therefore
276 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. PE-2, NO. 4, OCTOBER 1987

D.F. than it would be if the utility voltage were fixed. A similar

0. 9
increase in power ratings is required of both the power
factor correction and the harmonic-free interfaces.
Second, the actual utility current will not have the sharp
rise and fall transitions depicted in Fig. 3. The up-con-
0.6
verter's inductor instead limits the rate at which the cur-
rent can change. The detailed effect of this waveform
"imperfection" is not addressed because it is not sub-
0.3 stantial, particularly when the switching frequency is 50
/ s ine-wave kHz or higher, and the inductor is therefore very small.
Third, the control strategy for the interface is straight-
.3 .4 .5 .6 .7 .8 .9 6
forward. A closed-loop scheme must be used, so the in-
10 20 30 40 50 60 o cremental dynamics of the converter, including whatever
(degrees) ac side electromagnetic interference (EMI) filter has been
Fig. 8. Harmonic distortion factor when Vbus = Vac=,k added, must be determined. No effort is required to get
the current to start and stop at the right instants, however.
achieved with the loss of only 1.5 percent in power factor. The controller should simply call for current throughout
The chopped square wave's distortion (29 percent) and the cycle and let the level of the rectified utility voltage
midpoint power (21 percent) are both slightly higher, determine whether current will flow. The peak of the in-
however. put current waveform should be controlled to get the de-
A more complete comparison between the two wave- sired dc bus voltage.
forms can be made with the help of the graphs shown in Finally, with regard to what value of a should be used,
Figs. 4-8. These give the relative power factors, peak the switch ratings given in Fig. 6 suggest that the higher
currents, switch power ratings, midpoint powers, and dis- the angle, the better. There is a limit to how far one can
tortion factor for a wide range of the angle at which
a,
go in this direction, however, because the power factor
the utility voltage is equal to the midpoint voltage. The begins to drop rapidly above 40-45°. The concern for
ratio 6 of midpoint voltage to bus voltage that corresponds harmonic distortion might also call for a smaller angle.
to the range of at is also given. For all these data the bus More realistically, it is likely that the angle will be chosen
voltage has been set equal to the peak of the utility volt- to match a certain semiconductor device voltage rating
age. classification (e.g., 200 V). Fortunately, there is a wide
As be seen from Figs. 4-8, the chopped square
can range of latitude since, as Figs. 4-8 show, any angle be-
wave has a substantially lower peak current rating and, tween 20 and 450 will give acceptable power factor per-
therefore, a lower switch power rating. Its power factor formance with switch ratings substantially below those of
is not as good as that of the chopped sine wave, but it is the harmonic-free interface.
very close (within a few percent) for greater than 20-
a

250. Smaller angles than this would not normally be used III. REMOVING THE CHARGE FROM THE MIDPOINT
because the corresponding 6 is too small to offer the sub- As was mentioned earlier, power must be removed from
stantial voltage rating reduction desired. The midpoint the midpoint so that the node will have a net zero charge
power and the distortion factor of the square-wave ap- flow. One way to do this is shown in Fig. 9, where a
proach are higher than that of the sine wave but again not second up-converter is added to the interface. The voltage
by a substantial amount over the reasonable range of a. rating of this converter is that of the highest bus voltage,
While the specific requirements of the application will and the current rating is the midpoint power divided by
dictate the relative merit of these two waveforms, it seems the lowest midpoint voltage. The power rating of the
that the chopped square-wave shape is better if the pri- switches, normalized to the overall power and 1 / 3, is
mary goal is to provide power factor correction as cheaply therefore (Pmid/P) divided by 6. For a chopped square-
as possible. It has the further advantage of requiring an wave utility current that begins at a = 30 (8 = 0.5), this
easily derived reference waveshape that simplifies the normalized rating is 42 percent. For a chopped sine wave
control circuit design. it would be only 34 percent.
One advantage of the approach depicted in Fig. 9 is that
Additional Remarks 6 can be changed as a function of utility level. This flex-
Several additional remarks about the power factor cor- ibility allows the ratings of the front-end up-converter to
rection interface should be made. First, most computer be further reduced. For example, assume that a chopped
supplies must operate over a wide range of utility voltage square wave beginning at ae = 40 (power factor = 0.93)
(e.g., 208 V minus 25 percent to 240 V plus 10 percent). is used when the utility amplitude is at its maximum.
The ratio of lowest to highest input voltage is defined as Based on this operating point the voltage requirements of
in this paper. Since the components of the supply must components in the front-end converter are specified. For
be rated for the voltage of the high input and the current lower utility amplitudes, however, the switches are not
of the low input, their power rating is 1 / times greater stressed to this rating. The midpoint voltage (and, cor-
SCHLECHT AND MIWA: ACTIVE POWER FACTOR CORRECTION 277

charge removal circuit

Fig. 9. Separate charge removal circuit.

resondingly, a) could therefore be lowered until they

were. Doing so would reduce the peak current that would Fig. 10. Modified half-bridge forward converter.
have to be drawn. In this case, if a = 0.6, the angle could
be reduced from 40° to 240 (power factor = 0.96) at the
lowest input voltage. Doing so reduces the peak current
rating of the switches by 16 percent from what they would
be if the angle were held constant.
In exchange for this reduction the charge removal cir-
cuit's current rating is slightly larger because the mid-
point voltage decreased more than did the midpoint power.
The increase is only ten percent for this example, how-
ever, and it should be remembered that the power rating
of this circuit is substantially lower than that of the front-
end converter.
Using the Switching Power Supply
While the rating of the charge removal circuit shown in
Fig. 9 is only a fraction of the total power, this fraction Fig. 11. Modified voltage-fed center-tapped converter.
is not as small as could be desired. Fortunately, another
approach to charge removal, one that makes double use
of the switching power supply, is also possible. This ap-
proach delivers the midpoint power directly to an appro-
priately located tap on the supply's isolation transformer.
Figs. 10-12 show how this is done for the topologies
typically used today. For the half-bridge forward con-
verter, the midpoint is connected to the tap through a diode
(note that o must be less than 0.5, however). For the volt-
age-fed center-tapped converter two diodes are used, and
for the current-fed converter another inductor is also
needed. For the latter circuit the two inductors could be
coupled through a 6: 1 turns ratio to reduce their total vol-
ume. In all of the circuits the upper bus is connected to
the supply through an additional diode. Fig. 12. Modified current-fed center-tapped converter.
The diodes that connect the midpoint to the transformer
are required because of the negative voltage that appears
across the transformer winding during half of each face. Since some of the load power will be drawn from a
switching cycle. The diode in the upper bus is required to lower voltage (therefore, higher current) source, the tran-
avoid a short circuit condition should the midpoint volt- sistors and the lower windings of the isolation transformer
age be too high compared to the turns ratio of the tap. will be subjected to a higher current level than would oth-
Without it only the transformer's leakage inductance erwise occur. As shown in Fig. 7, however, the midpoint
would limit the discharge current that would flow from power is only a small fraction of the total, so the increased
the midpoint to the upper bus when the transistor is turned requirement is not great.
on. There is a problem with this approach, however: the
Beyond this modification, the operation of the switch- power supply is not in control of how the load current will
ing power supply is normal. The idea is to draw the load split between the two buses. For example, in the voltage-
power from both the midpoint and the upper bus in ex- fed circuits all of the power will be drawn from the upper
actly the same proportion that it is delivered by the inter- bus if the midpoint voltage is just one diode drop too low
278 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. PE-2, NO. 4, OCTOBER 1987

and from the lower bus if the voltage is just one diode
drop too high. In the current-fed circuit the inductors limit
the rate at which the power flow will change from one
path to the other, but they do not prevent it from happen-
ing on a long-term basis.
In general, it does not matter if all the power momen-
tarily flows from one bus or the other. When it all comes _| _ V a C~~~~~~~~~
from the lower voltage bus, however, the supply's
switches must carry a corresondingly higher current than
they would if power were flowing from the upper bus. A
current limit might, therefore, be reached, and control of
the output voltage would be lost until the midpoint volt-
age could be discharged to its correct value.
While in the steady state one would expect the midpoint (a)
voltage to stay at its correct value, remember that both
the midpoint and the upper bus have a 60-Hz ripple that
is typically much larger than a diode drop. Unfortunately,
the top and bottom capacitors cannot be sized correctly to Ibus
make these ripples have the right proportion all of the
time. The capacitance ratio that is correct for the portion
of the cycle where power is being delivered by the front-
end up-converter is incorrect for the portion that it is not.
Given that the capacitance ratio is nearly correct, how- Imid
ever, it is possible to control how the power splits be-
tween the two nodes by adding a resistor in series with
the midpoint-tap connection. The drop across this resistor
compensates for whatever error in voltage ripple still ex-
ists. The larger this error, the larger the resistor will have (b)
to be. The resistor creates a loss of power, of course, but Fig. 13. Waveforms from parity simulation. Voltage: I V 100 V. Cur-
this loss is relatively small. For instance, if the midpoint rent: I V - 3 A. Time: 100 ms - I ms. (a) Utility waveforms. (b)
Current drawn by switching supply diodes.
power is 20 percent of the total and the resistor drop is
five percent of the midpoint voltage, the dissipation is only
one percent. More interesting are the waveforms of Fig. 13(b). These
IV. SIMULATION RESULTS are the currents that are drawn from the upper and mid-
To verify the performance of the power factor correc- point buses (through the respective diodes) by the switch-
tion interface and to study the interaction between it and ing betweensupply.
ing power The diode currents are actually switch-
a modified switching power supply, a simulation was per- 20 kHz (hence the twotheir
zero and on-state values at an equivalent
formed on the MIT Parity Simulator [15]. The model was sitions cannot be seen on this traces per waveform), but the tran-
based on a 1000-W converter drawing power from a 220- From these waveforms we can fundamental determine how
time scale.
the load
V 60-Hz utility. The chosen supply topology was the half-
bridge forward converter shown in Fig. 10 with C, = Cb current splits between the nodes over the course of the
= 3 mF. Both it and the front-end up-converter were op- cycle. As described in the last section, a resistor was
erated at an equivalent 20 kHz. The value of the up-con- placed in series with the midpoint diode to limit the ripple
verter's inductor was 1 mH, and the utility current was of this split to the value seen here. That one
resistor had a
percent of the
given a chopped square-wave shape. value of 2.5 Q and dissipated 10 W, or
Because the half-bridge circuit requires a 6 less than total power.
0.5, a value of 0.45 (a = 26) was used. Since the dc bus
voltage, which was set slightly higher than the peak of the V. DESIGNING FOR A FIXED DC BUS VOLTAGE
utility, was 330 V, the peak voltage across the up-con- It is possible to control the up-converter of the interface
verter's switches was, therefore, approximately 185 V. such that the dc bus voltage is held at the highest utility
From Figs. 4 and 7, a power factor of 0.96 and a midpoint level rather than to let it vary as the previous discussion
power of 19 percent were expected. has assumed. This mode of operation allows the subse-
Fig. 13(a) shows the utility voltage and current wave- quent switching power supply to be designed for a fixed
forms that resulted from the simulation. The scale factors input voltage and thereby avoids the I/ /3 penalty in the
are such that the peak voltage corresponds to 310 V, the supply's component ratings. Such operation requires
peak current to approximately 6 A, and the base fre- higher ratings of the interface's up-converter, however.
quency to 60 Hz. A power factor of 0.96 was achieved. To help the design engineer decide when this trade-off is
SCHLECHT AND MIWA: ACTIVE POWER FACTOR CORRECTION 279

beneficial, this section presents the ratings for this mode

2. 0
of operation.
Two extreme approaches could be taken when the dc
bus voltage is to be held constant. The first is to hold the 1.5
angle ax constant and to allow the midpoint voltage to vary
correspondingly. This approach allows the designer to op-
timize the power factor of the utility current, but it does 1.0O

not allow the simple removal of charge from the midpoint

via a fixed tap on the switching supply's transformer. In
0.5
contrast, the second approach is to hold the midpoint volt-
age constant and let the angle of conduction change. This
approach retains the charge removal scheme but forces the
power factor to vary. 10 20 30 40 50 60
(degrees)
a

Figs. 14 and 15 show the switch power ratings that re-

sult for these two approaches when a chopped square- Fig. 14. Switch power rating for fixed Vb65 (function of ca).
wave current shape is used. The ratings are normalized to
the power flow and to 1 / 3, as discussed earlier (remem- V
SW
I
SW
0.5
ber that ,B is the ratio of the lowest to highest utility volt- 2. 0_ P/ D
-I

0.6
age). In each figure the curve labeled : = 1 shows the
ratings that would occur if the bus voltage were to follow 1. 5
0. 7
the peak utility voltage instead. As can be seen from these
figures, a penalty in ratings is always paid when the bus
is held constant. The larger the input voltage range, the 1. 0 -
0.8
worse this penalty. 0.9
With these graphs, one could determine the merit of
holding the bus voltage constant. Assume, for example, 0.5 _

that : = 0.6 and that the constant midpoint voltage ap-

proach is to be used. A 6 = 0.4 would give an ox that
-i
ranged from 240 to 420 and a corresponding power factor XX
I
.3 .
.I4 . 5 .. 6 . .7 ..
8 6
.2
that was always greater than 0.92. In such a case the
switch ratings of the up-converter would be 23 percent Fig. 15. Switch power rating for fixed Vbu. (function of 5).
higher than they would be if the bus voltage followed the
peak of the utility. This penalty should be weighed against 0.5 0.6 0.7

the savings of 40-percent lower switch stresses in the

switching power supply. 0.6
The power delivered to the midpoint for the two ap-
proaches is shown in Figs. 16 and 17. Since this power
level is a function of the present input voltage and not of 0.4
its range, these figures use Vac,eak/Vdc rather than 13 as the
parametric variable. Again, the curve marked Vacpeak /VdC
= 1 represents the midpoint power that would exist if the
dc bus voltage were allowed to vary. As can be seen, a 0.2

substantial increase exists in this parameter when the bus

voltage is held constant.
Given the results shown in this section, the designer can
determine whether it is beneficial, for a particular appli- 60 a
(degrees)
cation, to allow the midpoint voltage to change if the in- Fig. 16. Midpoint power for fixed Vb65 (function of a).
put voltage range is very wide. This can be easily accom-
plished if the charge removal circuit of Fig. 9 is used. It
is also possible to get discrete midpoint voltages with the tially by drawing a discontinuous utility current. The pen-
switching power supply approach, however, although alty in power factor, peak current, and harmonic distortion
several taps and some means to select between them would factor due to the discontinuity is not great, however, com-
be required. pared to the voltage savings realized. A means for remov-
ing charge from a capacitor node must be provided, but a
VI. CONCLUSION normal switching power supply can be modified to do this.
When power factor correction, not harmonic reduction, An input voltage that varies over a wide range requires
is the goal of an active waveshaping interface, it is pos- even higher switch stresses, but since both the interface
sible to reduce the voltage stress of the converter substan- and the switching power supply can provide line regula-
280 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. PE-2, NO. 4, OCTOBER 1987

0.5 0.6 0.7 0.8 In this equation the factor of two in front of the power P
is due to the use of the peak values of sinusoidal wave-
0.6 forms. The product of the right-hand expressions in (5)
and (6), normalized by P/ 1, is what is graphed in Figs.
6, 14, and 15.
0.4
Midpoint Power: The midpoint power is calculated by
multiplying the midpoint voltage and the average of the
v current flowing into the midpoint node via the front-end
vbus 1.0 converter's transistor. This average current is determined
0.2 by integrating the product of the utility current and the
transistor's "instantaneous" duty cycle over the cycle of
the utility waveform and then dividing by the length of
the cycle. The "instantaneous" duty cycle is found by
.3 .4 .5 .6 .7 .8 applying the basic up-converter relationships to the input
Fig. 17. Midpoint power for fixed Vbu0 (function of 2 and output voltages present at each point in the utility
cycle. For the chopped sine wave case the normalized
tme cesigner can cecile now
tion, A.'L-
A.-,--
best to istrniute tne
IL---. IL--A- A.- midpoint power is
burden. Pmid ('ltotalpk ( 268
APPENDIX P Ifundpk 1 -)

The following formulas were used to generate the [4 cos a - sin 2a - (-r - 2a)] (7)
curves found in Figs. 4-8 and 14-17. 27r
Power Factor: The power factors (P.F.) of the two
utility current waveforms shown in Fig. 3 are and for the chopped square wave case it is
Ifundrms r/2 - a + sin 2a/2 Pmid /Itotalpk)( 26 [7r - 2a - 2' cos a]
P.F. = -
= i7/
'totalrms 7r/2 P ifundpk k
Q( -
li) 7X

for the chopped sine wave and (8)

21d cos a2 In (8), ,6 was set equal to unity for the curves of Fig. 7
P.F. = -- 2 and to Vacp,ak/ VbU5 for the curves of Figs. 16 and 17.
7r(7r - 2a) Distortion Factor: The distortion factor of the utility
for the chopped square wave. current is defined as
Peak Current: The ratio of the peak of each current
waveform to the peak of its respective fundamental com- zI+o
ponent is i2

'totalpk /2
D. F. = 'fund (9)
(3)
'flnd=k 7r/2 - a + sin 2a/2 For the chopped sine wave the peak value of each odd
for the chopped sine wave and harmonic (including the fundamental) is
itotalpk (
In
n2- psin
= Ipeak / s 2(n - 1)
(n-1;)
0 sin (n + 1) 0ll1r
=
Ifundpk 4 cos a ~~~~~~(4) 2(n + 1)

for the chopped square wave. (10)

Switch Power Rating: The voltage that the switches and for the chopped square wave it is
must withstand is the bus voltage minus the midpoint
voltage I 4(\
In = ipeak -)COS (nak). (11)
Vswmax =( Vbus -
Vmid) ma, ( 1 = - 6) Vacmax (5)
where 6 = sin a for Fig. 6 and 6 = sin a for Fig. 14.
REFERENCES
The peak current rating of the switches is given by (3) [1] T. Kataoka et al., "A pulsewidth controlled ac to dc converter to
and (4), with the fundamental component chosen to give improve power factor and waveform of ac line current," IEEE Trans.
Ind. Appl., vol. IA-15, no. 6, pp. 670-675, Nov./Dec. 1979.
the rated power at the lowest utility voltage ( OVacmax): [2] M. F. Schlecht, "A line interfaced inverter with active control of the
output current waveform," in Power Electronics Specialists' Conf.
Iswmax 'tOtalpk ( 2P ) (6) Rec., 1980, pp. 234-241.
[3] J. C. Bowers et al., "A solid state transformer," in Power Electron-
Ifundpk VaCmaxp ics Specialists' Conf. Rec., 1980, pp. 253-264.
SCHLECHT AND MIWA: ACTIVE POWER FACTOR CORRECTION 281

[4] J. Jalade et al., "New dc/ac high power cell structure improve per- 115] J. G. Kassakian, "Simulating power electronic systems-A new ap-
formances for sine generator," in Power Electronics Specialists' Conf proach," Proc. IEEE, vol. 67, pp. 1428-1439, Oct. 1979.
Rec., 1980, pp. 326-331.
[5] M. J. Kocherdd et al., "An ac to dc converter with high quality input
waveforms, " in Power Electronics Specialists' Conf. Rec., 1982, pp. ._ Martin F. Schlecht (S'76-S'80-M'80-M'82) re-
341-353. ceived the S.B. degree in mechanical engineering
[6] M. F. Schlecht, "Novel topological alternatives to the design of a in 1977, and the S.B., S.M., and Sc.D. degrees
harmonic-free, utility/dc interface," in Power Electronics Special- in electrical engineering in 1977, 1980, and 1982,
ists' Conf. Rec., 1983, pp. 206-216. respectively, all from the Massachusetts Institute
[7] T. S. Latos et al., "A high efficiency 3 kW switchmode battery of Technology (MIT), Cambridge.
charger," in Power Electronics Specialists' Conf Rec., 1982, pp. In 1983 he was appointed Assistant Professor
341-353. of Electrical Engineering at MIT. His research in-
[8] M. F. Schlecht, "Time-varying feedback gains for power circuits with terests include all aspects of power electronics and
active waveshaping," in Power Electronics Specialists' Conf. Rec., power semiconductor devices, particularly those
1981, pp. 52-59. topics that combine the two fields. He is associ-
[9] A. Busse et al., "Multiloop control of a unity power factor fast ated with the MIT Laboratory for Electromagnetic and Electronic Systems
switching ac to dc converter," in Power Electronics Specialists' Conf and the MIT Microsystems Technology Laboratories.
Rec., 1982, pp. 171-179. Dr. Schlecht is a member of the IEEE Power Electronics Council, a
[10] EPRI, "Study of distribution system surge and harmonic character- member of the Program Committee of the Power Electronics Specialists'
istics," EPRI EL-1627, RP1024-1, Final Rep., Nov. 1980. Conference, and the Associate Editor for Power Electronics of the IEEE
[11] IEEE Harmonic and Reactive Compensation Subcommittee of the IAS Journal of Industrial Electronics.
Committee on Static Power Converters, "IEEE guide for harmonic
control and reactive compensation of static power converters," IEEE
Project 519, 1979. Brett A. Miwa was born in 1964 in Peoria, IL.
[12] I. Pitel and S. N. Talukdar, "A review of the effects and suppression He received the S.B. degree in electrical engi-
of power converter harmonics," in IEEE-IAS Ann. Conf. Rec., Los neering in 1986 from the Massachusetts Institute
Angeles, CA, 1977, no. 5-A, pp. 119-126. of Technology (MIT), Cambridge. He is currently
[13] VDEW "Perturbation" Working Group, "Survey of harmonic con- working toward the S.M. degree at MIT in the
ditions in public power-supply systems," Electizitats-wirtschaft, vol. area of power systems and electronics.
78, no. 25, pp. 1008-1017, 1979 (translated by ORB, OA Trans.
2354).
[14] CENELEC, European Standard, EN 50 006, available in English,
French, and German from Comite' Electrotechnique Belge, 3 Galerie
Ravenstein, 1000 Bruxelles, Belgium.