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Op-Amp Interview Insights and Concepts

The document describes the process and questions asked in two rounds of interviews for a Hardware Test Engineer position. Round 1 consisted of an online interview with 15 questions focusing on basic analog concepts like RC and RL circuits, op-amps, and control systems. Round 2 was an in-person interview over two 3-hour sessions with a mix of technical questions about circuits, op-amps, buck converters, and coding, as well as discussions of the candidate's master's thesis project. After 20 days, the candidate received confirmation that they had been selected for the role based on demonstrating their understanding of core electrical engineering concepts and ability to explain technical topics to the interviewers.

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27 views3 pages

Op-Amp Interview Insights and Concepts

The document describes the process and questions asked in two rounds of interviews for a Hardware Test Engineer position. Round 1 consisted of an online interview with 15 questions focusing on basic analog concepts like RC and RL circuits, op-amps, and control systems. Round 2 was an in-person interview over two 3-hour sessions with a mix of technical questions about circuits, op-amps, buck converters, and coding, as well as discussions of the candidate's master's thesis project. After 20 days, the candidate received confirmation that they had been selected for the role based on demonstrating their understanding of core electrical engineering concepts and ability to explain technical topics to the interviewers.

Uploaded by

jaggu
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Profile 1: Hardware Test Engineer

No. of Rounds: 2 ( 1 online, 1 F2F)

Round 1 (ON Cisco Webex)

The main focus was on basic analog concepts, like RC circuits, RL circuits, Op-Amps, control systems.

Q1) Draw a RC LPF fed with 5VDC , predict output waveform and tell its magnitude at t=time
constant(T), t=2T, t=5T

Catch: In hurry we say output settles to 5V after 5 time constants, but if you do a little math and
solve you will find out even at t=5T output not reaches exactly 5V.

Q2) Changed input to pulse 0 to 5V with time period sufficiently larger than time constant, asked to
draw waveforms and all.

Q3) Changed input to square wave -5 to 5V with time period sufficiently larger than time constant,
asked to draw waveforms and all.

Q4) Changed input to pulse -10 to 5V with time period sufficiently larger than time constant, asked
to draw waveforms and all.

Q5) connect an ideal current source with inductor, draw voltage waveform.

Q6) changed current source from DC to pulse input, draw waveforms.

Q7) What is Op-Amp? Draw a voltage follower.

Q8) Characteristics of an ideal and practical Op-amp( need to tell all)

Q9) why buffer is used? Tell its application in any circuit.

Q10) In previous inductor circuits, he connected a switch between current source and inductor and
asked to analyse the scenario if switch opens any time during the operation.

Q11) Changed switch to diode in Q10)

Q12) Draw buck converter and explain in detail what is happening with diode there?

Q13) What is bandwidth of Op-Amp? What is PSRR?

Q14) Why ideal Op-Amp has infinite gain?

Q15) CMRR? Why negative feedback only is stable?

Q16) For pulse input having larger/smaller slew rate than OP-Amp’s slew rate, asked to draw how
the curve at output looks like?

Round 1 over, duration 1hour,45mins. I was able to answer almost all questions except last question.
Round 2(F2F): Duration: 3 hours (two tech rounds 1.5hour each)

F2F round1:

Two panel members, they explained everything abt the JD, then started asking.

In this round, questions were very limited, but their focus was on how I explain the things, DO I
really know the concepts or I have memorized the waveforms?

(i) Draw simple buck converter along with all possible waveforms.
(ii) How can we reduce O/P ripple.
(iii) Why LC filter is used in buck?
(iv) Draw a closed loop version of this buck converter?
(v) Why linear regulator can’t be used in place of this?
TO the answer of this, I explained shunt regulator drawing its circuit and explained the
losses in zener will not allow us, he wanted me to think about LDO.

(vI) DO you know LDO? I clearly said NO, because I didn’t have idea about its circuit, then he said low
drop-out regulator. Only thing I told was it has more precise regulation than buck.

(vii)He drew a block diagram of buck converter IC, pins were Vin, Feedback, duty and asked if I don’t
have access to output pins how may I know it is working as expected?

(Viii) Draw a 12V to 5V voltage regulator using Op-Amp +BJT+Zener.

(ix) I was stuck in previous Q. so he gave a hint and redrawn the circuit and asked about its
operation, I was able to justify that.

(x) Code for finding out largest element in an array.

After that 15 min. break.


F2F round 2

There was some senior manager from team.

We discussed about my [Link] project in detailed manner for about an hour.

Later he asked RC LPF circuit with square wave input, the waveform of voltage across resitance.

Two parallel RC circuits connected in series and asked the voltage across load, how it will depend
upon values of R and C.

After around 20 days I got a confirmation from HR that I have been selected. The lateral hires face
this issue often, recruiting process is very lengthy and time consuming.

Thanks!

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