LOGIC FUNCTION USING
BUILDING BLOCKS
Lecture 11
Advanced Digital Electronics
Engineering Technical College/ Mosul
Department of Computer Technology Engineering
Computer Electronics / Fourth year
Multiplexers
Multiplexers are among the most commonly used
combinational circuits. They choose an output from
among several possible inputs based on the value of a
select signal. A multiplexer is sometimes affectionately
called a mux.
Figure shows the schematic and
truth table for a 2:1 multiplexer with
two data inputs, D0 and D1, a select
input, S, and one output, Y. The
multiplexer chooses between the two
data inputs based on the
select: if S=0, Y=D0, and if S=1, Y=D1.
S is also called a control signal because
it controls what the multiplexer does.
Multiplexers
A 2:1 multiplexer can be built
from sum-of-products logic as shown in
figure. The Boolean equation for the
multiplexer may be derived with a
Karnaugh map.
Wider Multiplexers
A 4:1 multiplexer has four data inputs
and one output, as shown in Figure 1. The 4:1
multiplexer can be built using sum-of-products
logic, or multiple 2:1 multiplexers, as shown in
Figure 2. Wider multiplexers, such as 8:1 and
16:1 multiplexers, can be also built by using
expanding methods. the best implementation
choice depends on the target technology.
Figure 1 Figure 2
Logic with multiplexers
by changing the data inputs, the multiplexer can be
reprogrammed to perform a different function. To
illustrate this principle, Figure below shows two-input
AND and XOR functions implemented with 2:1
multiplexers.
Start with an ordinary truth table, combine pairs
of rows to eliminate the rightmost input variable by
expressing the output in terms of this variable. then
use the multiplexer as a lookup table according to the
new, smaller truth table.
Example: Logic with multiplexers
Implement the function 𝑌 = 𝐴𝐵 + 𝐵 𝐶 + 𝐴𝐵𝐶 ,
using an 8:1 multiplexer only.
Solution:
Figure shows the implementation using a single
8:1 multiplexer. The multiplexer acts as a lookup
table where each row in the truth table corresponds
to a multiplexer input.
Decoders
A decoder has N inputs and
2N outputs. It asserts exactly
one of its outputs depending on
the input combination. Next
figure shows a 2:4 decoder. The
outputs are called one-hot,
because exactly one is “hot”
(HIGH) at a given time.
Next figure shows an
implementation for the 2:4
decoder using logic gates. Each
output in a decoder represents
a single minterm.
Decoder Logic
Decoders can be combined with OR
gates to build logic functions. Figure
below shows the two-input XNOR
function using a 2:4 decoder and a single OR gate.
Because each output of a decoder represents a single
minterm, the function is built as the OR of all the
minterms in the function.
Read Only Memory
Read only memory (ROM) stores a bit as the
presence or absence of a transistor, the ROM bit cell
is a combinational circuit and has no state to
“forget” if power is turned off.
The contents of a ROM can be indicated using dot
notation as in figure below the dot notation for a
4-word x 3-bit ROM containing the data shown. A
dot at the intersection of a row (wordline) and a
column (bitline) indicates that the data bit is 1.
Read Only Memory
ROMs can be built using two-
level logic with a group of AND
gates followed by a group of
OR gates. The ROM of next
figure built using a decoder and
OR gates. This representation
of a ROM is interesting because
it shows how the ROM can
perform any two-level logic
function. In practice, ROMs are
built from transistors instead
of logic gates, to reduce their
size and cost.
Example: Square Lookup Table using ROM
0
X F(X)=X2 1
X2 3-to-8 2
000 000000
001 000001 X1 3
Decoder 4
010 000100
X0 5
011 001001
6
100 010000
7
101 011001
110 100100
111 110001
F5 F4 F3 F2 F1 F0
Home Work
Implement the function 𝑌 = 𝐴𝐵 + 𝐵𝐶 + 𝐴𝐵𝐶 , using an
4:1 multiplexer and an inverter.