COM 181 Systems Architecture
Coursework 1A
This coursework will contribute towards 30% of your total marks.
Design a 4-bit Arithmetic Logic Unit (ALU) with basic logic blocks (Logic Gates, MUX). A complete
solution takes in three 4-bit unsigned numbers A, B and C and should be capable of doing
1. Compute the function F1 = A + 2*(B + C)
2. Computes a function F2 = A +2*( B – C)
3. Computes a function F3= 2’s complement of B
4. Computes F4 = (A/4) + 2*(B + C)
5. Computes F5 = (A*2) + 2*(B – C)
Part 1: Implement each of these components separately using basic gates- AND, OR, NOT. (Do not
use in-built functions from Logisim)
Part 2: Integrate these components to form a single ALU using control signals (Op-Sel) to choose any
one of the above five functions. Optimize the hardware if possible.
Part 3: A toy computer can be built using your ALU as shown in Figure 1. Use your ALU along with in-
built counter, ROMs, and RAM to implement this circuit in LogiSim. Test your circuit by storing
different values in ROM’s and observing the output in Output-RAM.
Figure 1. Toy CPU Circuit
Part 4: How will you design a general-purpose computer with the ALU that you designed? Describe
using diagrams.
Submission: Please submit (in BlackBoard) a report containing your design as a Word or PdF
document. Attach Logisim files ( .circ ) used for simulating your circuit.
Evaluation Scheme:
Part-1 Design of each component 3*5 =15 Marks
Marks 0-1 1-2 3-3
Break-up
Part 1 Partially Truth table Truth table correct K-Maps /
Function-1 Implemented correct Equations and Design shown.
Equations Optimizations done
and Design
shown.
Part 1 Partially Truth table Truth table correct K-Maps /
Function-2 Implemented correct Equations and Design shown.
Equations Optimizations done
and Design
shown.
Part 1 Partially Truth table Truth table correct K-Maps /
Function-3 Implemented correct Equations and Design shown.
Equations Optimizations done
and Design
shown.
Part 1 Partially Truth table Truth table correct K-Maps /
Function-4 Implemented correct Equations and Design shown.
Equations Optimizations done
and Design
shown.
Part 1 Partially Truth table Truth table correct K-Maps /
Function 5 Implemented correct Equations and Design shown.
Equations Optimizations done
and Design
shown.
Part-2 Integration of the components 5 marks
Marks 0-2 2-3 3-5
Part 2 Partially Correctly Correctly Working. Optimizations done
working Working
Part-3 Toy CPU: 5 Marks
Marks 0-3 3-5
Part 2 Partially Correctly Working
working
Part-4 Comment on general purpose Computer design: 5 Marks
Diagrams and explanation. Maximum word limit is 1000 words (soft limit). This limit is for Part 4 and
not for whole document.
Link to tutorial on BlackBoard assignment submission:
[Link]
Feedback will be provided within 4 weeks of submission as per University policy through BBL.